WO2014015543A1 - 液晶面板及其制作方法 - Google Patents

液晶面板及其制作方法 Download PDF

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Publication number
WO2014015543A1
WO2014015543A1 PCT/CN2012/079941 CN2012079941W WO2014015543A1 WO 2014015543 A1 WO2014015543 A1 WO 2014015543A1 CN 2012079941 W CN2012079941 W CN 2012079941W WO 2014015543 A1 WO2014015543 A1 WO 2014015543A1
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WIPO (PCT)
Prior art keywords
line
shorting bar
area
liquid crystal
array substrate
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PCT/CN2012/079941
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English (en)
French (fr)
Inventor
宋涛
赵国栋
刘明
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深圳市华星光电技术有限公司
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Priority to US13/697,532 priority Critical patent/US20140028537A1/en
Publication of WO2014015543A1 publication Critical patent/WO2014015543A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136254Checking; Testing

Definitions

  • the present invention relates to the field of liquid crystal panels, and in particular, to a liquid crystal panel and a method of fabricating the same.
  • Liquid crystal display (Liquid Crystal Display, LCD) is a flat panel display device that uses the characteristics of liquid crystal materials to display images (Flat Panel) Display, FPD), which has the advantages of light weight, low driving voltage and low power consumption compared to other display devices, has become the mainstream product in the entire consumer market.
  • LCD Liquid Crystal Display
  • FPD Full Panel Display
  • the liquid crystal panel is the most important component of the liquid crystal display.
  • the manufacturing process of the liquid crystal panel is mainly divided into a front-end array process, a middle-stage process, and a rear-end module assembly.
  • a front-end array process In order to reduce the difficulty of detecting the picture of the liquid crystal panel of the box segment and reduce the equipment cost, one of the methods well known in the art is to use the shorting Bar (short bar) way.
  • FIG. 1 is a schematic diagram of a test circuit of a liquid crystal panel in the prior art.
  • TFT is formed (Thin Film) Transistor, thin film field effect transistor)
  • the effective display area and the TFT peripheral line it is also necessary to make some lines for testing on the periphery of the line such as the data line and the scan line on the array substrate, for example, the first data line test line D1.
  • a second data line test line D2, a third data line test line D3, a scan line test line G, a common electrode test line C, and these lines are respectively connected with lines such as data lines or scan lines, and these lines are all or Partially shorted together, used for line testing of the front array substrate and screen test of the boxed liquid crystal panel.
  • FIG. 2 is a schematic structural view of the test circuit shown in FIG. 1 cut by laser.
  • the laser will be used for stunning.
  • the line set in the bar area 4 is cut off from the line connecting the data line or the scanning line. Due to the control of the cutting precision of the process, the width of the prior art laser cutting area 5 is 30-120 um, so in order to prevent the assembly of the rear module, the module COF (Chip) On FPC, flip chip)
  • the metal part of the chip and other parts of the crimping process may be related to the shorting
  • the line connection of the bar area 4 is short-circuited, resulting in poor display. It is generally necessary to reserve a certain safety area 3 between the laser-cut area 1 and the module COF crimp area 2.
  • the above design structure causes the liquid crystal panel to add a lot of areas outside the module COF crimping area 2, thereby causing waste of the liquid crystal panel and reducing the utilization ratio of the liquid crystal panel.
  • a main object of the present invention is to provide a liquid crystal panel aimed at improving the utilization of a liquid crystal panel.
  • the invention provides a liquid crystal panel, comprising an array substrate, wherein a peripheral circuit region of the array substrate comprises a module flip chip bonding region and a shorting bar region, wherein the shorting bar region is located on the module flip chip bonding
  • the periphery of the area includes at least one line connected to the scan line or the data line on the array substrate, and the line disposed in the shorting bar area is removed by the laser after the end of the liquid crystal panel test.
  • a laser precision reserved area is further disposed between the module flip chip bonding region and the shorting bar region.
  • the shorting bar region has a width of 150-350 um.
  • the laser precision reserved area has a width of 30-50 um.
  • the line provided by the shorting bar area includes a first line and/or a second line, the first line is connected to the data line, and the second line is connected to the scan line.
  • the shorting bar region further includes a line connected to a TFT gate on the array substrate.
  • the invention also provides a method for manufacturing a liquid crystal panel, comprising the following steps:
  • TFT array substrate Forming a TFT array substrate, wherein the array substrate is provided with an effective display area and a peripheral line area, wherein the peripheral line area is provided with a module flip chip bonding area and a shorting bar area, and the shorting bar area is disposed in the module The periphery of the crimped film crimping area;
  • the line being connected to a scan line or a data line of the array substrate;
  • the shorting bar area is removed by a laser.
  • the step of connecting at least one line in the shorting bar area, the connecting the line to the scan line or the data line of the array substrate further comprises:
  • a laser precision reserved area is disposed between the module flip chip bonding region and the shorting bar region.
  • the shorting bar region has a width of 150-350 um.
  • the laser precision reserved area has a width of 30-50 um.
  • the line provided by the shorting bar area includes a first line and/or a second line, the first line is connected to the data line, and the second line is connected to the scan line.
  • the step of connecting at least one line in the shorting bar area, and the step of connecting the line to the scan line or the data line of the array substrate further includes:
  • a line connected to the gate of the TFT on the array substrate is disposed in the shorting bar region.
  • the invention removes the line provided by the short-circuit bar area by laser, so that no unnecessary safety area and laser cutting area need to be disposed in the periphery of the module COF crimping area, thereby improving the utilization ratio of the liquid crystal panel.
  • FIG. 1 is a schematic diagram of a test circuit of a liquid crystal panel in the prior art
  • FIG. 2 is a schematic structural view of the test circuit shown in FIG. 1 cut by laser;
  • FIG. 3 is a schematic structural view of an embodiment of a liquid crystal panel of the present invention.
  • FIG. 4 is a schematic structural view of another embodiment of a liquid crystal panel of the present invention.
  • FIG. 5 is a schematic flow chart of an embodiment of a method for fabricating a liquid crystal panel according to the present invention.
  • FIG. 3 is a schematic structural view of an embodiment of a liquid crystal panel of the present invention.
  • the liquid crystal panel includes an array substrate, and the peripheral circuit region of the array substrate includes a module COF crimping region 10 and a shorting bar region 20, and the shorting bar region 20 is located at a periphery of the module COF crimping region 10, and includes At least one line is connected to the scan line or the data line on the array substrate, and the line provided by the shorting bar area 20 is removed by the laser after the end of the liquid crystal panel test.
  • the liquid crystal panel includes an array substrate, a CF substrate, and a liquid crystal disposed between the array substrate and the CF substrate.
  • the array substrate forms an effective display area and a peripheral line area by performing processes such as film formation, development, etching, and the like on a glass substrate.
  • the peripheral circuit region of the array substrate includes a module COF crimping region 10 and a shorting bar region 20.
  • the module COF crimping region 10 is used for assembling the rear panel module, and the driving IC is crimped on the array substrate and connected to the TFT, the data line and the scan line on the array substrate.
  • At least one line is disposed on the shorting bar region 20, and the line is connected to a scan line or a data line on the array substrate, so that the data line or the scan line connected to the line can be completely or partially short-circuited.
  • the line provided on the shorting bar region 20 can also be connected to the gate of the TFT on the array substrate.
  • the lines provided on the shorting bar area 20 are mainly used for testing the lines on the array substrate in the process of the array substrate, and for detecting the picture on the liquid crystal panel of the cassette stage and the like.
  • the line provided on the shorting bar region 20 must be removed by laser to prevent the lines provided on the shorting bar region 20 from causing short circuits on other lines on the array substrate.
  • the shorting bar region 20 has a width of 150-350 um. Since the line on the shorting bar area 20 will be removed by the laser, in the module COF process assembled by the rear module, the COF and other components will not be connected to other lines outside the module COF crimping area (mainly including the shorting bar area setting).
  • the security of the liquid crystal panel in the present invention eliminates the need for a security area, that is, the liquid crystal panel of the present invention reduces the area of the security area compared to the liquid crystal panel of the prior art, thereby improving the utilization of the liquid crystal panel. rate.
  • the liquid crystal panel removes the line disposed in the shorting bar area by the laser, so that the peripheral portion of the COF crimping area does not need to be provided with an extra safety area and a laser cutting area, thereby improving the utilization ratio of the liquid crystal panel.
  • FIG. 4 is a schematic structural view of another embodiment of the liquid crystal panel of the present invention.
  • a laser precision reserved area 30 is further disposed between the module COF crimping region 10 and the shorting bar region 20.
  • a laser precision reserved area 30 is disposed between the module COF crimping region 10 and the shorting bar region 20 to prevent the laser from removing the line disposed on the shorting bar region 20 due to insufficient precision.
  • the module COF crimping region 10 is mistakenly removed.
  • the laser precision reserved area 30 has a width of 30-50 um.
  • the line provided by the shorting bar area 30 includes a first line and/or a second line, the first line is connected to the data line, and the second line is connected to the scan line.
  • the data line can be short-circuited in whole or in part by the first line, and the scan line can be short-circuited in whole or in part by the second line.
  • the line provided by the shorting bar region 30 further includes a third line connected to the TFT gate of the array substrate.
  • FIG. 5 is a schematic flow chart of an embodiment of a method for fabricating a liquid crystal panel according to the present invention.
  • the manufacturing method of the liquid crystal panel includes the following steps:
  • Step S10 fabricating a TFT array substrate, wherein the array substrate is provided with an effective display area and a peripheral line area, wherein the peripheral line area is provided with a module COF crimping area and a shorting bar area, and the shorting bar area is disposed in the mode The periphery of the group COF crimping area;
  • the array substrate forms an effective display area and a peripheral line area by performing processes such as film formation, development, etching, and the like on a glass substrate.
  • the peripheral circuit region of the array substrate includes a module COF crimping region 10 and a shorting bar region 20.
  • the module COF crimping region 10 is used for crimping the driving IC on the array substrate during the assembly of the rear module, and is connected to the TFT, the data line and the scanning line on the array substrate.
  • Step S20 at least one line is disposed in the shorting bar area, and the line is connected to a scan line or a data line of the array substrate;
  • At least one line is disposed on the shorting bar region 20, and the line is connected to a scan line or a data line on the array substrate, so that the data line or the scan line connected to the line can be completely or partially short-circuited.
  • the line provided on the shorting bar region 20 can also be connected to the gate of the TFT on the array substrate.
  • the lines provided on the shorting bar area 20 are mainly used for testing the lines on the array substrate in the process of the array substrate, and for detecting the picture on the liquid crystal panel of the cassette stage and the like.
  • Step S30 after the end of the test of the liquid crystal panel, the shorting bar region 20 is removed by a laser.
  • the line provided on the shorting bar area 20 must be removed by laser to prevent the line provided on the shorting bar area 20 from causing short circuit of other lines on the array substrate. Since the line on the shorting bar area 20 will be removed by the laser, in the module COF process assembled by the rear module, the COF and other components will not be connected to other circuits on the periphery of the module COF crimping area 10 (mainly including the shorting bar area).
  • the set circuit is connected, so that the peripheral portion of the module COF crimping region 10 no longer needs to be provided with a safe area, that is, the liquid crystal panel of the present invention reduces the area of the safe area compared with the liquid crystal panel of the prior art, thereby improving the liquid crystal panel. Utilization.
  • the circuit disposed in the shorting bar region is removed by the laser, so that the peripheral portion of the COF crimping region does not need to be provided with an extra safety region and a laser cutting region, thereby improving the utilization ratio of the liquid crystal panel.
  • a laser precision reserved region 30 is further disposed between the module COF crimping region and the shorting bar region.
  • a laser precision reserved area 30 is disposed between the module COF crimping region 10 and the shorting bar region 20 to prevent the laser from removing the line disposed on the shorting bar region 20 due to insufficient precision.
  • the module COF crimping region 10 is mistakenly removed.
  • the laser precision reserved area 30 has a width of 30-50 um.
  • the line provided by the shorting bar area 20 includes a first line and/or a second line, the first line is connected to the data line, and the second line is connected to the scan line.
  • the data line can be short-circuited in whole or in part by the first line, and the scan line can be short-circuited in whole or in part by the second line.
  • the line provided by the shorting bar region 30 further includes a third line connected to the TFT gate of the array substrate.

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  • Physics & Mathematics (AREA)
  • Liquid Crystal (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

一种液晶面板及其制作方法,该液晶面板包括阵列基板,所述阵列基板的外围线路区包括模组覆晶薄膜压接区域(10)及短路棒区域(20),所述短路棒区域(20)位于所述模组覆晶薄膜压接区域(10)外围,其包括至少一线路,所述线路与所述阵列基板上的扫描线或数据线连接,且所述短路棒区域(20)设置的线路在液晶面板测试结束后被激光去除。该方法通过激光将短路棒区域(20)设置的线路去除,从而使得模组覆晶薄膜压接区域(10)外围不需要再设置多余的安全区域及激光切除区域,提高了液晶面板的利用率。

Description

液晶面板及其制作方法
技术领域
本发明涉及液晶面板领域,尤其涉及一种液晶面板及其制作方法。
背景技术
液晶显示器(Liquid Crystal Display,LCD)是利用液晶材料的特性来显示图像的一种平板显示装置(Flat Panel Display,FPD),其相较于其他显示装置而言具轻薄、低驱动电压及低功耗等优点,已经成为整个消费市场上的主流产品。
液晶面板是液晶显示器最主要的组成元件,液晶面板的制作工艺主要分为前段阵列制程、中段成盒制程及后段模组组装。为了减少成盒段液晶面板画面检测的难度和减少设备费用,目前业界公知的方法之一是采用shorting bar(短路棒)的方式。参照图1,图1是现有技术中液晶面板的测试线路示意图。在前段阵列制程中,形成TFT(Thin Film Transistor,薄膜场效应晶体管)有效显示区和TFT外围线路时,还需要在阵列基板上的数据线和扫描线等线路的外围做出一些用来测试的线路,例如第一数据线测试线路D1、第二数据线测试线路D2、第三数据线测试线路D3、扫描线测试线路G、公共电极测试线C,而且这些线路与数据线或扫描线等线路分别连接在一起,并且这些线路为全部或部分短路在一起,用于前段阵列基板的线路测试及成盒段液晶面板的画面测试等等。
参照图2,图2是图1所示测试线路通过激光切断的结构示意图。在完成画面测试以后,再利用激光将shorting bar区域4所设置的线路与数据线或扫描线等线路的接连处切断。受制程切割精度控制的制约,现有技术的激光切断区域5的宽度为30-120um,所以为了防止后段模组组装中,模组COF(Chip On FPC,覆晶薄膜)压接制程的芯片等部件的金属部分可能与shorting bar区域4的线路连接而发生短路,而造成显示不良,一般需要在激光切除区域1与模组COF压接区域2之间预留一定的安全区域3。
上述设计结构使得液晶面板在模组COF压接区域2外部增加了很多区域,从而导致液晶面板的浪费,降低液晶面板的利用率。
发明内容
本发明的主要目的是提供一种液晶面板,旨在提高液晶面板的利用率。
本发明提供了一种液晶面板,包括阵列基板,所述阵列基板的外围线路区包括模组覆晶薄膜压接区域及短路棒区域,所述短路棒区域位于所述模组覆晶薄膜压接区域外围,其包括至少一线路,所述线路与所述阵列基板上的扫描线或数据线连接,且所述短路棒区域设置的线路在液晶面板测试结束后被激光去除。
优选地,所述模组覆晶薄膜压接区域与所述短路棒区域之间还设置一激光精度预留区域。
优选地,所述短路棒区域的宽度为150-350um。
优选地,所述激光精度预留区域的宽度为30-50um。
优选地,所述短路棒区域设置的线路包括第一线路和/或第二线路,所述第一线路与数据线连接,所述第二线路与扫描线连接。
优选地,所述短路棒区域还包括与所述阵列基板上的TFT栅极连接的线路。
本发明还提供了一种液晶面板的制作方法,包括以下步骤:
制作TFT阵列基板,所述阵列基板上设置有效显示区及外围线路区,所述外围线路区设置模组覆晶薄膜压接区域及短路棒区域,且所述短路棒区域设置在所述模组覆晶薄膜压接区域外围;
在所述短路棒区域设置至少一线路,所述线路与阵列基板的扫描线或数据线连接;
在进行液晶面板的测试结束后,利用激光将所述短路棒区域去除。
优选地,所述在短路棒区域设置至少一线路,所述线路与阵列基板的扫描线或数据线连接的步骤之后还包括:
在所述模组覆晶薄膜压接区域与所述短路棒区域之间设置一激光精度预留区域。
优选地,所述短路棒区域的宽度为150-350um。
优选地,所述激光精度预留区域的宽度为30-50um。
优选地,所述短路棒区域设置的线路包括第一线路和/或第二线路,所述第一线路与数据线连接,所述第二线路与扫描线连接。
所述在短路棒区域设置至少一线路,所述线路与阵列基板的扫描线或数据线连接的步骤之后还包括:
在所述短路棒区域设置与所述阵列基板上的TFT栅极连接的线路。
本发明通过激光将短路棒区域设置的线路去除,从而使得模组COF压接区域外围不需要再设置多余的安全区域及激光切除区域,提高了液晶面板的利用率。
附图说明
图1是现有技术中液晶面板的测试线路示意图;
图2是图1所示测试线路通过激光切断的结构示意图;
图3是本发明液晶面板一实施例的结构示意图;
图4是本发明液晶面板另一实施例的结构示意图;
图5是本发明液晶面板的制作方法一实施例的流程示意图。
本发明目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。
具体实施方式
以下结合说明书附图及具体实施例进一步说明本发明的技术方案。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
参照图3,图3是本发明液晶面板一实施例的结构示意图。该液晶面板包括包括阵列基板,所述阵列基板的外围线路区包括模组COF压接区域10及短路棒区域20,所述短路棒区域20位于所述模组COF压接区域10外围,其包括至少一线路,所述线路与所述阵列基板上的扫描线或数据线连接,且所述短路棒区域20设置的线路在液晶面板测试结束后被激光去除。
具体地,液晶面板包括阵列基板、CF基板及设置在阵列基板与CF基板之间的液晶。其中阵列基板通过在一玻璃基板上进行成膜、显影、蚀刻等工艺形成有效显示区及外围线路区。且该阵列基板的外围线路区包括模组COF压接区域10及短路棒区域20。该模组COF压接区域10用于后段模组组装时,供驱动IC压接在该阵列基板上,并与阵列基板上的TFT、数据线及扫描线连接。短路棒区域20上设置至少一线路,该线路与阵列基板上的扫描线或数据线连接,从而使得与该线路连接的数据线或扫描线可以形成全部或部分短路。该短路棒区域20上设置的线路还可以与阵列基板上的TFT的栅极连接。该短路棒区域20上设置的线路主要是用于在阵列基板的制程中对阵列基板上的线路进行测试,以及用于在成盒段液晶面板的画面检测等等。
但是,在上述测试均结束后,必须通过激光将该短路棒区域20上设置的线路去除,以防止短路棒区域20上设置的线路造成阵列基板上的其他线路短路。该短路棒区域20的宽度为150-350um。由于短路棒区域20上的线路将被激光去除,所以在后段模组组装的模组COF制程中,COF等部件不会与模组COF压接区域外的其他线路(主要包括短路棒区域设置的线路)连接,因此模组COF压接区域外围不再需要设置安全区域,即本发明中的液晶面板比现有技术中的液晶面板,减少了安全区域的面积,故提高了液晶面板的利用率。
本发明实施例液晶面板通过激光将短路棒区域设置的线路去除,从而使得模组COF压接区域外围不需要再设置多余的安全区域及激光切除区域,提高了液晶面板的利用率。
进一步的,参照图4,图4是本发明液晶面板另一实施例的结构示意图。上述模组COF压接区域10与短路棒区域20之间还设置一激光精度预留区域30。为了提高液晶面板的制程良率,在模组COF压接区域10与短路棒区域20之间设置激光精度预留区域30,以防止激光去除短路棒区域20上设置的线路时,由于精度不够高而误切除模组COF压接区域10。本发明实施例中,该激光精度预留区域30的宽度为30-50um。
进一步的,短路棒区域30设置的线路包括第一线路和/或第二线路,所述第一线路与数据线连接,所述第二线路与扫描线连接。通过该第一线路可以将数据线全部或部分短路,通过第二线路可以将扫描线全部或部分短路。
进一步的,短路棒区域30设置的的线路还包括第三线路,该第三线路与阵列基板的TFT栅极连接。
参照图5,图5是本发明液晶面板的制作方法一实施例的流程示意图。该液晶面板的制作方法包括以下步骤:
步骤S10、制作TFT阵列基板,所述阵列基板上设置有效显示区及外围线路区,所述外围线路区设置模组COF压接区域及短路棒区域,且所述短路棒区域设置在所述模组COF压接区域外围;
阵列基板通过在一玻璃基板上进行成膜、显影、蚀刻等工艺形成有效显示区及外围线路区。且该阵列基板的外围线路区包括模组COF压接区域10及短路棒区域20。该模组COF压接区域10用于后段模组组装时,将驱动IC压接在该阵列基板上,并与阵列基板上的TFT、数据线及扫描线连接。
步骤S20、在所述短路棒区域设置至少一线路,所述线路与阵列基板的扫描线或数据线连接;
短路棒区域20上设置至少一线路,该线路与阵列基板上的扫描线或数据线连接,从而使得与该线路连接的数据线或扫描线可以形成全部或部分短路。该短路棒区域20上设置的线路还可以与阵列基板上的TFT的栅极连接。该短路棒区域20上设置的线路主要是用于在阵列基板的制程中对阵列基板上的线路进行测试,以及用于在成盒段液晶面板的画面检测等等。
步骤S30、在进行液晶面板的测试结束后,利用激光将所述短路棒区域20去除。
在液晶面板的测试均结束后,必须通过激光将该短路棒区域20上设置的线路去除,以防止短路棒区域20上设置的线路造成阵列基板上的其他线路短路。由于短路棒区域20上的线路将被激光去除,所以在后段模组组装的模组COF制程中,COF等部件不会与模组COF压接区域10外围的其他线路(主要包括短路棒区域设置的线路)连接,因此模组COF压接区域10外围不再需要设置安全区域,即本发明中的液晶面板比现有技术中的液晶面板,减少了安全区域的面积,故提高了液晶面板的利用率。
本发明实施例液晶面板的制作方法通过激光将短路棒区域设置的线路去除,从而使得模组COF压接区域外围不需要再设置多余的安全区域及激光切除区域,提高了液晶面板的利用率。
进一步的,上述步骤S10制作的TFT阵列基板中,在所述模组COF压接区域与所述短路棒区域之间还设置一激光精度预留区域30。为了提高液晶面板的制程良率,在模组COF压接区域10与短路棒区域20之间设置激光精度预留区域30,以防止激光去除短路棒区域20上设置的线路时,由于精度不够高而误切除模组COF压接区域10。本发明实施例中,该激光精度预留区域30的宽度为30-50um。
进一步的,上述短路棒区域20设置的线路包括第一线路和/或第二线路,所述第一线路与数据线连接,所述第二线路与扫描线连接。通过该第一线路可以将数据线全部或部分短路,通过第二线路可以将扫描线全部或部分短路。
进一步的,短路棒区域30设置的的线路还包括第三线路,该第三线路与阵列基板的TFT栅极连接。
以上所述仅为本发明的优选实施例,并非因此限制其专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。

Claims (16)

  1. 一种液晶面板,其特征在于,包括阵列基板,所述阵列基板的外围线路区包括模组覆晶薄膜压接区域及短路棒区域,所述短路棒区域位于所述模组覆晶薄膜压接区域外围,其包括至少一线路,所述线路与所述阵列基板上的扫描线或数据线连接,且所述短路棒区域设置的线路在液晶面板测试结束后被激光去除。
  2. 根据权利要求1所述的液晶面板,其特征在于,所述模组覆晶薄膜压接区域与所述短路棒区域之间还设置一激光精度预留区域。
  3. 根据权利要求2所述的液晶面板,其特征在于,所述短路棒区域的宽度为150-350um。
  4. 根据权利要求2所述的液晶面板,其特征在于,所述激光精度预留区域的宽度为30-50um。
  5. 根据权利要求1所述的液晶面板,其特征在于,所述短路棒区域设置的线路包括第一线路和/或第二线路,所述第一线路与数据线连接,所述第二线路与扫描线连接。
  6. 根据权利要求1所述的液晶面板,其特征在于,所述短路棒区域还包括与所述阵列基板上的TFT栅极连接的线路。
  7. 根据权利要求6所述的液晶面板,其特征在于,所述短路棒区域的宽度为150-350um。
  8. 根据权利要求1所述的液晶面板,其特征在于,所述短路棒区域的宽度为150-350um。
  9. 一种液晶面板的制作方法,其特征在于,包括以下步骤:
    制作TFT阵列基板,所述阵列基板上设置有效显示区及外围线路区,所述外围线路区设置模组覆晶薄膜压接区域及短路棒区域,且所述短路棒区域设置在所述模组覆晶薄膜压接区域外围;
    在所述短路棒区域设置至少一线路,所述线路与阵列基板的扫描线或数据线连接;
    在进行液晶面板的测试结束后,利用激光将所述短路棒区域去除。
  10. 据权利要求9所述的方法,其特征在于,所述在短路棒区域设置至少一线路,所述线路与阵列基板的扫描线或数据线连接的步骤之后还包括:
    在所述模组覆晶薄膜压接区域与所述短路棒区域之间设置一激光精度预留区域。
  11. 根据权利要求10所述的方法,其特征在于,所述短路棒区域的宽度为150-350um。
  12. 根据权利要求10所述的方法,其特征在于,所述激光精度预留区域的宽度为30-50um。
  13. 根据权利要求9所述的方法,其特征在于,所述短路棒区域设置的线路包括第一线路和/或第二线路,所述第一线路与数据线连接,所述第二线路与扫描线连接。
  14. 根据权利要求9所述的方法,其特征在于,所述在短路棒区域设置至少一线路,所述线路与阵列基板的扫描线或数据线连接的步骤之后还包括:
    在所述短路棒区域设置与所述阵列基板上的TFT栅极连接的线路。
  15. 根据权利要求14所述的方法,其特征在于,所述短路棒区域的宽度为150-350um。
  16. 根据权利要求9所述的方法,其特征在于,所述短路棒区域的宽度为150-350um。
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