CN109521584A - 一种显示母板、阵列基板及其制备方法和显示面板 - Google Patents

一种显示母板、阵列基板及其制备方法和显示面板 Download PDF

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CN109521584A
CN109521584A CN201811365617.8A CN201811365617A CN109521584A CN 109521584 A CN109521584 A CN 109521584A CN 201811365617 A CN201811365617 A CN 201811365617A CN 109521584 A CN109521584 A CN 109521584A
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binding
array substrate
area
test signal
signal wire
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戴珂
江鹏
廖燕平
王文超
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BOE Technology Group Co Ltd
Hefei BOE Display Lighting Co Ltd
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BOE Technology Group Co Ltd
Hefei BOE Display Lighting Co Ltd
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Priority to CN201811365617.8A priority Critical patent/CN109521584A/zh
Publication of CN109521584A publication Critical patent/CN109521584A/zh
Priority to US16/498,777 priority patent/US11443989B2/en
Priority to PCT/CN2019/086033 priority patent/WO2020098235A1/en
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    • GPHYSICS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • H01L2224/73201Location after the connecting process on the same surface
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Abstract

本发明提供一种显示母板、阵列基板及其制备方法和显示面板。该阵列基板具有显示区、边框区和绑定区;边框区围设在显示区外围,绑定区位于边框区内;阵列基板包括绑定电极和测试信号线,绑定电极设置在绑定区,用于通过绑定连接部与外围电路绑定连接,还用于引入测试信号;测试信号线分布于所述边框区;测试信号线包括用于连接阵列基板外部测试端的接出段;接出段位于绑定区,且接出段的一端连接绑定电极,接出段的另一端的端面在阵列基板侧边边缘裸露,绑定连接部能覆盖接出段的另一端的端面。该阵列基板通过绑定连接部覆盖接出段裸露的端面,能避免接出段的端面裸露,从而避免因裸露而造成的接出段腐蚀或静电损伤,保证了显示产品品质。

Description

一种显示母板、阵列基板及其制备方法和显示面板
技术领域
本发明涉及显示技术领域,具体地,涉及一种显示母板、阵列基板及其制备方法和显示面板。
背景技术
液晶显示LCD(Liquid Crystal Display)市场竞争环境中,为使得产品更具有竞争性,需要提升产品品质。
在液晶显示产品生产过程中,在各制程阶段都需要监控产品良率。在阵列基板制作阶段,阵列基板测试是最后一道监控工艺。其主要原理是将阵列基板内的信号线通过测试线引出到阵列基板以外的测试端上,通过该测试端和测试线向阵列基板内部引入测试信号以检测不良。
测试线从阵列基板外部的测试端引入到阵列基板内部,在后续阵列基板母板切割形成单个阵列基板时,测试线会被切断,切断后保留在阵列基板中的测试线部分的一端端面会裸露在阵列基板边缘,由于裸露的测试线端面没有任何保护,长时间裸露会造成腐蚀或者静电损伤,影响显示产品的显示品质。
发明内容
本发明针对现有技术中存在的上述技术问题,提供一种显示母板、阵列基板及其制备方法和显示面板。该阵列基板通过使测试信号线的接出段位于绑定区,使阵列基板上的接出段裸露在阵列基板侧边边缘的端面能够在阵列基板绑定外围电路时通过绑定连接部覆盖,从而避免接出段的端面裸露,进而避免因裸露而造成的接出段腐蚀或静电损伤,保证了显示产品品质。
本发明提供一种显示母板,包括多个阵列基板,所述阵列基板之间为切割区,所述切割区内设置有用于引入测试信号的测试端,所述阵列基板包括分布于其显示区外围的边框区内的测试信号线,所述测试信号线包括接出段,所述接出段位于所述边框区中的绑定区,所述接出段还从所述绑定区与所述切割区相邻的边延伸至所述切割区内并与所述测试端连接。
本发明还提供一种阵列基板,所述阵列基板具有显示区、边框区和绑定区;所述边框区围设在所述显示区外围,所述绑定区位于所述边框区内;
所述阵列基板包括绑定电极和测试信号线,所述绑定电极设置在所述绑定区,用于通过绑定连接部与外围电路绑定连接,还用于引入测试信号;所述测试信号线分布于所述边框区;
所述测试信号线包括用于连接所述阵列基板外部测试端的接出段;所述接出段位于所述绑定区,且所述接出段的一端连接所述绑定电极,所述接出段的另一端的端面在所述阵列基板侧边边缘裸露,与所述绑定电极绑定连接的所述绑定连接部能覆盖所述接出段的另一端的端面。
优选地,所述测试信号线还包括主体段,所述主体段分布于所述绑定区以外的所述边框区,且所述主体段连接所述绑定电极。
优选地,所述绑定区位于所述显示区一侧外的所述边框区内。
优选地,还包括栅极、栅线和数据线,所述栅极和所述栅线同层设置,所述栅线与所述数据线之间夹设有绝缘层;
所述测试信号线与所述栅极和所述栅线采用相同材料且同层设置;或者,所述测试信号线与所述数据线采用相同材料且同层设置。
优选地,所述测试信号线为数据线断路测试线,所述数据线断路测试线的主体段与所述数据线的一端连接。
优选地,还包括数据驱动电路,所述数据驱动电路设置于所述绑定区。
优选地,还包括栅极驱动电路,所述栅极驱动电路设置于所述绑定区。
本发明还提供一种显示面板,包括对盒基板、绑定连接部、外围电路,还包括上述阵列基板,所述阵列基板与所述对盒基板对合设置,所述外围电路通过所述绑定连接部与所述阵列基板上的绑定电极绑定连接。
优选地,所述绑定连接部包括柔性保护膜和设置在所述柔性保护膜内部的绑定连接线。
本发明还提供一种阵列基板的制备方法,包括沿上述显示母板中的阵列基板的边缘切割,得到上述阵列基板。
本发明的有益效果:本发明所提供的显示母板,通过使测试信号线的接出段位于绑定区,并使接出段从绑定区与切割区的相邻的边延伸至切割区,能使显示母板切割后得到的阵列基板上,测试信号线接出段被切断的一端端面裸露在阵列基板对应绑定区的侧边边缘,从而当阵列基板绑定外围电路时,绑定连接部能覆盖接出段的裸露的一端端面,避免接出段的端面裸露,进而避免因裸露而造成的接出段腐蚀或静电损伤,保证了显示产品品质。
本发明所提供的阵列基板,通过使测试信号线的接出段位于绑定区,使阵列基板上的接出段裸露在阵列基板侧边边缘的端面能够在阵列基板绑定外围电路时通过绑定连接部覆盖,从而避免接出段的端面裸露,进而避免因裸露而造成的接出段腐蚀或静电损伤,保证了显示产品品质。
本发明所提供的显示面板,通过采用上述阵列基板,确保该显示面板不会因为测试信号线接出段的裸露而遭到腐蚀或静电损伤,从而确保了该显示面板的品质。
附图说明
图1为本发明实施例1中显示母板的结构俯视示意图;
图2为本发明实施例2中阵列基板的结构俯视示意图。
其中的附图标记说明:
1.阵列基板;11.显示区;12.边框区;120.绑定区;13.测试信号线;130.接出段;131.主体段;2.切割区;3.测试端;4.绑定电极。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明所提供的一种显示母板、阵列基板及其制备方法和显示面板作进一步详细描述。
在阵列基板制作阶段,阵列基板测试是最后一道监控工艺。其主要原理是将阵列基板内的信号线通过测试线引出到阵列基板以外的测试端上,通过该测试端和测试线向阵列基板内部引入测试信号以检测不良。如ADD(Array Data Pad Opposite Data Line)测试线是阵列基板测试线中的一种,ADD测试线用于检测数据线断路不良,目前产品中大部分都会采用。ADD测试线从阵列基板外部的测试端引入到阵列基板内部,在后续阵列基板母板切割形成单个阵列基板时,ADD测试线会被切断,切断后一部分ADD测试线会被保留在阵列基板中,保留在阵列基板中的ADD测试线的一端端面会裸露在阵列基板边缘,由于裸露的ADD测试线端面没有任何保护,长时间裸露会造成腐蚀或者静电损伤,影响显示产品的显示品质。
实施例1:
本实施例提供一种显示母板,如图1所示,包括多个阵列基板1,阵列基板1之间为切割区2,切割区2内设置有用于引入测试信号的测试端3,阵列基板1包括分布于其显示区11外围的边框区12内的测试信号线13,测试信号线13包括接出段130,接出段130位于边框区12中的绑定区120,接出段130还从绑定区120与切割区2相邻的边延伸至切割区2内并与测试端3连接。
其中,测试信号线13还包括主体段131,主体段131设置于绑定区120以外的边框区12内,且主体段131与接出段130连接。测试信号线13用于向阵列基板1内引入测试信号,以对阵列基板1进行性能测试。
本实施例中,显示母板沿切割区2内的切割线切割后,能够得到阵列基板1,阵列基板1上保留的测试信号线13接出段130的被切断的一端端面在阵列基板1侧边边缘裸露。
该显示母板,通过使测试信号线的接出段位于绑定区,并使接出段从绑定区与切割区的相邻的边延伸至切割区,能使显示母板切割后得到的阵列基板上,测试信号线接出段被切断的一端端面裸露在阵列基板对应绑定区的侧边边缘,从而当阵列基板绑定外围电路时,绑定连接部能将接出段的裸露的一端端面覆盖,避免接出段的端面裸露,进而避免因裸露而造成的接出段腐蚀或静电损伤,保证了显示产品品质。
实施例2:
本实施例提供一种阵列基板,如图2所示,阵列基板具有显示区11、边框区12和绑定区120;边框区12围设在显示区11外围,绑定区120位于边框区12内;阵列基板包括绑定电极4和测试信号线13,绑定电极4设置在绑定区120,用于通过绑定连接部与外围电路绑定连接,还用于引入测试信号;测试信号线13分布于边框区12;测试信号线13包括用于连接阵列基板外部测试端的接出段130,接出段130位于绑定区120,且接出段130的一端连接绑定电极4,接出段130的另一端的端面在阵列基板侧边边缘裸露,与绑定电极4绑定连接的绑定连接部能覆盖接出段130的另一端的端面。
其中,绑定连接部包括柔性保护膜和设置在柔性保护膜内部的绑定连接线。柔性保护膜通常采用PET材料。绑定连接部与绑定电极4和外围电路进行绑定连接后,其一侧表面能与阵列基板的侧边边缘端面紧密贴合,从而将接出段130的裸露在阵列基板侧边边缘端面上的端面覆盖,且绑定连接部的一侧表面与接出段130的另一端端面紧密贴合,能防止水氧从接出段130端面侵入接出段130内部。由于测试信号线13通常采用能导电的金属材料,通过绑定连接部覆盖接出段130裸露在外的一端端面,能够避免外界水氧对接出段130的腐蚀,还能防止静电从接出段130裸露的端面进入阵列基板,从而避免造成阵列基板不良。
通过使接出段130位于绑定区120,使阵列基板上的接出段130裸露在阵列基板侧边边缘的端面能够在阵列基板绑定外围电路时通过绑定连接部覆盖,从而避免接出段130的端面裸露,进而避免因裸露而造成的接出段130腐蚀或静电损伤,保证了显示产品品质。
其中,测试信号线13还包括主体段131,主体段131分布于绑定区120以外的边框区12,且主体段131连接绑定电极4,以实现主体段131与接出段130的连接。测试信号线13布设于阵列基板的整个边框区12内,以便向阵列基板内各个位置的待测试信号线或待测试电极引入测试信号,从而实现对阵列基板的性能测试。
本实施例中,测试信号线13为数据线断路测试线(即ADD测试线),数据线断路测试线的主体段131与数据线的一端连接。需要说明的是,数据线与测试信号线13主体段131的中间连接。测试时,数据线断路测试线上输入低电平,数据线与数据线断路测试线连接的一端线电压被置低,在数据线的另一端输入高电平信号,如果有数据线发生断路,则在数据线发生断路的位置会有一个较大的电压差,如此便很容易找到数据线发生断路的位置,以便进行后续修复。当然,测试信号线13也可以用来测试阵列基板内的其他信号线或电极。
另外,在阵列基板完成测试后,测试信号线13的接出段130悬空或者给入公共电压信号,该公共电压信号在显示时为阵列基板所用。
优选的,本实施例中,绑定区120位于显示区11一侧外的边框区12内。如此设置,一方面能够实现阵列基板单侧绑定,从而使阵列基板绑定侧以外的其他侧能够实现窄边框,另一方面,测试信号线13接出段130通常会设置有多条,上述设置能使多条接出段130裸露在阵列基板侧边边缘的端面都能在阵列基板绑定连接外围电路时通过绑定连接部覆盖,从而避免因裸露而造成的接出段130腐蚀或静电损伤,保证了显示产品品质。
本实施例中,阵列基板还包括栅极、栅线和数据线,栅极和栅线同层设置,栅线与数据线之间夹设有绝缘层;测试信号线13与栅极和栅线采用相同材料且同层设置。如此使测试信号线13的制备不会额外增加阵列基板的制备工艺。
需要说明的是,测试信号线13也可以与数据线采用相同材料且同层设置。如此同样能使测试信号线13的制备不会额外增加阵列基板的制备工艺。
本实施例中,阵列基板还包括数据驱动电路,数据驱动电路设置于绑定区。阵列基板还包括栅极驱动电路,栅极驱动电路设置于绑定区。数据驱动电路和栅极驱动电路均设置于绑定区,从而能实现阵列基板在一侧与外围电路绑定,进而能够实现阵列基板其他侧边框为窄边框,同时,阵列基板在一侧与外围电路绑定时,绑定连接部还能覆盖裸露在阵列基板该侧边边缘的接出段130端面,从而避免因裸露而造成的接出段130腐蚀或静电损伤,保证了显示产品品质。
基于阵列基板的上述结构,本实施例还提供一种该阵列基板的制备方法,包括沿实施例1的显示母板中的阵列基板的边缘切割,得到本实施例中的阵列基板。
实施例2的有益效果:实施例2所提供的阵列基板,通过使测试信号线的接出段位于绑定区,使阵列基板上的接出段裸露在阵列基板侧边边缘的端面能够在阵列基板绑定外围电路时通过绑定连接部覆盖,从而避免接出段的端面裸露,进而避免因裸露而造成的接出段腐蚀或静电损伤,保证了显示产品品质。
实施例3:
本实施例提供一种显示面板,包括对盒基板、绑定连接部、外围电路,还包括实施例2中的阵列基板,阵列基板与对盒基板对合设置,外围电路通过绑定连接部与阵列基板上的绑定电极绑定连接。
其中,绑定连接部包括柔性保护膜和设置在柔性保护膜内部的绑定连接线。柔性保护膜通常采用PET材料。
绑定连接部在实现绑定电极与外围电路的绑定连接的同时,还能覆盖阵列基板上设置于绑定区的测试信号线接出段的裸露的端面,从而避免接出段的端面裸露,进而避免因裸露而造成的接出段腐蚀或静电损伤,保证了显示面板品质。
通过采用实施例2中的阵列基板,确保该显示面板不会因为测试信号线接出段的裸露而遭到腐蚀或静电损伤,从而确保了该显示面板的品质。
本发明所提供的显示基板可以为LCD面板、LCD电视、OLED面板、OLED电视、显示器、手机、导航仪等任何具有显示功能的产品或部件,也可以为上述具有显示功能的产品或部件的半成品件。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。

Claims (11)

1.一种显示母板,包括多个阵列基板,所述阵列基板之间为切割区,所述切割区内设置有用于引入测试信号的测试端,所述阵列基板包括分布于其显示区外围的边框区内的测试信号线,其特征在于,所述测试信号线包括接出段,所述接出段位于所述边框区中的绑定区,所述接出段还从所述绑定区与所述切割区相邻的边延伸至所述切割区内并与所述测试端连接。
2.一种阵列基板,所述阵列基板具有显示区、边框区和绑定区;所述边框区围设在所述显示区外围,所述绑定区位于所述边框区内;
所述阵列基板包括绑定电极和测试信号线,所述绑定电极设置在所述绑定区,用于通过绑定连接部与外围电路绑定连接,还用于引入测试信号;所述测试信号线分布于所述边框区;其特征在于,
所述测试信号线包括用于连接所述阵列基板外部测试端的接出段;所述接出段位于所述绑定区,且所述接出段的一端连接所述绑定电极,所述接出段的另一端的端面在所述阵列基板侧边边缘裸露,与所述绑定电极绑定连接的所述绑定连接部能覆盖所述接出段的另一端的端面。
3.根据权利要求2所述的阵列基板,其特征在于,所述测试信号线还包括主体段,所述主体段分布于所述绑定区以外的所述边框区,且所述主体段连接所述绑定电极。
4.根据权利要求2所述的阵列基板,其特征在于,所述绑定区位于所述显示区一侧外的所述边框区内。
5.根据权利要求3所述的阵列基板,其特征在于,还包括栅极、栅线和数据线,所述栅极和所述栅线同层设置,所述栅线与所述数据线之间夹设有绝缘层;
所述测试信号线与所述栅极和所述栅线采用相同材料且同层设置;或者,所述测试信号线与所述数据线采用相同材料且同层设置。
6.根据权利要求5所述的阵列基板,其特征在于,所述测试信号线为数据线断路测试线,所述数据线断路测试线的主体段与所述数据线的一端连接。
7.根据权利要求4所述的阵列基板,其特征在于,还包括数据驱动电路,所述数据驱动电路设置于所述绑定区。
8.根据权利要求4所述的阵列基板,其特征在于,还包括栅极驱动电路,所述栅极驱动电路设置于所述绑定区。
9.一种显示面板,包括对盒基板、绑定连接部、外围电路,其特征在于,还包括权利要求2-8任意一项所述的阵列基板,所述阵列基板与所述对盒基板对合设置,所述外围电路通过所述绑定连接部与所述阵列基板上的绑定电极绑定连接。
10.根据权利要求9所述的显示面板,其特征在于,所述绑定连接部包括柔性保护膜和设置在所述柔性保护膜内部的绑定连接线。
11.一种阵列基板的制备方法,其特征在于,包括沿权利要求1的显示母板中的阵列基板的边缘切割,得到权利要求2-8任意一项所述的阵列基板。
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