WO2021254040A1 - 一种显示基板、显示面板及其制备方法 - Google Patents

一种显示基板、显示面板及其制备方法 Download PDF

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Publication number
WO2021254040A1
WO2021254040A1 PCT/CN2021/093332 CN2021093332W WO2021254040A1 WO 2021254040 A1 WO2021254040 A1 WO 2021254040A1 CN 2021093332 W CN2021093332 W CN 2021093332W WO 2021254040 A1 WO2021254040 A1 WO 2021254040A1
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WIPO (PCT)
Prior art keywords
cut
display substrate
test
main body
test electrodes
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PCT/CN2021/093332
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English (en)
French (fr)
Inventor
龙跃
蔡建畅
魏锋
吴超
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/771,929 priority Critical patent/US20220383784A1/en
Publication of WO2021254040A1 publication Critical patent/WO2021254040A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections

Definitions

  • the embodiments of the present disclosure belong to the field of display technology, and specifically relate to a display substrate, a display panel and a preparation method thereof.
  • Substrate testing generally involves setting test electrodes on the substrate, and the test electrodes are connected to signal lines inside the substrate. During the test, the signal generator feeds the signal into the test electrode by crimping the needle or crimping the peripheral circuit board, so as to achieve the purpose of the test.
  • the embodiments of the present disclosure provide a display substrate, a display panel and a manufacturing method thereof.
  • an embodiment of the present disclosure provides a display substrate, including a body portion, a portion to be cut provided on at least one side of the body portion, and the body portion and the portion to be cut are in the same plane and connected as a whole ; It also includes a plurality of test electrodes, a part of the test electrode is arranged in the body part, and the other part is arranged in the part to be cut.
  • the part to be cut is arranged on one side of the body part.
  • the part to be cut is provided on opposite sides of the body part.
  • test electrodes are distributed on the same side edge of the body part and the part to be cut, and the test electrodes are arranged in a straight line.
  • the main body includes a display area and a frame area, and the frame area is surrounded by a periphery of the display area;
  • the main body includes a binding end, the binding end is arranged in the frame area, and the binding end and the test electrode are located on the same side edge of the main body.
  • test electrodes are distributed at one end of the binding end.
  • test electrodes are distributed at opposite ends of the binding end.
  • test electrode and the binding end are arranged in a straight line, and the extension direction of the straight line is along the arrangement direction of the body part and the part to be cut.
  • test electrodes on the body part are distributed on the same side edge of the body part and are arranged in a straight line; the test electrodes on the part to be cut are distributed on the part of the part to be cut The edges on the same side are arranged in a straight line;
  • test electrodes are located on different side edges of the body part and the part to be cut.
  • the body portion includes a plurality of first sub-layers stacked in sequence, and the test electrodes on the body portion are distributed on the surface layer of the body portion; or, the test electrodes on the body portion The test electrodes are distributed on the first sub-film layer inside the body portion, and the test electrodes are exposed through a first via hole opened in the first sub-film layer covered thereon;
  • the part to be cut includes a plurality of second sub-layers stacked in sequence, and the test electrodes on the part to be cut are distributed on the surface layer of the part to be cut; or, the The test electrode is distributed on the second sub-film layer inside the portion to be cut, and the test electrode is exposed through a second via hole opened in the second sub-film layer covering it.
  • an embodiment of the present disclosure also provides a display panel, including the body portion in the above-mentioned display substrate.
  • embodiments of the present disclosure also provide a method for manufacturing a display panel, including: preparing the above-mentioned display substrate;
  • a module process is performed on the display substrate that has completed the above steps.
  • Figure 1 is a top view of the structure of a test electrode arrangement in the disclosed technology
  • FIG. 2 is a top view of the structure of another test electrode arrangement in the disclosed technology
  • FIG. 3 is a top view of a structure of a display substrate in an embodiment of the disclosure.
  • FIG. 4 is a top view of another display substrate structure in an embodiment of the disclosure.
  • FIG. 5 is a top view of another structure of a display substrate in an embodiment of the disclosure.
  • FIG. 6 is a top view of another structure of a display substrate in an embodiment of the disclosure.
  • FIG. 7 is a cross-sectional view of the structure of the substrate taken along the AA section line shown in FIG. 3;
  • FIG. 8 is a cross-sectional view of another structure of the substrate shown in FIG. 3 along the section line AA.
  • FIG. 9 is a top view of the structure of the display substrate in another embodiment of the disclosure.
  • Body part 101. Display area; 102. Frame area; 11. Binding terminal; 12. First sub-film layer; 2. Part to be cut; 21. Second sub-film layer; 3. Test electrode; 4. The first via; 5. The second via; L, the arrangement direction of the body portion and the portion to be cut.
  • test electrodes 3 As shown in Figure 1, it is a common way of setting test electrodes 3: all the test electrodes 3 are arranged under one side edge of the display substrate, and the binding terminal 11 and the test electrode 3 are usually arranged at the side edge of the display substrate. It is arranged on the outside of the binding terminal 11 away from the display area 101, that is, the test electrodes 3 are arranged on the substrate area other than the display substrate. This method requires extra space on the outside of the edge of one side of the display substrate. For medium and large size products, due to their larger size, when the display substrate is typed on the motherboard, more space will be left in itself, so that sufficient space for the test electrode 3 can be provided.
  • the display substrates on the motherboard are arranged very densely, and the spacing between the display substrates is very small. If this space is vacated to install the test electrodes 3, it will have a greater impact on the number of rows and is not conducive to product cost. .
  • Figure 2 shows another common way of setting the test electrodes 3: the test electrodes 3 are arranged on the left and right sides of the binding terminal 11 at one edge of the display substrate, that is, the test electrodes 3 are all arranged on the display substrate.
  • This method is also not a big problem for medium and large size products, because the left and right space of medium and large size products is large, and the test electrode 3 can be set.
  • the product size determines the small left and right space.
  • the binding ends 11 After the binding ends 11 are set, the left and right sides almost reach the edge of the display substrate, and there is no place to set test electrodes. If the setting is forced at this time, the size of the left and right sides of the display substrate will also increase, which will affect the cutting efficiency of the display substrate.
  • the cutting efficiency of the display substrate is the number of display substrates that can be cut on a motherboard.
  • test electrodes are not a big problem for medium and large-size display substrates, but for small-size products, due to their own size limitations, the setting space of the test electrodes often becomes a bottleneck and affects cutting. efficient.
  • embodiments of the present disclosure provide a display substrate, a display panel and a preparation method thereof.
  • An embodiment of the present disclosure provides a display substrate, as shown in FIG. 3, comprising a body portion 1, a portion to be cut 2 provided on at least one side of the body portion 1, and the body portion 1 and the portion to be cut 2 are in the same plane and connected as One piece; also includes a plurality of test electrodes 3, one part of the test electrode 3 is arranged in the body part 1, and the other part is arranged in the part to be cut 2.
  • the body part 1 refers to the part of the display substrate that needs to be retained when the display panel is subsequently formed;
  • the to-be-cut part 2 refers to the part of the display substrate that needs to be cut off when the display panel is subsequently formed; that is, the part of the body part 1 and the part to be cut 2
  • the boundary line is the cutting line of the display substrate when the display panel is subsequently formed.
  • the test electrode 3 is connected to the circuits inside the display substrate, and is used to introduce test signals to the circuits inside the display substrate to test whether the circuits can work normally.
  • part of the test electrode 3 is provided in the main body 1 and the other part is provided in the part to be cut.
  • the test electrodes 3 are provided in the area of the substrate other than the display substrate, or the test electrodes 3 are all set on the display substrate, part of the test electrode 3 in this embodiment is set on the part of the display substrate that needs to be retained when the display panel is subsequently formed, and the other part is set on the part of the display substrate that needs to be cut off when the display panel is formed later
  • test electrode 3 is no longer useful after testing each circuit in the display substrate, as the portion to be cut 2 is cut off later, part of the test electrode 3 is also cut off, which does not display normal display on the display substrate. Will cause any impact.
  • the to-be-cut portion 2 is separately provided on opposite sides of the main body portion 1.
  • the test electrodes 3 are distributed on the same side edge of the body part 1 and the part to be cut 2, and the test electrodes 3 are arranged in a straight line.
  • the size and shape of the test electrodes 3 are usually the same, so set up, on the one hand, the test electrodes 3 will not occupy too much space on the display substrate, and can simplify the preparation process of the test electrodes 3; on the other hand, the test electrodes 3 are arranged in a straight line , Which can facilitate the input of test signals to the circuits in the display substrate to improve the test efficiency.
  • the main body 1 includes a display area 101 and a frame area 102, the frame area 102 is surrounded by the display area 101; the main body 1 includes a binding end 11, the binding end 11 is arranged in the frame area 102, the binding end 11 and the test electrode 3 are located on the same side edge of the main body 1.
  • the binding terminal 11 and the test electrode 3 can be formed through a single preparation process. For example, a mask is used to form the patterns of the binding terminal 11 and the test electrode 3 at the same time through a mask process, thereby simplifying the display substrate. The preparation process reduces the preparation cost of the display substrate.
  • the test electrodes 3 are distributed on opposite ends of the binding end 11.
  • the test electrodes 3 may be arranged at opposite ends of the binding terminal 11 as shown in FIG. 3.
  • the test electrodes 3 may be arranged at opposite ends of the binding terminal 11 as shown in FIG. 4.
  • the test electrodes 3 may also be distributed at one end of the binding end 11.
  • the body portion 1 area and the to-be-cut portion 2 area at one end of the binding end 11 can fully meet the layout requirements of the test electrodes 3.
  • test electrode 3 and the binding end 11 are arranged in a straight line, and the extension direction of the straight line is along the arrangement direction L of the body part 1 and the part to be cut 2.
  • the binding terminal 11 is used for binding with peripheral circuits, so as to provide the display substrate with control signals during display and so on.
  • the test electrode 3 and the binding terminal 11 will not occupy too much space on the display substrate, and the preparation process of the test electrode 3 and the binding terminal 11 can be simplified; on the other hand, the test electrode 3 and the binding terminal 11
  • the terminals 11 are arranged in a straight line, which can facilitate the input of test signals and display control signals to the circuits in the display substrate, thereby improving test efficiency and binding efficiency.
  • test electrodes 3 on the main body 1 are distributed on the same side edge of the main body 1, and are arranged in a straight line; the test electrodes 3 on the part to be cut 2 are distributed on the The same side edge of the part to be cut 2 is arranged in a straight line; this arrangement, on the one hand, the test electrode 3 will not occupy too much space on the body part 1 and the part to be cut 2, and can simplify the preparation process of the test electrode 3
  • the test electrodes 3 are arranged in a straight line, which can facilitate the input of test signals to the circuits in the display substrate, thereby improving the test efficiency.
  • the test electrode 3 is located on different side edges of the body part 1 and the part to be cut 2.
  • test electrodes 3 can be laid out on the edges of different layers of the body part 1 and the to-be-cut part 2 according to the arrangement of the circuits inside the display substrate, thereby preventing the concentration of the test electrodes 3 when the number of test electrodes 3 is large.
  • the mutual interference between the test signals caused by the arrangement improves the test quality.
  • the main body 1 includes a plurality of first sub-film layers 12 sequentially stacked, and the test electrodes 3 on the main body 1 are distributed on the surface of the main body 1;
  • the part 2 includes a plurality of second sub-layers 21 stacked in sequence, and the test electrodes 3 on the part to be cut 2 are distributed on the surface of the part to be cut 2.
  • test electrodes 3 on the main body 1 are distributed on the first sub-film layer 12 inside the main body 1, and the test electrodes 3 are opened on the The first via hole 4 in the first sub-film layer 12 is exposed; the test electrode 3 on the portion to be cut 2 is distributed on the second sub-film layer 21 inside the portion to be cut 2, and the test electrode 3 is covered by The second via 5 in the upper second sub-film layer 21 is exposed.
  • test electrodes 3 arranged inside the body part 1 and the part to be cut 2 are respectively exposed through the first via 4 and the second via 5, which can facilitate the signal test of the display substrate by crimping or crimping the peripheral circuit board
  • the signal is fed to the test electrode 3 in a way, so as to realize the signal test on the display substrate.
  • the display substrate provided in the embodiments of the present disclosure may be an LCD (liquid crystal) display substrate, an OLED (organic electroluminescence) display substrate, an LED (light emitting diode) display substrate, or other display substrates.
  • LCD liquid crystal
  • OLED organic electroluminescence
  • LED light emitting diode
  • the embodiment of the present disclosure also provides a display substrate.
  • the difference from the above-mentioned embodiment is that, as shown in FIG. 9, the to-be-cut portion 2 is provided on one side of the main body portion 1.
  • one part of the test electrode is provided on the main body part and the other part is provided on the part to be cut.
  • the test electrodes are provided on the substrate area other than the display substrate, or
  • the condition that the test electrodes are all arranged on the display substrate can optimize the layout of the test electrodes, reduce the space requirements of the test electrodes, and ensure that a motherboard can be cut to form a larger or largest number of display substrates, thereby improving or eliminating
  • the arrangement of the test electrodes has an adverse effect on the cutting efficiency of the display substrate.
  • the embodiments of the present disclosure also provide a display panel, which includes the body portion in the display substrate in the above-mentioned embodiments.
  • the display substrate in the above embodiment can be cut to remove the to-be-cut portion by cutting, and the remaining body portion is passed through the subsequent module process to form the display panel in this embodiment.
  • this embodiment also provides a method for manufacturing a display panel, including: preparing the display substrate in the above-mentioned embodiment; The cutting part is cut off; the module process is performed on the display substrate after the above steps are completed.
  • the display panel provided by the exemplary embodiment of the present invention may be any product or component with display function such as LCD panel, LCD TV, OLED panel, OLED TV, LED panel, LED TV, display, mobile phone, navigator, etc.

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Abstract

本公开实施例提供一种显示基板、显示面板及其制备方法。该显示基板包括本体部，设置在所述本体部至少一侧的待切部，所述本体部与所述待切部处于同一平面内且连接为一体；还包括多个测试电极，所述测试电极一部分设置在所述本体部，另一部分设置在所述待切部。该显示面板包括上述显示基板中的本体部。

Description

一种显示基板、显示面板及其制备方法 技术领域
本公开实施例属于显示技术领域，具体涉及一种显示基板、显示面板及其制备方法。
背景技术
为了避免不良基板投入模组工艺，节省模组资材，在基板制备段工艺完成之后，需要进行基板测试。基板测试一般是在基板上设置测试电极，测试电极连接基板内部的信号线。测试时信号发生器通过压针或者压接外围电路板的方式将信号给入测试电极，从而达到测试的目的。
发明内容
本公开实施例提供一种显示基板、显示面板及其制备方法。
第一方面，本公开实施例提供一种显示基板，包括本体部，设置在所述本体部至少一侧的待切部，所述本体部与所述待切部处于同一平面内且连接为一体；还包括多个测试电极，所述测试电极一部分设置在所述本体部，另一部分设置在所述待切部。
可选地，所述待切部设置于所述本体部的一侧。
可选地，所述待切部分设于所述本体部的相对两侧。
可选地，所述测试电极分布于所述本体部和所述待切部的同一侧边缘，且所述测试电极呈直线排布。
可选地，所述本体部包括显示区和边框区，所述边框区围设于所述显示区外围；
所述本体部包括绑定端，所述绑定端设置于所述边框区内，所述绑定端与所述测试电极位于所述本体部的同一侧边缘。
可选地，沿所述本体部与所述待切部的排布方向，所述测试电极分布于所述绑定端的一端。
可选地，沿所述本体部与所述待切部的排布方向，所述测试电极分布于所述绑定端的相对两端。
可选地，所述测试电极与所述绑定端呈直线排布，所述直线的延伸方向沿所述本体部与所述待切部的排布方向。
可选地，所述本体部上的所述测试电极分布于所述本体部的同一侧边缘，且呈直线排布；所述待切部上的所述测试电极分布于所述待切部的同一侧边缘，且呈直线排布；
所述测试电极位于所述本体部和所述待切部的不同侧边缘。
可选地，所述本体部包括多个依次叠置的第一子膜层，所述本体部上的所述测试电极分布于所述本体部的表层；或者，所述本体部上的所述测试电极分布于所述本体部内部的所述第一子膜层上，且所述测试电极通过开设在覆盖在其上的所述第一子膜层中的第一过孔暴露；
所述待切部包括多个依次叠置的第二子膜层，所述待切部上的所述测试电极分布于所述待切部的表层；或者，所述待切部上的所述测试电极分布于所述待切部内部的所述第二子膜层上，且所述测试电极通过开设在覆盖在其上的所述第二子膜层中的第二过孔暴露。
第二方面，本公开实施例还提供一种显示面板，包括上述显示基板中的本体部。
第三方面，本公开实施例还提供一种显示面板的制备方法，包括：制备上述显示基板；
将所述显示基板沿其本体部与待切部的交界线进行切割，将所述待切部切掉；
对完成上述步骤的所述显示基板进行模组工艺。
附图说明
附图用来提供对本公开实施例的进一步理解，并且构成说明书的一部分，与本公开实施例一起用于解释本公开，并不构成对本公开的限制。通 过参考附图对详细示例实施例进行描述，以上和其它特征和优点对本领域技术人员将变得更加显而易见，在附图中：
图1为公开技术中一种测试电极设置方式的结构俯视图；
图2为公开技术中另一种测试电极设置方式的结构俯视图；
图3为本公开实施例中一种显示基板的结构俯视图；
图4为本公开实施例中另一种显示基板的结构俯视图；
图5为本公开实施例中又一种显示基板的结构俯视图；
图6为本公开实施例中又一种显示基板的结构俯视图；
图7为图3中显示基板沿AA剖切线的结构剖视图；
图8为图3中显示基板沿AA剖切线的又一种结构剖视图。
图9为本公开另一实施例中显示基板的结构俯视图。
其中附图标记为：
1、本体部；101、显示区；102、边框区；11、绑定端；12、第一子膜层；2、待切部；21、第二子膜层；3、测试电极；4、第一过孔；5、第二过孔；L、本体部与待切部的排布方向。
具体实施方式
为使本领域技术人员更好地理解本公开实施例的技术方案，下面结合附图和具体实施方式对本公开实施例提供的一种显示基板、显示面板及其制备方法作进一步详细描述。
在下文中将参考附图更充分地描述本公开实施例，但是所示的实施例可以以不同形式来体现，且不应当被解释为限于本公开阐述的实施例。反之，提供这些实施例的目的在于使本公开透彻和完整，并将使本领域技术人员充分理解本公开的范围。
本公开实施例不限于附图中所示的实施例，而是包括基于制造工艺而形成的配置的修改。因此，附图中例示的区具有示意性属性，并且图中所示区的形状例示了区的具体形状，但并不是旨在限制性的。
如图1所示，为一种常见的测试电极3设置方式：所有的测试电极3都设置在显示基板一侧边缘的下方，显示基板的该侧边缘处通常设置绑定端11，测试电极3设置在绑定端11的背离显示区101的外侧，即测试电极3都设置在显示基板以外的基板区域。这种方法需要在显示基板一侧边缘的外侧占用额外的空间。对于中大尺寸产品而言，由于自身尺寸较大，因此在显示基板在母板上排版的时候，本身就会剩余更多的空间，因此可以提供足够的测试电极3设置空间。但是对于小尺寸产品而言，母板上显示基板排布非常密集，显示基板之间的间距很小，如果空出这种空间来设置测试电极3，对于排片数量影响较大，不利于产品成本。
图2所示是另一种常见的测试电极3设置方式：将测试电极3设置于显示基板一侧边缘处绑定端11的左右两边，即测试电极3都设置在显示基板上。这种方法同样对于中大尺寸产品问题不大，因为中大尺寸产品左右空间较大，能够设置测试电极3。而对于小尺寸产品，其产品尺寸决定了左右空间较小，在设置了绑定端11之后，左右两边几乎到达显示基板的边缘，没有地方再设置测试电极。此时若强行设置，同样也会使显示基板的左右两边尺寸增大，影响显示基板的切割效率。其中，显示基板的切割效率为一块母板上所能切割获得的显示基板的数量。
综上可见，目前的测试电极设置方式对于中大尺寸显示基板没有太大的问题，但是对于小尺寸产品而言，因为受到自身尺寸的限制，往往会因为测试电极的设置空间成为瓶颈而影响切割效率。
针对上述测试电极的设置方式对于中小尺寸产品而言，因为设置空间有限而容易影响显示基板的切割效率的问题，本公开实施例提供一种显示基板、显示面板及其制备方法。
本公开实施例提供一种显示基板，如图3所示，包括本体部1，设置在本体部1至少一侧的待切部2，本体部1与待切部2处于同一平面内且连接 为一体；还包括多个测试电极3，测试电极3一部分设置在本体部1，另一部分设置在待切部2。
其中，本体部1指该显示基板在后续形成显示面板时需要保留的部分；待切部2指该显示基板在后续形成显示面板时需要切割去掉的部分；即本体部1与待切部2的交界线为该显示基板在后续形成显示面板时的切割线。测试电极3连接显示基板内部的各电路，用于向该显示基板内部的各电路引入测试信号，以测试各电路是否能正常工作。
该显示基板，通过将测试电极3一部分设置在本体部1，另一部分设置在待切部2，相对于目前公开技术中要么将测试电极3都设置在显示基板以外的基板区域，要么将测试电极3都设置在显示基板上的情况，本实施例中的测试电极3一部分设置在显示基板后续形成显示面板时需要保留的部分上，另一部分设置在显示基板后续形成显示面板时需要切割去掉的部分上，能够优化测试电极3的设置布局，降低测试电极3对于排布空间的要求，确保一块母板能够切割形成较大数量或者最大数量的显示基板，从而改善或消除测试电极3的排布对显示基板切割效率的不良影响。另外，由于测试电极3对显示基板中的各电路进行测试之后便不再有用，所以后续随着待切部2被切掉，部分测试电极3也被切掉对该显示基板的正常显示并不会造成任何影响。
可选地，待切部2分设于本体部1的相对两侧。
可选地，测试电极3分布于本体部1和待切部2的同一侧边缘，且测试电极3呈直线排布。测试电极3的大小形状通常相同，如此设置，一方面，测试电极3不会占用显示基板上太大的空间，且能简化测试电极3的制备工艺；另一方面，测试电极3呈直线排布，能够方便向显示基板内的各电路输入测试信号，提升测试效率。
可选地，本体部1包括显示区101和边框区102，边框区102围设于显示区101外围；本体部1包括绑定端11，绑定端11设置于边框区102内， 绑定端11与测试电极3位于本体部1的同一侧边缘。如此设置，能使绑定端11与测试电极3通过一次制备工艺形成，如采用一个掩膜板通过一次掩膜工艺同时制备形成绑定端11和测试电极3的图形，从而简化了显示基板的制备工艺，降低了显示基板的制备成本。
可选地，沿本体部1与待切部2的排布方向L，测试电极3分布于绑定端11的相对两端。对于测试电极3数量较多的显示基板，测试电极3可以如图3所示排布在绑定端11的相对两端。对于测试电极3数量不是很多的显示基板，测试电极3可以如图4所示排布在绑定端11的相对两端。
可选地，如图5所示，沿本体部1与待切部2的排布方向L，测试电极3也可以分布于绑定端11的一端。如此设置，对于测试电极3数量不是很多的显示基板，绑定端11一端的本体部1区域和待切部2区域完全能够满足测试电极3的布局需求。
可选地，测试电极3与绑定端11呈直线排布，直线的延伸方向沿本体部1与待切部2的排布方向L。绑定端11用于与外围电路绑定，以便为显示基板提供显示时的控制信号等。如此设置，一方面，测试电极3和绑定端11不会占用显示基板上太大的空间，且能简化测试电极3和绑定端11的制备工艺；另一方面，测试电极3与绑定端11呈直线排布，能够方便向显示基板内的各电路输入测试信号和显示时的控制信号，提升测试效率以及绑定效率。
可选地，如图6所示，也可以设置为：本体部1上的测试电极3分布于本体部1的同一侧边缘，且呈直线排布；待切部2上的测试电极3分布于待切部2的同一侧边缘，且呈直线排布；如此设置，一方面，测试电极3不会占用本体部1和待切部2上太大的空间，且能简化测试电极3的制备工艺；另一方面，测试电极3呈直线排布，能够方便向显示基板内的各电路输入测试信号，提升测试效率。测试电极3位于本体部1和待切部2的不同侧边缘。如此设置，能够根据显示基板内部各电路的排布相应地在本 体部1和待切部2的不同层边缘布局测试电极3，从而在测试电极3数量较多的情况下，防止测试电极3集中排布所导致的测试信号之间的相互干扰，提升测试质量。
可选地，本实施例中，如图7所示，本体部1包括多个依次叠置的第一子膜层12，本体部1上的测试电极3分布于本体部1的表层；待切部2包括多个依次叠置的第二子膜层21，待切部2上的测试电极3分布于待切部2的表层。
可选地，如图8所示，也可以设置为：本体部1上的测试电极3分布于本体部1内部的第一子膜层12上，且测试电极3通过开设在覆盖在其上的第一子膜层12中的第一过孔4暴露；待切部2上的测试电极3分布于待切部2内部的第二子膜层21上，且测试电极3通过开设在覆盖在其上的第二子膜层21中的第二过孔5暴露。设置在本体部1内部和待切部2内部的测试电极3分别通过第一过孔4和第二过孔5暴露，能够方便在对显示基板进行信号测试时通过压针或者压接外围电路板的方式将信号给入测试电极3，从而实现对显示基板的信号测试。
本公开实施例中所提供的显示基板可以是LCD(液晶)显示基板，也可以是OLED(有机电激发光)显示基板、LED(发光二极管)显示基板或者其他的显示基板。
本公开实施例还提供一种显示基板，与上述实施例中不同的是，如图9所示，待切部2设置于本体部1的一侧。
本实施例中显示基板的其他结构与上述实施例中相同，此处不再赘述。
上述实施例中所提供的显示基板，通过将测试电极一部分设置在本体部，另一部分设置在待切部，相对于目前公开技术中要么将测试电极都设置在显示基板以外的基板区域，要么将测试电极都设置在显示基板上的情况，能够优化测试电极的设置布局，降低测试电极对于排布空间的要求， 确保一块母板能够切割形成较大数量或者最大数量的显示基板，从而改善或消除测试电极的排布对显示基板切割效率的不良影响。
本公开实施例还提供一种显示面板，包括上述实施例中的显示基板中的本体部。
其中，上述实施例中的显示基板通过切割能将其中的待切部切割去掉，剩余的本体部部分通过后续模组工艺后形成本实施例中的显示面板。
基于显示面板的上述结构，本实施例还提供一种显示面板的制备方法，包括：制备上述实施例中的显示基板；将显示基板沿其本体部与待切部的交界线进行切割，将待切部切掉；对完成上述步骤的显示基板进行模组工艺。
通过采用上述实施例中显示基板中的本体部，能够避免不良显示基板投入模组工艺，节省模组资材，同时还能确保显示面板能正常显示。
本发明示意性实施例所提供的显示面板可以为LCD面板、LCD电视、OLED面板、OLED电视、LED面板、LED电视、显示器、手机、导航仪等任何具有显示功能的产品或部件。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (12)

  1. 一种显示基板，其特征在于，包括本体部，设置在所述本体部至少一侧的待切部，所述本体部与所述待切部处于同一平面内且连接为一体；还包括多个测试电极，所述测试电极一部分设置在所述本体部，另一部分设置在所述待切部。
  2. 根据权利要求1所述的显示基板，其特征在于，所述待切部设置于所述本体部的一侧。
  3. 根据权利要求1所述的显示基板，其特征在于，所述待切部分设于所述本体部的相对两侧。
  4. 根据权利要求2或3所述的显示基板，其特征在于，所述测试电极分布于所述本体部和所述待切部的同一侧边缘，且所述测试电极呈直线排布。
  5. 根据权利要求4所述的显示基板，其特征在于，所述本体部包括显示区和边框区，所述边框区围设于所述显示区外围；
    所述本体部包括绑定端，所述绑定端设置于所述边框区内，所述绑定端与所述测试电极位于所述本体部的同一侧边缘。
  6. 根据权利要求5所述的显示基板，其特征在于，沿所述本体部与所述待切部的排布方向，所述测试电极分布于所述绑定端的一端。
  7. 根据权利要求5所述的显示基板，其特征在于，沿所述本体部与所 述待切部的排布方向，所述测试电极分布于所述绑定端的相对两端。
  8. 根据权利要求6或7所述的显示基板，其特征在于，所述测试电极与所述绑定端呈直线排布，所述直线的延伸方向沿所述本体部与所述待切部的排布方向。
  9. 根据权利要求2或3所述的显示基板，其特征在于，所述本体部上的所述测试电极分布于所述本体部的同一侧边缘，且呈直线排布；所述待切部上的所述测试电极分布于所述待切部的同一侧边缘，且呈直线排布；
    所述测试电极位于所述本体部和所述待切部的不同侧边缘。
  10. 根据权利要求1所述的显示基板，其特征在于，所述本体部包括多个依次叠置的第一子膜层，所述本体部上的所述测试电极分布于所述本体部的表层；或者，所述本体部上的所述测试电极分布于所述本体部内部的所述第一子膜层上，且所述测试电极通过开设在覆盖在其上的所述第一子膜层中的第一过孔暴露；
    所述待切部包括多个依次叠置的第二子膜层，所述待切部上的所述测试电极分布于所述待切部的表层；或者，所述待切部上的所述测试电极分布于所述待切部内部的所述第二子膜层上，且所述测试电极通过开设在覆盖在其上的所述第二子膜层中的第二过孔暴露。
  11. 一种显示面板，其特征在于，包括权利要求1-10任意一项所述的显示基板中的本体部。
  12. 一种显示面板的制备方法，其特征在于，包括：制备权利要求1-10任意一项所述的显示基板；
    将所述显示基板沿其本体部与待切部的交界线进行切割，将所述待切部切掉；
    对完成上述步骤的所述显示基板进行模组工艺。
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Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
CN111653548A (zh) * 2020-06-18 2020-09-11 京东方科技集团股份有限公司 一种显示基板、显示面板及其制备方法
CN112764279B (zh) * 2021-02-22 2022-07-01 厦门高卓立科技有限公司 一种带有划片防呆符号的液晶显示器面板作业方法

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060114864A (ko) * 2005-05-03 2006-11-08 엘지.필립스 엘시디 주식회사 액정표시장치 및 그 제조방법
JP2009036938A (ja) * 2007-08-01 2009-02-19 Mitsubishi Electric Corp 表示装置
CN101562185A (zh) * 2008-04-14 2009-10-21 中华映管股份有限公司 薄膜晶体管阵列基板
US20110096449A1 (en) * 2009-10-26 2011-04-28 Mi-Sun Lee Substrate for a Display Device and Method of Manufacturing the Same
CN102736336A (zh) * 2012-04-30 2012-10-17 友达光电股份有限公司 光调变面板的母板、光调变面板及立体显示装置
CN108490654A (zh) * 2018-04-03 2018-09-04 京东方科技集团股份有限公司 一种阵列基板、阵列基板母板及显示装置
CN109521584A (zh) * 2018-11-16 2019-03-26 合肥京东方显示技术有限公司 一种显示母板、阵列基板及其制备方法和显示面板
CN111007686A (zh) * 2019-11-14 2020-04-14 Tcl华星光电技术有限公司 阵列基板、显示面板及制备方法
CN111653548A (zh) * 2020-06-18 2020-09-11 京东方科技集团股份有限公司 一种显示基板、显示面板及其制备方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3484705B2 (ja) * 1991-07-18 2004-01-06 ソニー株式会社 半導体ウエハ
JPH07302773A (ja) * 1994-05-06 1995-11-14 Texas Instr Japan Ltd 半導体ウエハ及び半導体装置
JPH10268273A (ja) * 1997-03-24 1998-10-09 Hitachi Ltd 液晶表示基板
KR100828294B1 (ko) * 2004-04-29 2008-05-07 엘지디스플레이 주식회사 액정표시장치용 기판 및 이를 이용한 액정표시장치 제조방법
TW200937069A (en) * 2008-02-25 2009-09-01 Chunghwa Picture Tubes Ltd Active device array substrate and liquid crystal display panel
CN100580465C (zh) * 2008-04-08 2010-01-13 友达光电股份有限公司 面板测试电路结构
KR20090126052A (ko) * 2008-06-03 2009-12-08 삼성전자주식회사 박막 트랜지스터 기판 및 이를 표함하는 표시 장치
JP4864126B2 (ja) * 2009-08-26 2012-02-01 ルネサスエレクトロニクス株式会社 Ｔｃｐ型半導体装置
KR102190339B1 (ko) * 2014-02-25 2020-12-14 삼성디스플레이 주식회사 표시 장치
KR102181165B1 (ko) * 2014-03-04 2020-11-23 삼성디스플레이 주식회사 박막 트랜지스터 기판 및 그것을 이용한 액정 표시 장치의 제조 방법
US9356087B1 (en) * 2014-12-10 2016-05-31 Lg Display Co., Ltd. Flexible display device with bridged wire traces
CN107300793A (zh) * 2017-06-30 2017-10-27 厦门天马微电子有限公司 显示面板及显示装置
CN107658234B (zh) * 2017-09-21 2019-10-25 上海天马微电子有限公司 显示面板及显示装置
CN108919535B (zh) * 2018-08-30 2022-07-05 京东方科技集团股份有限公司 显示基板母板、显示基板及其制造方法、显示装置
CN109449140B (zh) * 2018-10-31 2020-09-11 昆山国显光电有限公司 显示面板及母板
CN109659277B (zh) * 2018-12-18 2020-12-04 武汉华星光电半导体显示技术有限公司 显示面板及其制作方法
CN111129090B (zh) * 2019-12-18 2022-05-31 武汉华星光电半导体显示技术有限公司 显示面板及其测试方法
CN111190312A (zh) * 2020-01-08 2020-05-22 深圳市华星光电半导体显示技术有限公司 一种阵列基板及阵列基板的电学特性的测量方法
KR20220077316A (ko) * 2020-12-01 2022-06-09 삼성디스플레이 주식회사 표시 장치 및 표시 장치의 패드 접속 검사 방법

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060114864A (ko) * 2005-05-03 2006-11-08 엘지.필립스 엘시디 주식회사 액정표시장치 및 그 제조방법
JP2009036938A (ja) * 2007-08-01 2009-02-19 Mitsubishi Electric Corp 表示装置
CN101562185A (zh) * 2008-04-14 2009-10-21 中华映管股份有限公司 薄膜晶体管阵列基板
US20110096449A1 (en) * 2009-10-26 2011-04-28 Mi-Sun Lee Substrate for a Display Device and Method of Manufacturing the Same
CN102736336A (zh) * 2012-04-30 2012-10-17 友达光电股份有限公司 光调变面板的母板、光调变面板及立体显示装置
CN108490654A (zh) * 2018-04-03 2018-09-04 京东方科技集团股份有限公司 一种阵列基板、阵列基板母板及显示装置
CN109521584A (zh) * 2018-11-16 2019-03-26 合肥京东方显示技术有限公司 一种显示母板、阵列基板及其制备方法和显示面板
CN111007686A (zh) * 2019-11-14 2020-04-14 Tcl华星光电技术有限公司 阵列基板、显示面板及制备方法
CN111653548A (zh) * 2020-06-18 2020-09-11 京东方科技集团股份有限公司 一种显示基板、显示面板及其制备方法

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