WO2013013362A1 - 消除接触孔工艺中桥接的方法 - Google Patents

消除接触孔工艺中桥接的方法 Download PDF

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WO2013013362A1
WO2013013362A1 PCT/CN2011/001977 CN2011001977W WO2013013362A1 WO 2013013362 A1 WO2013013362 A1 WO 2013013362A1 CN 2011001977 W CN2011001977 W CN 2011001977W WO 2013013362 A1 WO2013013362 A1 WO 2013013362A1
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protective film
adaptive protective
adaptive
chamber
film
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PCT/CN2011/001977
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English (en)
French (fr)
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王桂磊
李俊峰
赵超
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中国科学院微电子研究所
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Priority to US13/497,768 priority Critical patent/US9224589B2/en
Publication of WO2013013362A1 publication Critical patent/WO2013013362A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/308—Oxynitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/345—Silicon nitride
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • C23C16/402—Silicon dioxide
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • C23C16/4404—Coatings or surface treatment on the inside of the reaction chamber or on parts thereof
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics

Definitions

  • the present invention relates to the field of semiconductor integrated circuit fabrication, and more particularly to a method of eliminating contact bridges in a contact hole process. Background technique
  • the semiconductor integrated circuit is advanced by the timetable predicted by Moore's Law, and the feature size of the device is developed to a small-sized structure, and the integration degree is continuously improved.
  • the feature size continues to be subtle, the integration of individual chips has reached 10 8 to 10 9 , and at the same time, the requirements for the production process are becoming higher and higher, thus reducing the size and density of defects in the manufacturing process. It becomes very crucial.
  • a 1 micron dust on a 100 micron transistor may not be a problem, but it can be a fatal defect that can cause device failure for a 1 micron transistor, especially for chemical vapor deposition (CVD) thin film processes. Higher requirements.
  • the 10 defects of the same size under the same deposited film process have less than 2% effect on the yield of 90nm products, but the effect on the yield of 65nm products is more than 30%.
  • the defects caused by the high-density plasma chemical vapor deposition (HDP CVD) process are the most serious, such as the HDP CVD process of shallow trench isolation (STI) media, as an interlayer dielectric.
  • the HDP CVD process of the PSG as the ILD will produce block defects if it is not well controlled, causing bridging of subsequent processes, namely: Contact Bridge, causing product failure, see Figure 1-4 for details.
  • Figure 1 shows a typical CMOS structure with ILD.
  • the village bottom 10 has an N well 11 and a P well 12, and the STI structure 13 isolates the N well 11 and the P well 12.
  • the ILD 14 formed by HDP CVD is overlying the strained SiN-wrapped NMOS and PMOS, and there is a defect 15 in the ILD 14, such as the undesired smear particles in the process.
  • CMP chemical machine Mechanical polishing
  • a conductive material filling such as Ti/TiN, is performed to form the contact plug 19 in the contact hole 17, but at the same time a portion of the conductive material is left in the hole 16, thereby forming the bridge member 18. Due to the storage of the bridge member 18, the plurality of contact plugs 17 are bridged and short-circuited, causing circuit failure.
  • the present invention provides a method for eliminating bridging in a contact hole process, comprising: cleaning a reaction chamber of a high density plasma chemical vapor deposition apparatus, the cleaning process comprising setting a cleaning menu, in the above cleaning menu, After removing the SiO 2 film grown on the cavity wall of the reaction chamber, a multi-step adaptive protective film deposition process is provided to form a laminated adaptive protective film on the cavity wall, the laminated adaptive protective film protection
  • the chamber wall prevents the chamber wall from being damaged by the plasma during the high density plasma chemical vapor deposition process.
  • the material of the adaptive protective film is one or more of SiO 2 , Si 3 N 4 , and SiON.
  • the laminated adaptive protective film is a laminate formed of one or more of SiO 2 , Si 3 N 4 , and SiON films; preferably, the laminated adaptive protective film is a plurality of layers. si0 2 formed laminate; more preferably, the adaptive protective laminate film is a multilayer laminate formed of a silicon-rich si0 2, a refractive index of silicon-rich si0 2 greater than 1.5, or the protective film is a multilayer stack adaptive laminate enriched Si0 2 is formed, the refractive index of oxygen-rich Si0 2 is less than 1.5; wherein the process of forming the protective film in the adaptive multi-step alternating the ratio of SiH 4 and 0 2 gas flow the deposited film to obtain Film coverage of different refractive index components improves the compactness of the adaptive protective film.
  • the parameters of the RF power of the film deposition are alternately changed to improve the uniformity and compactness of the adaptive protective film; preferably, the RF power is changed.
  • Parameters include changing the plasma distribution concentration and direction.
  • the side wall of the chamber is subjected to an increase in roughness during the maintenance of the cavity to improve surface performance and improve The adhesion of the protective protective film.
  • the invention comprises a cleaning menu of a multi-step adaptive protective film deposition process, forming a laminated adaptive protective film on the sidewall of the HDP CVD equipment chamber, and the laminated adaptive protective film has good adhesion, compactness and uniformity. It protects the sidewalls of the HDP CVD equipment chamber from plasma damage, avoids the generation of defective particles, improves the technical yield of the HDP CVD process, and eliminates bridging in the contact hole process. . DRAWINGS
  • FIG. 1-4 Schematic diagram of the bridge phenomenon
  • FIG. 5-6 Schematic diagram of the cause of the defect
  • Figure 7 is a laminated protective layer provided by the present invention.
  • Figure 8 is a polished laminated protective layer provided by the present invention.
  • Embodiments of the present invention relate to a dry cleaning process after dielectric thin film deposition using a high density plasma chemical vapor deposition (HDP CVD) method to achieve a perfect particle surface demand on a deposited wafer surface, thereby improving the HDP CVD process.
  • HDP CVD high density plasma chemical vapor deposition
  • a semiconductor substrate 10 is first provided having an N well 11 and a P well 12 on the semiconductor substrate 10, and an isolation structure 13, such as an STI structure, isolating the N well 1 1 and the P well 12 .
  • Source and drain electrodes 22 of NMOS and PMOS are formed in the well region, and a gate electrode 21 is formed on the substrate 10.
  • the NMOS and PMOS are then conformally covered with strained SiN.
  • an interlayer dielectric layer (ILD) 14 is formed over the strained SiN by the HDP CVD process to cover the NMOS and PMOS regions.
  • a plurality of contact holes 17 are formed, which pass through the ILD 14 to extract the source and drain electrodes and the gate electrode.
  • HDP CVD deposition technology can generate high-density plasma (ICP) by inductive coupling at low pressure, or generate electron cyclotron resonance.
  • High-density plasma (ECR) other methods can also be used to generate high-density plasmas, such as surface waves, whistle waves, and the like.
  • HDP CVD is a process in which deposition and sputtering (etching) are performed simultaneously
  • a high-density plasma also has a certain bombardment effect on the reaction chamber.
  • a side wall 1 of the reaction chamber is formed with a film 2, which is formed during the HDP CVD process.
  • the surface properties of the cavity are caused by long-time plasma bombardment. Declining, in addition to the film 2, the compactness and uniformity are poor, and the surface of the plasma 3 bombarding the film 2 may hit a defect 3 such as a granular shape from the film 2 (see Fig. 6) and It falls in the ILD14 layer, resulting in the situation shown in Figure 1.
  • the IDL 14 in order to reduce the occurrence of defects and improve the yield of the semiconductor device, in preparing the desired film, for example, the IDL 14 in the present embodiment, it is necessary to perform a cleaning process to eliminate factors that may cause defects.
  • the method of the present invention for eliminating bridging in the contact hole process includes a newly developed cleaning process.
  • the cleaning process includes setting a cleaning menu, and in the above cleaning menu, setting a multi-step adaptive protective film deposition process for forming a laminated adaptive protective film 2 on the sidewall of the chamber, see FIG. 7, the laminated adaptive protective film 2 protects the side of the chamber The walls prevent the sidewalls of the chamber from being damaged by the plasma during the high density plasma chemical vapor deposition process.
  • an adaptive protective film is deposited on the cavity wall by performing an adaptive protective film deposition (also referred to as a film deposition in the process) in the cleaning menu to protect the cavity wall. And maintain a stable reaction environment for the growth of the next or next batch of wafers.
  • an adaptive protective film deposition also referred to as a film deposition in the process
  • the material of the adaptive protective film is one or more of SiO 2 , Si 3 N 4 , and SiON.
  • the specific material to be used depends on the ILD layer, and the material of the adaptive protective film is the same as the ILD material. Therefore, the laminated adaptive protective film
  • the film 2 is a laminate formed of one or more of SiO 2 , Si 3 N 4 , and SiON films; preferably, when the ILD 14 is a SiO 2 layer, the laminated adaptive protective film 2 is formed of a plurality of layers of SiO 2 .
  • the laminated adaptive protective film 2 is a laminate formed of a plurality of silicon-rich SiO 2 , and the refractive index of the silicon-rich SiO 2 is greater than 1.5, or the laminated adaptive protective film 2 is multi-layer oxygen-enriched si0 2 formed in the laminate, the oxygen-rich si0 2 is less than a refractive index of 1.5.
  • the ratio of the flow rate of the SiH 4 and the 0 2 gas deposited by the film is alternately changed to obtain a film coverage of the different refractive index components, thereby improving the compactness of the adaptive protective film.
  • the parameters of the radio frequency (RF) power of the HDP CVD film deposition are alternately changed to improve the adhesion and uniformity of the adaptive protective film 2.
  • the altered radio frequency power parameters include varying the plasma distribution concentration and direction.
  • the sidewall of the chamber is subjected to an increased roughness scratch during the maintenance of the cavity to improve surface properties.
  • Improve the adhesion of the adaptive protective film Referring to Figure 8, the scraped film has a rough surface 5, which can provide good adhesion, improve the adhesion of the entire laminate adaptive protective film 2, and make it less likely to be detached by plasma bombardment, thereby further Reduce the possibility of defects.
  • the cleaning process of the present invention is performed, the surface of the ILD 14 is not defective, thereby eliminating the bridging phenomenon which may occur in the subsequent contact hole filling process.
  • a conductive material filling such as Ti/TiN is performed, and a contact plug 19 is formed in the contact hole 17.
  • the bridge member 18 as shown in Fig. 4 does not exist in the semiconductor device, so that the circuit function is secured and the yield of the integrated circuit is improved.
  • a cleaning menu including a multi-step adaptive protective film deposition process is provided, and a laminated adaptive protective film is formed on a sidewall of a HDP CVD equipment chamber, and the laminated adaptive protective film has good compactness and Uniformity protects the sidewalls of the HDP CVD equipment chamber from plasma damage, avoids the generation of defective particles, improves the technical yield of the HDP CVD process, and eliminates bridging in the contact hole process .

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Abstract

一种消除了接触孔工艺中桥接的方法，提供了括多步适应性保护薄膜沉积工艺的清洁菜单，在HDP CVD设备腔室的侧壁上形成叠层适应性保护薄膜，叠层适应性保护薄膜具有良好的粘附性、致密性和均匀性，可以保护HDP CVD设备腔室的侧壁，使其不会受到等离子体的伤害，还避免了缺陷颗粒的产生，提高了HDP CVD工艺的技术良率，消除了接触孔工艺中的桥接现象。

Description

消除接触孔工艺中桥接的方法 优先权要求
本申请要求了 201 1年 7月 25 日提交的、 申请号为 201 1 10208407.X、 发明名称为 "消除接触孔工艺中桥接的方法" 的中国专利申请的优先 权， 其全部内容通过引用结合在本申请中。 技术领域
本发明涉及半导体集成电路制造领域， 特别地， 涉及一种消除接 触孔工艺中桥接 ( contact bridge ) 的方法。 背景技术
半导体集成电路以摩尔定律所预测的时间表向前推进， 器件的特 征尺寸向小尺寸结构发展， 集成度不断提高。 随着特征尺寸的不断细 微化， 单个芯片的集成度已高达 108〜109 , 而与此同时， 对生产工艺的 要求也越来越高， 因此， 在制造工艺中减少缺陷的尺寸和密度就变得 非常关键。 在尺寸 100微米的晶体管上面有一个 1 微米的灰尘可能不 是问题， 但是对于一个 1 微米的晶体管来说会是一个导致器件失效的 致命缺陷， 所以特别是对化学气相淀积 （CVD ) 薄膜制程提出了更高 的要求。 相同的淀积薄膜工艺下同样尺寸的 10个缺陷， 对 90nm产品 良率的影响不到 2% , 可是对 65nm产品良率的影响却大于 30%以上。
在目前的 CVD 制程中， 由高密度等离子体化学气相淀积 （HDP CVD )制程所带来的缺陷问题是最严重的， 例如浅沟槽隔离 （STI )介 质的 HDP CVD制程、 作为层间介质层 （ILD ) 的磷硅玻璃 （ PSG ) 的 HDP CVD制程等。 其中，作为 ILD的 PSG的 HDP CVD工艺如果控制 不好将会产生块状缺陷， 引起后续制程的桥接， 即： Contact Bridge, 造成产品失效， 具体参见附图 1 -4。
附图 1显示了具有 ILD的典型的 CMOS结构。 村底 10上具有 N 阱 1 1和 P阱 12，STI结构 13将 N阱 1 1和 P阱 12隔离。 NMOS和 PMOS 的源漏极 22 , 栅极 21。 由 HDP CVD形成的 ILD14覆盖在应变 SiN包 裹的 NMOS和 PMOS之上， ILD14中存在缺陷 15 , 缺陷 15例如工艺 过程中难以预期的玷污颗粒。 在形成 ILD14之后， 经过清洗、 化学机 械抛光（CMP ) , 缺陷 15被除去， 但是， 在 ILD14中留下了孔洞 16， 参见附图 2。 然后， 参见附图 3 , 通过 ILD14, 形成多个接触孔 17， 以 引出电极。 接着， 参见附图 4, 进行导电材料填充， 例如是 Ti/TiN， 在 接触孔 17中形成接触插塞 19, 但同时在孔洞 16中也留下了部分导电 材料， 从而形成了桥接部件 18。 由于桥接部件 18的存储， 多个接触插 塞 17被桥接而短路， 造成了电路失效。
因此，根据目前半导体制造流程对 HDP CVD技术良率提升提出的 进一步需求， 需要开发一种消除接触孔工艺中桥接（ contact bridge )的 方法， 以减少 HDP CVD工艺沉积过程中产生的缺陷而避免电路失效。 发明内容
本发明提供一种消除接触孔工艺中桥接的方法， 其中， 包括： 对高密度等离子体化学气相淀积设备的反应腔室进行清洁， 该清 洁工艺包括设定清洁菜单， 在上述清洁菜单中， 在去除反应腔室的腔 壁生长的 Si02薄膜后， 设置多步的适应性保护薄膜沉积工艺， 用以在 所述腔壁上形成叠层适应性保护薄膜， 该叠层适应性保护薄膜保护所 述腔壁， 使所述腔壁在高密度等离子体化学气相淀积工艺中不会受到 等离子体的损伤。
在本发明的方法中， 所述适应性保护薄膜的材料为 Si02、 Si3N4、 SiON中的一种或多种。
在本发明的方法中，所述叠层适应性保护薄膜为 Si02、 Si3N4、 SiON 薄膜中的一种或多种形成的叠层； 优选地， 叠层适应性保护薄膜为多 层 Si02形成的叠层； 更优选地， 叠层适应性保护薄膜为多层富硅 Si02 形成的叠层， 富硅 Si02的折射率大于 1.5， 或者， 叠层适应性保护薄膜 为多层富氧 Si02形成的叠层， 富氧 Si02的折射率小于 1.5; 其中， 在 多步的适应性保护薄膜形成工艺中， 交替改变薄膜沉积的 SiH4和 02 气体流量的比值， 以获得不同折射率组分的薄膜覆盖， 提高适应性保 护薄膜的致密性。
在本发明的方法中， 在多步的适应性保护薄膜形成工艺中， 交替 改变薄膜沉积的射频功率的参数， 以提高适应性保护薄膜的均勾性和 致密性； 优选地， 改变的射频功率参数包括改变等离子体分布浓度和 方向。 在本发明的方法中， 还包括在沉积一层或任意多层适应性保护薄 膜后， 在腔体保养维护时对所述腔室的侧壁进行增加粗糙度的擦刮， 改善表面性能， 提高适应性保护薄膜的粘附性。
本发明包括多步适应性保护薄膜沉积工艺的清洁菜单， 在 HDP CVD设备腔室的侧壁上形成叠层适应性保护薄膜， 叠层适应性保护薄 膜具有良好的粘附性、致密性和均匀性， 可以保护 HDP CVD设备腔室 的侧壁， 使其不会受到等离子体的伤害， 还避免了缺陷颗粒的产生， 提高了 HDP CVD工艺的技术良率， 消除了接触孔工艺中的桥接现象。 附图说明
图 1 -4 桥接现象示意图；
图 5-6 缺陷产生原因示意图；
图 7 本发明提供的叠层保护层；
图 8 本发明提供的经过打磨的叠层保护层；
图 9-10 本发明提供的无桥接的半导体器件。 具体实施方式
以下， 通过附图中示出的具体实施例来描述本发明。 但是应该理 解， 这些描述只是示例性的， 而并非要限制本发明的范围。 此外， 在 以下说明中， 省略了对公知结构和技术的描述， 以避免不必要地混淆 本发明的概念。
本发明的实施例涉及使用高密度等离子体化学气相淀积 （ HDP CVD ) 方法进行电介质薄膜沉积后的干法清洁工艺， 以实现沉积的晶 圆表面完美的颗粒需求， 从而提高了 HDP CVD工艺的技术良率， 消除 了接触孔工艺中的桥接现象。
根据本发明， 参见附图 9， 首先提供半导体衬底 10， 半导体衬底 10上具有 N阱 1 1和 P阱 12 , 隔离结构 13 , 例如是 STI结构， 将 N阱 1 1和 P阱 12隔离。 在阱区中形成 NMOS和 PMOS的源漏极 22 , 在村 底 10之上形成栅极 21。 之后， 采用应变 SiN保形地覆盖 NMOS 和 PMOS。 接着， 采用 HDP CVD工艺， 在应变 SiN之上形成层间介质层 ( ILD ) 14 , 覆盖 NMOS和 PMOS区域。 接着， 形成多个接触孔 17, 接触孔 17穿过 ILD14, 以便引出源漏电极以及栅电极。 相对传统的等离子体增强化学气相沉积（ PEC VD )技术而言， HDP CVD沉积技术可以在较低的压力下， 采用电感耦合的方式产生高密度 等离子体 （ ICP ) ， 或采用电子回旋共振方式产生高密度等离子体 ( ECR ) , 也可以采用其他方法产生高密度等离子体， 如表面波， 哨 声波等方式。 PECVD沉积方式具有 108〜101Q的密度（n/cm3 )的等离子 体， 而如果采用 HDP CVD沉积方式可以达到 ΙΟ1 1 ^)12甚至量级更高 的高密度 （n/cm3 ) 等离子体。 由于 HDP CVD是一种沉积与溅射 （刻 蚀） 同步进行的工艺， 高密度的等离子体对反应腔室也有一定的轰击 作用。 参见附图 5， 反应腔室的側壁 1 上形成有一层薄膜 2，， 薄膜 2， 是进行 HDP CVD工艺时形成的， 然而， 通常情况下， 经过长时间等离 子体的轰击导致腔体的表面性能下降， 另外薄膜 2，的致密性和均匀性 不佳， 等离子 3 轰击薄膜 2，的表面， 可能会将例如是颗粒状的缺陷 3 从薄膜 2，中击出 （参见附图 6 ) ， 并使其落在 ILD14层中， 产生如图 1 所示的情况。 为了减少缺陷的产生， 提高半导体器件良率， 在制备所 需薄膜时， 例如是本实施例中的 IDL14 , 需要执行一个清洁工艺以消除 可能产生缺陷的因素。
本发明消除接触孔工艺中桥接的方法中， 包括了新开发的清洁工 艺。 在采用 HDP CVD工艺制备所需薄膜时， 例如是淀积 ILD层， 对 高密度等离子体化学气相淀积设备的腔室进行清洁， 该清洁工艺包括 设定清洁菜单， 在上述清洁菜单中， 设置多步的适应性保护薄膜沉积 工艺， 用以在所述腔室的侧壁上形成叠层适应性保护薄膜 2 , 参见附图 7, 该叠层适应性保护薄膜 2保护所述腔室的侧壁， 使所述腔室的侧壁 在高密度等离子体化学气相淀积工艺中不会受到等离子体的损伤。
通常， 在工厂生产或实验室实验的时候， 先对一批控片 （dummy wafer ) 进行流片， 使 HDP CVD反应发生的腔体逐渐进入稳定状态， 而后进行大规模晶圆流片生产或实验。 在本发明中的情节工艺中， 通 过执行清洁菜单中的适应性保护薄膜沉积 （又称为流程中薄膜沉积， 即 season薄膜沉积） 工艺， 将适应性保护薄膜沉积在腔壁上， 保护腔 壁并且为下一片或下一批的晶圆的生长保持一个稳定的反应环境。
在本发明的方法中， 所述适应性保护薄膜的材料为 Si02、 Si3N4、 SiON中的一种或多种。 具体采用何种材料， 还要根据 ILD层而定， 适 应性保护薄膜的材料是与 ILD材料相同的。 因此， 叠层适应性保护薄 膜 2为 Si02、 Si3N4、 SiON薄膜中的一种或多种形成的叠层； 优选地， 当 ILD14为 Si02层时，叠层适应性保护薄膜 2为多层 Si02形成的叠层； 更优选地， 叠层适应性保护薄膜 2为多层富硅 Si02形成的叠层， 富硅 Si02的折射率大于 1.5 , 或者， 叠层适应性保护薄膜 2为多层富氧 Si02 形成的叠层， 富氧 Si02的折射率小于 1.5。 其中， 在多步的适应性保护 薄膜 2形成工艺中， 交替改变薄膜沉积的 SiH4和 02气体流量的比值， 以获得不同折射率组分的薄膜覆盖， 提高适应性保护薄膜的致密性。
在本发明的方法中， 在多步的适应性保护薄膜 2 形成工艺中， 交 替改变 HDP CVD薄膜沉积的射频 （RF ) 功率的参数， 以提高适应性 保护薄膜 2 的粘附性、 均勾性和致密性； 优选地， 改变的射频功率参 数包括改变等离子体分布浓度和方向。
在本发明的方法中， 还包括在沉积一层或任意多层适应性保护薄 膜 2后， 在腔体保养维护时对所述腔室的侧壁进行增加粗糙度的擦刮， 改善表面性能， 提高适应性保护薄膜的粘附性。 参见附图 8 , 擦刮后的 薄膜具有粗糙的表面 5 , 可以提供良好的附着能力， 提高整个叠层适应 性保护薄膜 2 的粘附性， 使其不容易被等离子体轰击而脱落， 从而进 一步降低了缺陷产生的可能。
由于执行了本发明的清洁工艺， ILD14表面不会产生缺陷， 从而， 消除了在后续接触孔填充工艺可能产生的桥接现象。 接着， 参见附图 10, 进行导电材料填充， 例如是 Ti/TiN , 在接触孔 17中形成接触插塞 19。 此时， 半导体器件中不存在如附图 4所示的桥接部件 18 , 因而电 路功能得到保证， 集成电路的良率提高。
在本发明中， 提供了包括多步适应性保护薄膜沉积工艺的清洁菜 单， 在 HDP CVD设备腔室的侧壁上形成叠层适应性保护薄膜， 叠层适 应性保护薄膜具有良好的致密性和均匀性，可以保护 HDP CVD设备腔 室的侧壁， 使其不会受到等离子体的伤害， 避免了缺陷颗粒的产生， 提高了 HDP CVD工艺的技术良率， 消除了接触孔工艺中的桥接现象。
以上参照本发明的实施例对本发明予以了说明。 但是， 这些实施 例仅仅是为了说明的目的， 而并非为了限制本发明的范围。 本发明的 范围由所附权利要求及其等价物限定。 不脱离本发明的范围， 本领域 技术人员可以做出多种替换和修改， 这些替换和修改都应落在本发明 的范围之内。

Claims

权 利 要 求
1. 一种消除接触孔工艺中桥接的方法， 其特征在于， 包括： 对高密度等离子体化学气相淀积设备的腔室进行清洁， 该清洁工 艺包括设定清洁菜单， 在上述清洁菜单中， 设置多步的适应性保护薄 膜沉积工艺， 用以在所述腔室的侧壁上形成叠层适应性保护薄膜， 该 叠层适应性保护薄膜保护所述腔室的侧壁， 使所述腔室的侧壁在高密 度等离子体化学气相淀积工艺中不会受到等离子体的损伤。
2. 根据权利要求 1 所述的方法， 其特征在于， 所述适应性保护薄 膜的材料为 Si02、 Si3N4、 SiON中的一种或多种。
3. 根据权利要求 1 所述的方法， 其特征在于， 所述叠层适应性保 护薄膜为 Si〇2、 Si3N4、 SiON薄膜中的一种或多种形成的叠层
4. 根据权利要求 3所述的方法， 其特征在于， 所述叠层适应性保 护薄膜为多层 Si02形成的叠层。
5. 根据权利要求 4所述的方法， 其特征在于， 所述叠层适应性保 护薄膜为多层富硅 Si02形成的叠层， 富硅 Si02的折射率大于 1.5。
6. 根据权利要求 4所述的方法， 其特征在于， 所述叠层适应性保 护薄膜为多层富氧 Si02形成的叠层， 富氧 Si02的折射率小于 1.5。
7. 根据权利要求 4至 6之一所述的方法， 其特征在于， 在多步的 适应性保护薄膜形成工艺中，交替改变薄膜沉积的 SiH4和 02气体流量 的比值， 以获得不同折射率组分的薄膜覆盖， 提高适应性保护薄膜的 致密性。
8. 根据权利要求 1 所述的方法， 其特征在于， 在多步的适应性保 护薄膜形成工艺中， 交替改变薄膜沉积的射频功率的参数， 以提高适 应性保护薄膜的均勾性和致密性。
9. 根据权利要求 8所述的方法， 其特征在于， 改变的射频功率参 数包括改变等离子体分布浓度和方向。
10. 根据权利要求 1所述的方法， 其特征在于， 还包括在沉积一层 或任意多层适应性保护薄膜后， 在腔体保养维护时对所述腔室的侧壁 进行增加粗糙度的擦刮， 改善表面性能， 提高适应性保护薄膜的粘附 性。
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