WO2012066752A1 - サセプタ及びエピタキシャルウェーハの製造方法 - Google Patents
サセプタ及びエピタキシャルウェーハの製造方法 Download PDFInfo
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- WO2012066752A1 WO2012066752A1 PCT/JP2011/006284 JP2011006284W WO2012066752A1 WO 2012066752 A1 WO2012066752 A1 WO 2012066752A1 JP 2011006284 W JP2011006284 W JP 2011006284W WO 2012066752 A1 WO2012066752 A1 WO 2012066752A1
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- Prior art keywords
- susceptor
- wafer
- circumference section
- counterbore
- epitaxial
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 238000001947 vapour-phase growth Methods 0.000 claims abstract description 14
- 230000002093 peripheral effect Effects 0.000 claims description 25
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 5
- 230000008021 deposition Effects 0.000 abstract description 10
- 238000012546 transfer Methods 0.000 abstract description 5
- 238000002474 experimental method Methods 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 description 80
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 19
- 229910052710 silicon Inorganic materials 0.000 description 19
- 239000010703 silicon Substances 0.000 description 19
- 239000007789 gas Substances 0.000 description 14
- 238000000034 method Methods 0.000 description 11
- 238000010438 heat treatment Methods 0.000 description 10
- 238000009826 distribution Methods 0.000 description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 238000005259 measurement Methods 0.000 description 5
- 239000012808 vapor phase Substances 0.000 description 5
- 238000004140 cleaning Methods 0.000 description 4
- 238000006073 displacement reaction Methods 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000002542 deteriorative effect Effects 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000005049 silicon tetrachloride Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 description 1
- 239000005052 trichlorosilane Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/12—Substrate holders or susceptors
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
- C23C16/4581—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber characterised by material of construction or surface finish of the means for supporting the substrate
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68764—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
- Y10T117/10—Apparatus
Definitions
- the present invention relates to a susceptor and an epitaxial wafer manufacturing method, and more specifically, a susceptor capable of reducing deposits (deposition) generated on the outer periphery of a wafer back surface during epitaxial vapor deposition and an epitaxial wafer using the susceptor. It relates to the manufacturing method.
- a susceptor that penetrates to the back surface of the susceptor and is provided with an open through hole is often used for the purpose of improving the peripheral resistivity distribution and improving the back surface appearance (Patent Document 1).
- Various quality improvements were achieved by the through-holes provided in the susceptor, but at the same time, local deposition (hereinafter referred to as “backside deposit”) on the outer periphery of the backside of the wafer occurred. It was.
- the source gas is flowed to the wafer front side, but the source gas may circulate to the back surface of the susceptor due to the mechanism of the epitaxial manufacturing apparatus.
- the source gas that has entered the back surface of the susceptor enters the back surface of the wafer further from the through hole of the susceptor, reacts on the back surface of the wafer, and back surface deposition occurs.
- the rear surface deposit of the wafer is locally in the vicinity of the contact portion between the susceptor and the wafer, that is, the outer peripheral portion of the back surface of the wafer (the portion having a radius of about 147 to 149 mm from the center of the wafer if the wafer has a diameter of 300 mm). It is generated and its height changes depending on the reaction time, but reaches several hundred nm.
- the thickness shape of the epitaxial wafer increases rapidly at the outer peripheral portion, which causes deterioration of the flatness.
- the back surface deposition is a great obstacle to the manufacture of advanced products.
- the backside deposit is concentrated on the part where the wafer and the susceptor overlap in close contact with each other, that is, the part where the susceptor is placed, and the height of the backside deposit varies according to the amount of heating on the susceptor side.
- Patent Document 2 a protrusion is provided at a position corresponding to the wafer outer peripheral portion on the back surface of the susceptor to increase the heat retention effect by increasing the heat capacity of the susceptor. It describes the suppression of occurrence.
- the present inventor has inferred from the experimental results and experience so far that the backside deposit has a close relationship with the heat transfer generated between the wafer and the susceptor, that is, the wafer outer periphery is in contact with the wafer and the susceptor.
- the wafer and the susceptor are close to each other, it is assumed that the rear surface deposit is likely to occur due to the temperature higher than the inner peripheral portion of the wafer, and the thermal conditions of the outer peripheral portion and inner peripheral portion of the wafer are constant. I tried to solve the problem.
- the present invention increases the heat capacity of the outer periphery of the susceptor by increasing the thickness of the susceptor and equalizes the thermal conditions at the outer peripheral portion and the inner peripheral portion of the wafer.
- An object of the present invention is to provide a method of manufacturing an epitaxial wafer in which an epitaxial layer is vapor-phase grown using the susceptor.
- the present invention provides a susceptor that supports a semiconductor substrate when performing vapor phase growth of an epitaxial layer, and the top surface of the susceptor includes a counterbore in which the semiconductor substrate is disposed.
- the counterbore formed has a two-stage structure having an upper counterbore part that supports an outer peripheral edge of the semiconductor substrate, and a lower counterbore part that is lower than the upper counterbore part and formed on the center side.
- the lower counterbore part is formed with a hole that penetrates to the back surface of the susceptor and is open even when the vapor phase growth is performed, and at least on the back surface side of the susceptor A susceptor is provided in which a protrusion is provided at a position corresponding to an upper counterbore.
- the susceptor has an increased heat capacity due to an increase in the thickness of the position corresponding to the upper counterbore part, and therefore the temperature of the wafer outer peripheral part is difficult to rise.
- the inner peripheral portion can be made constant, and the occurrence of backside deposits can be suppressed without impairing the nanotopology quality of the wafer surface and the peripheral resistivity distribution quality.
- the thickness of the protruding portion is not more than three times the thickness of the susceptor other than the protruding portion at the position corresponding to the upper counterbore portion.
- the thermal condition between the outer peripheral portion and the inner peripheral portion of the wafer can be made more accurate and constant, and therefore, the rear surface deposit that is the effect of the present invention can be more effectively suppressed.
- a groove is formed on the protruding portion.
- the grooves have a lattice shape.
- the temperature of the protruding portion can be further effectively reduced, and the back surface deposition can be suppressed.
- the depth of the groove is preferably 1/10 or more of the thickness of the susceptor at the position corresponding to the upper counterbore.
- the temperature of the protruding portion can be further effectively reduced, and the occurrence of backside deposit can be suppressed.
- the present invention is also a method for producing an epitaxial wafer, wherein the wafer is placed on the susceptor countersunk using the susceptor of the present invention, and a vapor phase of an epitaxial layer is formed on the wafer while flowing a raw material gas.
- An epitaxial wafer manufacturing method characterized by performing growth is provided.
- the thermal conditions of the wafer outer peripheral portion and the inner peripheral portion can be made constant, and the The occurrence of backside deposits can be suppressed without deteriorating the topology quality or the outer peripheral resistivity distribution quality.
- an epitaxial wafer in which generation of backside deposits is suppressed can be manufactured.
- FIG. 1 shows a schematic cross-sectional view of an epitaxial growth apparatus used in the present invention.
- the schematic bottom view of the susceptor of this invention, the schematic sectional drawing, and the figure which expanded one part of the protrusion part are shown.
- the results of vapor phase growth of an epitaxial layer on the wafer surface using the conventional susceptor and the susceptor of the present invention and evaluating the back surface of the wafer by WaferSight are shown.
- the vapor phase growth of the epitaxial layer was carried out on the wafer surface using the susceptor of this invention, and the result of having evaluated the wafer back surface by UA3P is shown.
- the flowchart which showed the flow of the process of the manufacturing method of the epitaxial wafer to which this invention is applied is shown.
- FIG. 5 shows a flow chart of the procedure of the epitaxial wafer manufacturing method to which the present invention is applied.
- a wafer silicon wafer
- the present invention can be used not only for silicon wafers but also for compound semiconductor wafers such as silicon carbide wafers, GaP wafers, and GaAs wafers.
- the silicon wafer is appropriately cleaned such as RCA cleaning.
- a cleaning method in this cleaning step in addition to a typical RCA cleaning, a method in which the concentration and type of a chemical solution are changed within a normal range can be used.
- the silicon wafer is transferred to the epitaxial growth apparatus for processing.
- a schematic diagram of an example of an epitaxial growth apparatus used in the step (c) and thereafter is shown in FIG.
- the epitaxial growth apparatus 51 supports the chamber 52, the susceptor 71 disposed inside the chamber, and the susceptor from below, and carries the wafer into the susceptor support means 53 and the chamber 52 that can be rotated up and down, and vice versa.
- a wafer transfer port 54 for carrying out, a gas introduction pipe 55 for supplying various gases into the chamber, a hydrogen gas supply means (not shown) for supplying hydrogen gas into the chamber, connected to the gas introduction pipe 55, silane, etc.
- a source gas supply means for supplying a source gas, a gas discharge pipe 57 for discharging various gases from the chamber, a heating means 58 provided outside the chamber 52, a silicon wafer is transferred into the chamber, and the chamber 52 It comprises a wafer transfer means (not shown) for transferring a silicon wafer from the inside.
- the susceptor 71 may have a lift pin through-hole 73 formed therein.
- the lift pin 75 is inserted through the lift pin through-hole 73.
- lift pin lifting / lowering means capable of moving the lift pin 75 up and down relatively with respect to the susceptor may be provided inside the chamber 52.
- FIG. 2A is a bottom view
- FIG. 2B is a cross-sectional view
- FIG. 2C is an enlarged view of a portion of the protrusion 76.
- a counterbore 72 for positioning a silicon wafer to be placed is formed on the susceptor 71.
- the counterbore 72 has an upper counterbore 72a that supports the outer peripheral edge of the wafer W and a lower stage than the upper counterbore.
- a two-stage structure having a lower counterbore 72b formed on the center side is formed.
- a large number of through holes 74 are formed in substantially the entire surface of the lower counterbore portion 72b.
- a protrusion 76 (hereinafter also referred to as a block) is provided at a position corresponding to the upper counterbore portion on the back surface of the susceptor.
- the projecting portion 76 can be formed by bringing a block-like projection into close contact with the back surface of the susceptor, or the back surface is processed when the susceptor itself is formed, and the projection may be formed on the back surface of the susceptor in advance. Since the protrusion 76 is provided, the thickness of the position corresponding to the upper counterbore portion of the susceptor is increased and the heat capacity is also increased.
- the thermal condition with the part constant, and to suppress the occurrence of backside deposition without deteriorating the nanotopology quality and the peripheral resistivity distribution quality of the wafer main surface.
- the thickness of the protruding portion 76 is set to be three times or less the thickness of the susceptor other than the protruding portion at a position corresponding to the upper counterbore portion, the susceptor at the time of heating due to an excessively large heat capacity difference Damage can be prevented.
- a protrusion having a groove 77 formed on the protrusion can be used. Furthermore, it is possible to use the groove 77 having a lattice shape. Still further, the groove 77 having a depth that is 1/10 or more of the thickness of the susceptor at the position corresponding to the upper counterbore part can be used. Since the protrusions 76 are provided with the grooves 77, a portion that is shaded against lamp heating can be inevitably formed on the protrusions, and the grooves 77 have a large surface area.
- an epitaxial layer is vapor-phase grown on the surface of the silicon wafer as follows.
- a silicon wafer is transferred into the chamber 52 using a wafer transfer means (not shown) and placed on the spot facing portion 72 of the susceptor 71.
- a wafer transfer means not shown
- a commonly used placement method can be applied in addition to the method using the lift pins 75.
- hydrogen gas is introduced into the chamber 52 from the hydrogen gas supply means through the gas introduction pipe 55 and heated by the heating means 58 to perform hydrogen treatment.
- the natural oxide film generated on the surface of the silicon wafer is removed.
- step (e) vapor phase growth of the epitaxial layer is performed on the surface of the silicon wafer.
- the vapor phase growth of the epitaxial layer is performed by introducing a source gas such as monosilane, trichlorosilane, or silicon tetrachloride and hydrogen gas serving as a carrier gas into the chamber 52 and heating.
- an epitaxial wafer in which an epitaxial layer is formed on the surface of the silicon wafer can be manufactured.
- a protrusion is provided in the portion corresponding to the upper counterbore portion on the back surface of the susceptor, and the thickness of the position corresponding to the upper counterbore portion of the susceptor is increased and the heat capacity is also increased. Because it is increased, it is possible to make the thermal conditions of the wafer outer periphery and inner periphery constant, and suppress the occurrence of backside deposition without degrading the nanotopology quality and outer peripheral resistivity distribution quality of the wafer main surface. Can do.
- a range of a radius of about 145 mm to 149 mm from the center of the back surface of the silicon wafer that is, a range corresponding to the back surface portion of the susceptor provided with the protruding portion according to the present invention on the back surface of the silicon wafer, is each a WaferSight. Evaluation was performed using (manufactured by Panasonic Corporation) and UA3P (manufactured by KLA-Tencor Corporation), and the height of the back surface depot was measured. The measurement result by WaferSight at this time is shown in FIG. 3, the measurement result by UA3P is shown in FIG. 4, and the experimental result is shown in Table 1 below.
- WaferSight is to measure the amount of displacement of the wafer surface from the number and width of interference fringes caused by optical interference between the reflected light from the wafer and the reflected light from the reference surface. It is a measuring instrument in principle. In the actual measurement, the above-described measurement is performed on both surfaces of the wafer, and the total thickness change is calculated from the thickness of one specific point measured in advance.
- the UA3P is a measuring machine that performs measurement using a stylus type surface displacement. The principle is that the probe is pressed against the object with a weak constant load, and the displacement of the moving needle according to the unevenness of the object is measured with a laser.
- the susceptor portion of the present invention in which the block is provided is compared with the conventional susceptor portion in which the block is not provided in the portion corresponding to the upper counterbore portion on the back surface.
- the height of the backside depot is low. Further, even when a block is provided on the back surface of the susceptor, if the thickness of the block is not more than three times the thickness of the susceptor other than the protruding portion at a position corresponding to the upper counterbore portion, the heat capacity difference It is possible to prevent damage to the susceptor during heating due to an excessively large value.
- the block is grooved, it is necessary to make a part on the block that will be shaded against lamp heating, and because the surface area increases, it is easy to dissipate heat. Therefore, the occurrence of backside deposit can be more effectively suppressed.
- the experimental result in the portion where the block is not provided is the same as the case where vapor phase growth of the epitaxial layer is performed using the conventional susceptor which is not provided with the entire circumferential projection portion under the same conditions as the above epitaxial growth conditions. became.
- the present invention is not limited to the above embodiment.
- the above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits the same function and effect. Are included in the technical scope.
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Abstract
Description
すなわち、本発明は、上記問題を解消するために、サセプタの厚さを増大させることによって、サセプタ外周部の熱容量を増大させ、ウェーハの外周部と内周部とにおける熱的条件を等しくすることができるサセプタを提供し、さらにそのサセプタを用いてエピタキシャル層の気相成長を行うエピタキシャルウェーハの製造方法を提供することを目的とする。
本発明が適用されるエピタキシャルウェーハの製造方法の手順のフロー図を図5に示す。
まず、工程(a)では、エピタキシャル層を成長させるウェーハ(シリコンウェーハ)を準備する。ここで、本発明はシリコンウェーハに限らず、シリコンカーバイドウェーハや、GaPウェーハ、GaAsウェーハなどの化合物半導体ウェーハ等にも用いることができる。
この洗浄工程における洗浄法は、典型的なRCA洗浄の他、薬液の濃度や種類を通常行われる範囲で変更したものを用いることもできる。
エピタキシャル成長装置51は、チャンバー52と、チャンバー内部に配置されたサセプタ71、サセプタを下方から支持し、回転上下動自在なサセプタ支持手段53、チャンバー52内にウェーハを搬入したり、逆に外へと搬出したりするためのウェーハ搬送口54、チャンバー内に各種ガスを供給するガス導入管55、ガス導入管55に接続され、チャンバー内に水素ガスを供給する図示しない水素ガス供給手段及びシラン等の原料ガスを供給する図示しない原料ガス供給手段、チャンバー内から各種ガスを排出するガス排出管57、チャンバー52の外部に備えられた加熱手段58、チャンバー内にシリコンウェーハを移送し、また、チャンバー52内からシリコンウェーハを移送する図示しないウェーハ移送手段等から構成される。
尚、サセプタ71には、リフトピン用貫通孔73が形成されているものであってもよい。リフトピン用貫通孔73には、リフトピン75が挿通される。
また、チャンバー52の内部にはリフトピン75をサセプタに対して相対的に上下させることができるリフトピン昇降手段を設けてもよい。
尚、突出部76は、サセプタ裏面にブロック状の突起物を密着させることによって形成することもできるし、サセプタ自体の形成時に裏面加工して、予めサセプタ裏面に突起物を形成してもよい。
上記突出部76を設けたことにより、サセプタの前記上段座ぐり部に対応する位置の厚みが増大されるとともに熱容量も増大されるので、この部分の温度を上がりにくくし、ウェーハ外周部と内周部との熱的条件を一定にすることができ、ウェーハ主表面のナノトポロジー品質や外周抵抗率分布品質を損ねることなく裏面デポの発生を抑制することができる。
また、突出部76の厚みが、前記上段座ぐり部に対応する位置における、前記突出部以外のサセプタの厚みの3倍以下とすることにより、熱容量差が大きくなりすぎることによる加熱時のサセプタの破損を防止できる。
前記突出部76に前記溝77が施されていることにより、ランプ加熱に対して影となるような部分を前記突出部上に必然的に作ることができ、また、前記溝77により表面積が大きくなって放熱し易くなり、それによって前記突出部の温度を下げることができるため、本発明の効果である裏面デポの抑制をより効果的に行うことができる。さらに前記溝77が格子状であるものを用いることや、前記溝77の深さが、前記上段座ぐり部72aに対応する位置のサセプタの厚みの1/10以上であるものを用いることにより、さらに効果的に裏面デポを抑制することができる。
サセプタの座ぐりにシリコンウェーハを載置し、原料ガスを流しながら前記シリコンウェーハ表面上にエピタキシャル層の気相成長を行うエピタキシャル成長装置において、図4に示すように、ひとつのサセプタ裏面の、厚みが4mmである上段座ぐり部に対応する部分の円周方向上に、厚さ3.8mmのブロック、厚さ7.6mmのブロック、3.8mmの深さの溝が施された厚さ7.6mmのブロック及びブロックを設けない部分を均等に設け、反応圧力を常圧、反応温度を1100℃、成長速度を2.7μm/minとして、直径300mmのシリコンウェーハ表面上に厚さ5μmのエピタキシャル層の気相成長を行った。このようにすることで、サセプタ裏面の突出部の有無等以外の条件を完全に一致させて、本発明の効果を検証することができる。
ここで、WaferSightとは、ウェーハに光を入射し、ウェーハからの反射光と基準面からの反射光との光学干渉によって生じる干渉縞の数と幅から、ウェーハ表面の変位量を計測することを原理とする測定器である。実際の測定においては、ウェーハ両面に前述の計測を行い、予め測定しておいた、ある特定の1点の厚みから全体の厚み変化を算出する。
また、UA3Pは触針式表面変位量によって測定を行う測定機である。探針を微弱な一定荷重で対象に押し当て、対象の凹凸に応じて動く針の変位量をレーザーで計測することを原理とする。
Claims (6)
- エピタキシャル層の気相成長を行う際に半導体基板を支持するサセプタであって、該サセプタの上面には、内部に前記半導体基板が配置される座ぐりが形成され、該座ぐりは、前記半導体基板の外周縁部を支持する上段座ぐり部と、該上段座ぐり部よりも下段でかつ中心側に形成された下段座ぐり部とを有する二段構造を成し、前記下段座ぐり部には、前記サセプタの裏面まで貫通し、前記気相成長を行う際にも開放状態となる孔部が形成されており、前記サセプタの裏面側には、少なくとも前記上段座ぐり部に対応する位置に突出部が設けられているものであることを特徴とするサセプタ。
- 前記突出部の厚みが、前記上段座ぐり部に対応する位置における、前記突出部以外のサセプタの厚みの3倍以下であることを特徴とする請求項1に記載のサセプタ。
- 前記突出部に溝が施されているものであることを特徴とする請求項1または2に記載のサセプタ。
- 前記溝が、格子状であることを特徴とする請求項3に記載のサセプタ。
- 前記溝の深さが、前記上段座ぐり部に対応する位置のサセプタの厚みの1/10以上であることを特徴とする請求項3または4に記載のサセプタ。
- エピタキシャルウェーハの製造方法であって、前記請求項1乃至請求項5のいずれか1項に記載のサセプタを用いて、該サセプタの座ぐりにウェーハを載置し、原料ガスを流しながら前記ウェーハ上にエピタキシャル層の気相成長を行うことを特徴とするエピタキシャルウェーハの製造方法。
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CN111286723A (zh) * | 2018-12-10 | 2020-06-16 | 昭和电工株式会社 | 基座和化学气相沉积装置 |
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