WO2012049821A1 - 近接無線通信を用いた半導体装置 - Google Patents
近接無線通信を用いた半導体装置 Download PDFInfo
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- WO2012049821A1 WO2012049821A1 PCT/JP2011/005599 JP2011005599W WO2012049821A1 WO 2012049821 A1 WO2012049821 A1 WO 2012049821A1 JP 2011005599 W JP2011005599 W JP 2011005599W WO 2012049821 A1 WO2012049821 A1 WO 2012049821A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q7/00—Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/3025—Wireless interface with the DUT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Definitions
- the present invention relates to a technique for setting an operation mode or the like using proximity wireless communication in a semiconductor device.
- the setting of the internal operation mode is changed according to the situation. For example, in an operation test of a semiconductor device performed before shipment, the semiconductor device is set to a test mode (Patent Document 1).
- an operation mode may be set at the time of shipment in accordance with a memory or an input / output device such as a home appliance on which the semiconductor device is mounted.
- different operation modes may be set for each household electrical appliance so that the semiconductor device can handle multiple types of household electrical appliances.
- Such a setting change is generally performed via an external connection terminal included in the semiconductor device.
- the semiconductor device has a dedicated terminal for setting a test mode, and to set the semiconductor device to the test mode, the dedicated terminal is set to an H (high) level voltage or an L (low) level voltage.
- the test mode is set for the semiconductor device.
- JP 2007-171060 A Japanese Patent No. 4131544
- an object of the present invention is to provide a semiconductor device capable of changing the setting of an internal operation mode without increasing the number of terminals of the semiconductor device.
- the present invention provides a semiconductor device comprising a transmission circuit, a reception circuit, a first antenna connected to the transmission circuit, and a second antenna connected to the reception circuit; And a conductor portion provided close to the first antenna and the second antenna, and proximity wireless communication is used between the transmission circuit and the reception circuit.
- This configuration has an excellent effect that the setting of the internal operation mode can be changed without increasing the number of terminals of the semiconductor device.
- FIG. 1 is an external perspective view of a semiconductor device 100a according to a first embodiment. It is an exploded view of the semiconductor device 100a. It is sectional drawing of the semiconductor device 100a. It is a block diagram which shows the structure of the semiconductor part 120 of the semiconductor device 100a. The relationship between arrangement
- FIG. 10 is an exploded view of a semiconductor device 100d in the second embodiment. It is sectional drawing of the semiconductor device 100d. It is a block diagram which shows the structure of the semiconductor part of the semiconductor device as a modification.
- Embodiment 1 A semiconductor device 100a as an embodiment according to the present invention will be described.
- the semiconductor device 100a As shown in FIG. 1, the semiconductor device 100a is mounted on the circuit board 10a together with other electronic components (not shown). As shown in FIG. 2, the sheet-like propagation part 101a, the semiconductor part 120, and the package part are mounted. 150. The propagation part 101 a is attached to the upper surface of the semiconductor part 120, and the package part 150 is provided so as to surround the periphery of the semiconductor part 120 for protection.
- a plurality of bonding pads (electrodes) 151 are arranged in a square shape along the four sides of the upper surface.
- the plurality of bonding pads 151,... are connected to the plurality of leads 152,.
- Each lead 152 is provided by being bent downward along the upper surface of the package unit 150 and further along the outer peripheral side surface at the end of the upper surface.
- the plurality of leads 152,... Connect the semiconductor unit 120 and the circuit board 10a.
- transmission antennas 121 a, 121 b, 121 c, and reception antennas are formed in a matrix in the shape of a square formed by a plurality of bonding pads 151,. 122a, 122b, 122c, and transmission antennas 121d, 121e, 121f are exposed from the top surface of the semiconductor unit 120, the transmission antennas 121a, 121b, 121c, the reception antennas 122a, 122b, 122c, and the transmission antennas 121d, 121e. , 121f are formed inside the semiconductor portion 120.
- the propagation part 101a is a sheet-like (plate-like) signal propagation board made of cellophane seal, and is made of acrylic adhesive or the like on the upper surface of the semiconductor part 120. Are bonded to the inside of the square shape formed by the plurality of bonding pads 151.
- Conductor portions 111a, 111b, and 111c are provided on the upper surface of the propagation portion 101a.
- the conductor portions 111a, 111b, and 111c are foil-like conductors made of, for example, Cu and having a band shape.
- the end part 111ax of the conductor part 111a is close to the transmission antenna 121a, and the other end part 111ay of the conductor part 111a is close to the reception antenna 122a. Further, the end 111bx of the conductor 111b is close to the transmitting antenna 121b, the other end 111by of the conductor 111b is close to the receiving antenna 122b, and the end 111cx of the conductor 111c is receiving.
- the conductor portions 111a, 111b, and 111c are bonded to the upper surface of the propagation portion 101a so that the other end portion 111cy of the conductor portion 111c is close to the antenna 122c and close to the transmission antenna 121f.
- the distance between the lower surface of each conductor part and the upper surface of the semiconductor part 120 is 1 mm or less.
- the propagation part 101a When the propagation part 101a is pasted on the upper surface of the semiconductor part 120, there is no restriction on the arrangement method of the conductor part on the propagation part 101a, and it may be arranged in any way. However, data cannot be transmitted from the transmitting antenna of the semiconductor unit 120 toward the receiving antenna unless both the transmitting antenna and the receiving antenna exist immediately below each conductor.
- the number of transmitting antennas that can exist immediately below one conductor is only one. This is because when the electrical signals from two or more transmission antennas flow through the conductor, the electrical signals collide and normal communication cannot be performed.
- Two or more receiving antennas may be provided directly under the conductor. When two or more receiving antennas are directly under one conductor part, two or more receiving antennas can receive an electric signal corresponding to one electric signal transmitted from the transmitting antenna.
- Conductor portions 111d and 111e are provided on the upper surface of the propagation portion 101b.
- the conductor parts 111d and 111e are foil-like conductors made of, for example, Cu and having a strip shape, like the conductor part 111a and the like.
- the conductor portion 111d has a shape in which a band is bent in the middle, and the shape of the conductor portion 111e is a rectangle like the conductor portion 111a and the like.
- the end part 111dx of the conductor part 111d is close to the transmission antenna 121a, and the central part 111dy (part that is bent halfway) of the conductor part 111d is close to the reception antenna 122b.
- the other end 111dz of the conductor 111d is close to the receiving antenna 122c, the end 111ex of the conductor 111e is close to the receiving antenna 122a, and the other end 111ey of the conductor 111e is
- the conductor portions 111d and 111e are bonded to the upper surface of the propagation portion 101b so as to be close to the transmission antenna 121f.
- Conductor portions 111f and 111g are provided on the upper surface of the propagation portion 101c.
- the conductor parts 111f and 111g are foil-like conductors made of, for example, Cu and having a strip shape, like the conductor part 111a and the like.
- the end part 111fx of the conductor part 111f is close to the transmission antenna 121b, and the other end part 111fy of the conductor part 111f is close to the reception antenna 122a.
- the conductor portions 111f and 111g are arranged on the upper surface of the propagation portion 101c so that the end portion 111gx of the conductor portion 111g is close to the reception antenna 122b and the other end portion 111gy of the conductor portion 111g is close to the transmission antenna 121f. Is glued.
- the semiconductor unit 120 includes transmission antennas 121a, 121b, 121c, 121d, 121e, 121f, transmission units 123a, 123b, 123c, 123d, 123e, 123f, generation units 125a, 125b, 125c, 125d, 125e, 125f, receiving antennas 122a, 122b, 122c, receiving units 124a, 124b, 124c, a first storage unit 126, a second storage unit 127, a third storage unit 128, an input / output unit 130, and a logic unit 131, These components are formed inside the semiconductor portion 120 using semiconductor process technology.
- the transmitting antenna 121a is a coil (inductor) -shaped metal wiring of one or more turns formed inside the semiconductor portion 120 using a multilayer wiring of a semiconductor process technology.
- the transmitting antenna 121a is arranged inside the semiconductor unit 120 so that the magnetic field faces in a direction orthogonal to the upper surface of the semiconductor unit 120, and the upper part of the coil is exposed from the upper surface of the semiconductor unit 120 as shown in FIG. It is formed near the upper surface of.
- the transmission antennas 121b, 121c, 121d, 121e, 121f and the reception antennas 122a, 122b, 122c are also formed in the same manner as the transmission antenna 121a.
- Each transmission antenna transmits and receives data between the transmission antenna and the reception antenna by inductively coupling with another reception antenna via a conductor provided on the propagation unit 101a.
- transmission antennas 121 a, 121 b, 121 c, 121 d, 121 e, 121 f and reception antennas 122 a, 122 b, 122 c are formed in a matrix in the semiconductor unit 120.
- the transmitting antennas 121a, 121b, 121c are arranged in this order
- the receiving antennas 122a, 122b, 122c are arranged in this order
- the transmitting antennas 121d, 121e are arranged.
- 121f are arranged in this order.
- the generation unit 125a generates transmission data.
- the transmission data is H (high level). ) Or L (low level).
- the generation unit 125a includes the semiconductor device 100.
- a is reset, the generated transmission data is output to the transmission unit 123a only once thereafter. That is, the transmission data is output only once when the system is started.
- a clock signal is received from a clock signal generation unit (not shown) as a synchronization signal, and the received clock signal is output to the transmission unit 123a as a transmission clock signal.
- the generation units 125b, 125c, 125d, 125e, and 125f have the same configuration as the generation unit 125a, description thereof will be omitted.
- the generation units 125b, 125c, 125d, 125e, and 125f output the generated transmission data and transmission clock signal to the transmission units 123b, 123c, 123d, 123e, and 123f, respectively.
- each of the transmission data generated by the generation units 125a, 125b, 125c, 125d, 125e, and 125f indicates H or L is determined for each generation unit.
- the generation unit 125a may output the transmission data a plurality of times after the semiconductor device 100a is reset.
- the generation unit 125a outputs the transmission data during the operation of the semiconductor device 100a according to an instruction from another circuit included in the semiconductor unit 120 at another timing, not after the semiconductor device 100a is reset. May be.
- the operation mode can be changed during the operation of the semiconductor device 100a.
- the transmission data may be output during the operation of the semiconductor device 100a according to an instruction from another circuit included in the semiconductor unit 120 at another timing.
- the operation mode can be further changed.
- the transmission unit 123a receives transmission data and a transmission clock signal from the generation unit 125a, and generates an electric signal that changes based on the received transmission data in synchronization with the received transmission clock signal.
- the generated electric signal changes linearly from the first potential (for example, 0 v) to the second potential (for example, 5 v), and further from the second potential to the second potential. It changes linearly to one potential (first pattern).
- the transmission data indicates a second potential.
- the time required for the change from the first potential to the second potential is a fixed length, and the time required for the change from the second potential to the first potential is also a fixed length, for example, 100 ms.
- the first pattern is a triangular wave.
- the start point of the change of the electric signal is determined in synchronization with the transmission clock signal.
- the generated electric signal changes linearly from the first potential (eg, 0 v) to the third potential (eg, ⁇ 5 v), and further from the third potential. It changes linearly to the first potential (second pattern).
- the transmission data indicates a third potential.
- the time required for the change from the first potential to the third potential is a fixed length, and the time required for the change from the third potential to the first potential is also a fixed length, for example, 100 milliseconds.
- the second pattern is a triangular wave.
- the start point of the change of the electric signal is determined in synchronization with the transmission clock signal.
- the transmission unit 123a outputs the generated electrical signal to the transmission antenna 121a.
- the transmission units 123b, 123c, 123d, 123e, and 123f each have the same configuration as the transmission unit 123a, and a description thereof is omitted.
- the transmission units 123b, 123c, 123d, 123e, and 123f receive the transmission data and the transmission clock signal from the generation units 125b, 125c, 125d, 125e, and 125f, respectively.
- Patent Document 2 describes an example of each transmission unit and an electric signal that changes according to the first pattern and the second pattern.
- the receiving unit 124a interprets a state where the received electrical signal is changing according to the third pattern as H, and interprets a state where the received electrical signal is changed according to the fourth pattern as L.
- the transmitting unit 123a outputs an electrical signal that changes according to the first pattern to the transmitting antenna unit 121a
- the receiving unit 124a is connected to the transmitting antenna unit 121a from the receiving antenna unit 122a by the third pattern.
- the transmission unit 123a outputs an electrical signal that changes according to the second pattern to the transmission antenna unit 121a
- the reception unit 12a receives from the reception antenna unit 122a inductively coupled to the transmission antenna unit 121a.
- 4a receives an electrical signal that varies according to the fourth pattern.
- the receiving unit 124a receives an electric signal from the receiving antenna 122a, determines whether or not the received electric signal is changed, and further determines whether the electric signal is changing in the third pattern or the fourth pattern. If it is changed according to the third pattern, it is interpreted that H is received, and H is output to the first storage unit 126 as the first mode. If it is changed according to the fourth pattern, it is interpreted that L has been received, and L is output to the first storage unit 126 as the first mode.
- the receiving units 124b and 124c have the same configuration as the receiving unit 124a.
- the receiving unit 124b interprets that it has received H, it outputs H to the second storage unit 127 as the second mode.
- L is output to the second storage unit 127 as the second mode.
- the receiving unit 124c interprets that H has been received, the receiving unit 124c outputs H to the third storage unit 128 as the third mode.
- L is output to the third storage unit 128 as the third mode.
- First storage unit 126 includes an area for storing the first mode.
- the first mode takes a value indicating any one of H, L, and Hi-Z (high impedance).
- the second storage unit 127 includes an area for storing the second mode.
- the second mode takes a value indicating any one of H, L, and Hi-Z.
- the third storage unit 128 includes an area for storing the third mode.
- the third mode takes a value indicating any one of H, L, and Hi-Z.
- Input / output unit 130 The input / output unit 130 controls input / output of data between the external bus 30 a and the logic unit 131.
- the input / output unit 130 changes the operation mode according to the first mode, the second mode, and the third mode stored in the first storage unit 126, the second storage unit 127, and the third storage unit 128, respectively.
- Operate. That is, the input / output unit 130 is a circuit unit that operates by switching the operation mode according to a changing electrical signal detected by any of the receiving units.
- the logic unit 131 is, for example, an MPU (micro processing unit) or a DSP (digital signal processor), memory controller, or a combination of them.
- the logic unit 131 inputs and outputs data to and from other electronic components mounted on the circuit board 10 a such as the external memory 20 a via the input / output unit 130.
- FIG. 5 shows the arrangement of conductor parts 111a, 111b, and 111c on propagation part 101a, and the transmission antenna of semiconductor part 120. The relationship between the first mode, the second mode, and the third mode stored in the first storage unit 126, the second storage unit 127, and the third storage unit 128 is shown.
- the transmission unit 123a transmits an electric signal whose potential changes according to the first pattern to the transmission antenna 121.
- the transmission antenna 121a and the reception antenna 122a are coupled by electromagnetic induction via the conductor portion 111a.
- the receiving unit 124a receives an electrical signal that changes according to the third pattern from the receiving antenna 122a. Since the electric signal received by the receiving unit 124a changes in potential, when the receiving unit 124a detects an electric signal whose potential changes according to the third pattern, H is set as the first mode as the first storage unit 126. Output to.
- the first storage unit 126 stores H as the first mode.
- FIG. 5 shows a path 201 through which a signal travels in this case. In addition, the first mode in this case is shown.
- the transmission unit 123a when the transmission unit 123a outputs an electrical signal whose potential changes according to the second pattern to the transmission antenna 121a, the transmission antenna 121a and the reception antenna 122a are inductively coupled via the conductor unit 111a. Therefore, the receiving unit 124a receives an electrical signal that changes according to the fourth pattern from the receiving antenna 122a. Since the electric signal received by the receiving unit 124a changes in potential, when the receiving unit 124a detects an electric signal whose potential changes according to the fourth pattern, L is set as the first mode and the first storage unit 126 is set. Output to. The first storage unit 126 stores L as the first mode.
- the transmission unit 123a when the transmission unit 123a outputs an electrical signal whose potential does not change to the transmission antenna 121a, or when the electrical signal is not output to the transmission antenna 121a, the transmission antenna 121a and the reception antenna 122a connect the conductor unit 111a. There is no inductive coupling. For this reason, the receiving unit 124a does not receive an electrical signal from the receiving antenna 122a.
- the receiving unit 124a When receiving no electrical signal, the receiving unit 124a outputs Hi-Z to the first storage unit 126 as the first mode.
- the first storage unit 126 stores Hi-Z as the first mode.
- the second storage unit 127 stores H, L, or Hi-Z as the second mode.
- FIG. 5 shows a path 202 through which a signal is transmitted when the transmission antenna 121b and the reception antenna 122b are inductively coupled.
- storage part 127 has shown the case where L is memorize
- the third storage unit 128 stores H, L, or Hi-Z as the third mode.
- FIG. 5 shows a path 203 through which a signal is transmitted when the transmission antenna 121f and the reception antenna 122c are inductively coupled. Further, the third mode in this case is shown.
- the transmission antennas 121c, 121d, and 121e do not inductively couple with other reception antennas. Accordingly, none of the receiving antennas receives electrical signals from the transmitting antennas 121c, 121d, and 121e.
- FIG. 6 shows the arrangement of the conductors 111d and 111e on the propagation unit 101b, the inductive coupling between the transmission antenna unit and the reception antenna unit of the semiconductor unit 120, and the first storage unit 126 and second The relationship between the 1st mode memorize
- the transmission unit 123a When the transmission unit 123a outputs an electrical signal whose potential changes according to the first pattern to the transmission antenna 121a, the transmission antenna 121a and the reception antenna 122b are inductively coupled via the conductor 111d, and the transmission antenna 121a and the reception antenna are coupled. 122c is inductively coupled through the conductor 111d. Therefore, the receiving unit 124b receives an electrical signal that changes according to the third pattern from the receiving antenna 122b, and the receiving unit 124c also receives the receiving antenna 12b. From 2c, an electrical signal that changes according to the third pattern is received.
- the second storage unit 127 stores H as the second mode.
- FIG. 6 shows a path 204 through which a signal travels in this case. Further, the second mode in this case is shown.
- H is stored as the third mode.
- the third storage unit 128 stores H as the third mode.
- FIG. 6 shows a path 205 through which a signal travels in this case. Further, the third mode in this case is shown.
- the transmission unit 123a when the transmission unit 123a outputs an electrical signal whose potential changes according to the second pattern to the transmission antenna 121a, the transmission antenna 121a and the reception antenna 122b are inductively coupled via the conductor unit 111d, and the transmission antenna 121a.
- the receiving antenna 122c is inductively coupled via the conductor portion 111d. Therefore, the receiving unit 124b receives an electrical signal that changes according to the fourth pattern from the receiving antenna 122b, and the receiving unit 124c also receives an electrical signal that changes according to the fourth pattern from the receiving antenna 122c.
- the second storage unit 127 stores L as the second mode.
- L is stored as the third mode.
- the third storage unit 128 stores L as the third mode.
- the transmission antenna 121a and the reception antenna 122b connect the conductor unit 111d.
- the transmission antenna 121a and the reception antenna 122c are not inductively coupled via the conductor portion 111d.
- the receiving unit 124b does not receive an electrical signal from the receiving antenna 122b.
- the receiving unit 124b outputs Hi-Z to the second storage unit 127 as the second mode.
- the second storage unit 127 stores Hi-Z as the second mode.
- the receiving unit 124c does not receive an electrical signal from the receiving antenna 122c.
- the receiving unit 124c outputs Hi-Z to the third storage unit 128 as the third mode.
- the third storage unit 128 stores Hi-Z as the third mode.
- the first storage unit 126 stores H, L, or Hi-Z as the first mode.
- FIG. 6 shows a path 206 through which a signal is transmitted when the transmission antenna 121f and the reception antenna 122a are inductively coupled. Further, the first mode in the case of inductive coupling is shown.
- the transmission antennas 121b, 121c, 121d and 121e since there is no conductor in the propagation part 101b above the transmission antennas 121b, 121c, 121d and 121e, the transmission antennas 121b, 121c, 121d and 121e must be inductively coupled to other reception antennas. There is no. Accordingly, none of the receiving antennas receives electrical signals from the transmitting antennas 121b, 121c, 121d, and 121e.
- FIG. 7 shows the arrangement of the conductors 111f and 111g on the propagation unit 101c, the inductive coupling between the transmission antenna unit and the reception antenna unit of the semiconductor unit 120, and the first storage unit 126, the second The relationship between the 1st mode memorize
- the transmission unit 123b When the transmission unit 123b outputs an electrical signal whose potential changes according to the first pattern to the transmission antenna 121b, the transmission antenna 121b and the reception antenna 122a are inductively coupled via the conductor unit 111f. For this reason, the receiving unit 124a receives an electrical signal that changes according to the third pattern from the receiving antenna 122a. Since the electric signal received by the receiving unit 124a changes in potential, when the receiving unit 124a detects an electric signal whose potential changes according to the third pattern, H is set as the first mode as the first storage unit 126. Output to. The first storage unit 126 stores H as the first mode.
- the transmission unit 123b when the transmission unit 123b outputs an electrical signal whose potential changes according to the second pattern to the transmission antenna 121b, the transmission antenna 121b and the reception antenna 122a are inductively coupled via the conductor unit 111f. Therefore, the receiving unit 124a receives an electrical signal that changes according to the fourth pattern from the receiving antenna 122a. Since the electric signal received by the receiving unit 124a changes in potential, when the receiving unit 124a detects an electric signal whose potential changes according to the fourth pattern, L is set as the first mode and the first storage unit 126 is set. Output to. The first storage unit 126 stores L as the first mode.
- FIG. 7 shows a path 207 through which a signal travels in this case.
- the transmission unit 123b when the transmission unit 123b outputs an electrical signal whose potential does not change to the transmission antenna 121b, or when the electrical signal is not output to the transmission antenna 121b, the transmission antenna 121b and the reception antenna 122a connect the conductor unit 111f. There is no inductive coupling. For this reason, the receiving unit 124a does not receive an electrical signal from the receiving antenna 122a. When receiving no electrical signal, the receiving unit 124a outputs Hi-Z to the first storage unit 126 as the first mode. The first storage unit 126 stores Hi-Z as the first mode.
- FIG. 7 shows a path 208 through which a signal is transmitted when the transmission antenna 121f and the reception antenna 122b are inductively coupled. Further, the second mode in the case of inductive coupling is shown.
- the transmission antennas 121a, 121c, 121d, and 121e since there is no conductor in the propagation part 101c above the transmission antennas 121a, 121c, 121d, and 121e, the transmission antennas 121a, 121c, 121d, and 121e must be inductively coupled to other reception antennas. There is no. Therefore, none of the receiving antennas receives electrical signals from the transmitting antennas 121a, 121c, 121d, and 121e.
- the receiving antenna 122c is not inductively coupled to any transmitting antenna and is in a Hi-Z state. In this case, as shown in FIG. 7, the third mode is Hi-Z.
- the substrate 10c is shown in FIGS. 8, 9, and 10, respectively.
- the semiconductor device 100a, the 8-bit bus 30a and the NOR flash memory 20a are mounted on the circuit board 10a, and the semiconductor device 100b, the 16-bit bus 30b and the NOR flash memory 20b are mounted on the circuit board 10b.
- a semiconductor device 100c, a NAND bus 30c, and a NAND flash memory 20c are mounted on the circuit board 10c.
- other electronic components are also mounted on each circuit board, these are omitted.
- the first mode, the second mode, and the first mode received by the receiving antennas 122a, 122b, and 122c and stored in the first storage unit 126, the second storage unit 127, and the third storage unit 128, respectively.
- the three modes are for determining memories and buses in the circuit boards 10a, 10b and 10c.
- the type of memory to be activated is determined. If the first mode is H, the semiconductor unit 120 operates as being connected as a memory that activates the NOR flash memory. If the first mode is L, the semiconductor unit 120 is connected as a memory that activates the NAND flash memory. Shall operate as if
- the bus is determined. If the second mode is H, the semiconductor unit 120 operates assuming that a 16-bit bus is connected, and if the second mode is L, an 8-bit bus is connected.
- the third mode determines the operation mode when the memory to be activated is a NOR flash memory.
- the semiconductor unit 120 operates in a fixed weight mode, and when the third mode is L, the semiconductor unit 120 operates in a handshake mode using a response signal (Acknowledge).
- the memory to be activated is a NAND flash memory, the semiconductor unit 120 does not refer to the third mode.
- the transmission unit 123f of the semiconductor unit 120 always outputs H
- the transmission unit 123b always outputs L
- the transmission unit 123a always outputs H.
- H is set in the third mode of the semiconductor device 100a
- L is set in the second mode
- H is set in the first mode.
- H is set in the third mode of the semiconductor device 100b, H is set in the second mode, and H is set in the first mode.
- Hi-Z is set in the third mode of the semiconductor device 100c
- H is set in the second mode
- L is set in the first mode.
- H is set in the third mode
- L is set in the second mode
- H is set in the first mode.
- H since H is set in the third mode, H is set in the second mode, and H is set in the first mode, the memory to be activated in the circuit board 10b.
- the type of memory to be activated in the circuit board 10c is NAN.
- Embodiment 2 A semiconductor device 100d as another embodiment according to the present invention will be described.
- the semiconductor device 100d has a configuration similar to that of the semiconductor device 100a.
- the difference from the semiconductor device 100d is that the conductor portion is provided so as to be close to the transmission antenna and the reception antenna provided on the lower surface of the semiconductor device 100d, as will be described in detail below.
- the other points are the same as those of the semiconductor device 100a.
- the semiconductor device 100d is mounted on a circuit board 10d together with other electronic components (not shown), and includes a propagation part 101d, a semiconductor part 120d, and a package part 150d.
- the propagation part 101d is mounted on the circuit board 10d, and the package part 150d is provided so as to surround the periphery of the semiconductor part 120d for protection.
- the upper portions of the transmission antennas 121ad, 121bd, 121cd, the reception antennas 122ad, 122bd, 122cd, and the transmission antennas 121dd, 121ed, 121fd are exposed from the lower surface of the semiconductor portion 120, Transmission antennas 121ad, 121bd, 121cd, reception antennas 122ad, 122bd, 122cd, and transmission antennas 121dd, 121ed, 121fd are formed inside the semiconductor portion 120d.
- the propagation part 101d is made of a non-conductive material and is adhered to the upper surface of the circuit board 10d.
- the conductor parts 111ad, 111bd, and 111cd are bonded to the upper surface of the propagation part 101d by acrylic. It is adhered with an agent.
- the conductor portions 111ad, 111bd, and 111cd are foil-like conductors made of, for example, Cu and having a band shape, like the conductor portions 111a, 111b, and 111c.
- the end of the conductor part 111ad is close to the transmission antenna 121ad
- the other end of the portion 111ad is close to the receiving antenna 122ad
- the end of the conductor 111bd is close to the transmitting antenna 121bd
- the other end of the conductor 111bd is close to the receiving antenna 122bd.
- the conductor portion 111 cd is placed on the upper surface of the propagation portion 101 d so that the end portion of the conductor portion 111 cd is close to the receiving antenna 122 cd and the other end portion of the conductor portion 111 cd is close to the transmitting antenna 121 fd. 111bd and 111cd are bonded together.
- the distance between the upper surface of each conductor part and the lower surface of the semiconductor part 120d is 1 mm or less.
- the propagation part 101a is bonded to the upper surface of the semiconductor part 120, whereas in the semiconductor device 100d in the second embodiment, the propagation part 101d is connected to the circuit board 10d. It is provided above.
- the semiconductor unit 120 may further include a first circuit 141, a switching unit 142, a second circuit 143, and a third circuit 144. Further, instead of the logic unit 131, the first circuit 141, the switching unit 142, the second circuit 143, and the third circuit 144 shown in FIG.
- the logic unit 131 may include the first circuit 141, the switching unit 142, the second circuit 143, and the third circuit 144 shown in FIG.
- the switching unit 142 reads the first mode from the first storage unit 126.
- the read first mode is H
- the switching unit 142 connects the first circuit 141 and the second circuit 143, and connects the first circuit 141 and the first mode.
- the three circuits 144 are disconnected.
- the read first mode is L
- the first circuit 141 and the second circuit 143 are disconnected, and the first circuit 141 and the third circuit 144 are connected.
- the semiconductor unit 120 is mounted on a digital camera.
- the second circuit 143 is a normal operation circuit that outputs a normal signal, and is, for example, an imaging processing unit of a digital camera, and outputs a video signal generated by photographing with the digital camera.
- the third circuit 144 is a test circuit that outputs a test signal. For example, the third circuit 144 outputs test video signals of several predetermined patterns.
- the first circuit 141 is connected to the second circuit 143 or the third circuit 144, receives a video signal from the second circuit 143 or the third circuit 144, and generates compressed video data from the received video signal.
- the semiconductor unit 120 when the first mode is H, the semiconductor unit 120 operates as a circuit unit of a normal digital camera.
- the semiconductor unit 120 performs the test of the first circuit 141. Work for.
- (B) As a second example, it is assumed that the semiconductor unit 120 is mounted on a content reproduction device that reproduces content recorded on a recording medium.
- the recording medium records the encrypted content according to the first encryption method, and the content reproduction device reproduces the decrypted content by decrypting the encrypted content.
- the first circuit 141 reads the encrypted content from the recording medium.
- the second circuit 143 decrypts the encrypted content by the first encryption method.
- the third circuit 144 decrypts the encrypted content by the second encryption method.
- H is stored in the first storage unit 126, and the first circuit 141 and the second circuit 143 are connected. It is assumed that the first encryption method has been decrypted by an unauthorized person after the content playback device has been sold.
- the content encrypted by the second encryption method is recorded and sold on a new recording medium.
- a new propagation unit is attached to the semiconductor unit 120, a new content reproduction device is manufactured and sold, and L is stored in the first storage unit 126.
- the first circuit 141 and the third circuit 144 are connected, and the encrypted content stored in the new recording medium is decrypted and reproduced by the second encryption method.
- the first circuit 141 includes an FPGA (Field Programmable Gate).
- the second circuit 143 is a memory circuit, stores configuration data for configuring the first processing circuit in the FPGA
- the third circuit 144 is also a memory circuit, in the FPGA.
- Configuration data for configuring the second processing circuit may be stored.
- the first circuit 141 that is an FPGA reads configuration data from the second circuit 143 that is a memory circuit, and uses the read configuration data.
- the first processing circuit is configured in the FPGA.
- the first circuit 141 that is an FPGA reads configuration data from the third circuit 144 that is a memory circuit, and uses the read configuration data.
- the second processing circuit is configured in the FPGA.
- the logic unit included in the semiconductor device is, for example, a photographing processing circuit that processes a photographed image photographed by a digital camera.
- the semiconductor portion including each component shown in FIG. 4 is a large-scale integrated circuit (LSI) formed by one silicon device. ).
- the generation unit 125a generates transmission data indicating H or L. However, it is not limited to this.
- the generation unit 125a may generate only transmission data indicating H and output the transmission data to the transmission unit 123a.
- the first mode stored in the first storage unit 126 is L as an initial value.
- H is output to the first storage unit 126 as the first mode.
- the first storage unit 126 stores H as the first mode.
- the generation unit 125a may generate more types of transmission data. For example, transmission data indicating four types of ⁇ 10v, ⁇ 5v, 5v, and 10v may be generated.
- the transmission unit 123a receives transmission data from the generation unit 125a, and generates four types of electrical signals based on the transmission data. Each of these four types of electrical signals is a triangular wave as described above, and the potentials at the apexes thereof are ⁇ 10v, ⁇ 5v, 5v, and 10v, respectively.
- the receiving unit 124a receives the electric signals corresponding to the four types of electric signals, the four types of electric signals are identified, and any one of the four types of mode information corresponding to the identified electric signals is changed to the first mode. Is output to the first storage unit 126.
- the first storage unit 126 stores a first mode indicating any one of four types of mode information.
- the input / output unit 130 uses four types of operations properly according to the first mode stored in the first storage unit 126.
- the semiconductor unit 120 is formed with 6 sets of generating units, transmitting units and transmitting antennas, and 3 sets of receiving units and receiving antennas. Not.
- ⁇ 6 sets of generation units, transmission units, and transmission antennas may be provided, or 7 or more sets of generation units, transmission units, and transmission antennas may be provided.
- less than three sets of receiving units and receiving antennas may be provided, or more than seven sets of receiving units and receiving antennas may be provided.
- the number of modes is increased or decreased according to the number of sets of receiving units and receiving antennas.
- the first storage unit 126, the second storage unit 127, and the third storage unit 128 store the first mode, the second mode, and the third mode, respectively.
- the first storage unit 126, the second storage unit 127, and the third storage unit 128 store the first mode, the second mode, and the third mode, respectively.
- the semiconductor unit 120 includes a mode storage unit instead of the first storage unit 126, the second storage unit 127, and the third storage unit 128, and the mode storage unit stores the first mode, the second mode, and the third mode. May be.
- the semiconductor unit 120 includes the generation units 125a, 125b, 125c, 125d, 125e, and 125f, but is not limited thereto.
- the semiconductor unit 120 includes only one generation unit instead of the generation units 125a, 125b, 125c, 125d, 125e, and 125f.
- the generation unit transmits the same transmission data and transmission clock signal to the transmission unit 123a, respectively.
- 123b, 123c, 123d, 123e, and 123f may be transmitted.
- the semiconductor unit 120 includes only the first and second generation units instead of the generation units 125a, 125b, 125c, 125d, 125e, and 125f, and the first generation unit includes the first transmission data and the transmission
- the clock signal may be transmitted to the transmission units 123a, 123b, and 123c, respectively, and the second generation unit may transmit the second transmission data and the transmission clock signal to the transmission units 123d, 123e, and 123f, respectively.
- the first transmission data indicates H
- the second transmission data indicates L.
- the first transmission data may indicate L
- the second transmission data may indicate H.
- the semiconductor unit 120 includes only one generation unit instead of the generation units 125a, 125b, 125c, 125d, 125e, and 125f, and the generation unit receives the first transmission data and the transmission clock signal, respectively.
- Transmission to the transmission units 123a, 123b, and 123c may be performed, and the second transmission data and the transmission clock signal may be transmitted to the transmission units 123d, 123e, and 123f, respectively.
- the first transmission data indicates H
- the second transmission data indicates L.
- the first transmission data may indicate L
- the second transmission data may indicate H.
- the semiconductor device described in each of the above embodiments includes a digital still camera, a digital video camera, a mobile phone, a content playback device stored in a recording medium such as a DVD or a BD, a digital broadcast receiving device, and a digital content recording. It may be used in a device (video recorder), a video display device (digital television), a personal computer, and the like.
- One conductor part may be affixed on the propagation part, and four or more conductor parts may be affixed.
- the present invention is a semiconductor device, which includes a transmission circuit, a reception circuit, a first antenna connected to the transmission circuit, and a second antenna connected to the reception circuit; And a conductor portion provided close to the first antenna and the second antenna, and proximity wireless communication is used between the transmission circuit and the reception circuit.
- This configuration has an excellent effect that the setting of the internal operation mode can be changed without increasing the number of terminals of the semiconductor device.
- the first antenna and the second antenna are coil-shaped metal wirings, and the first antenna and the second antenna may be coupled by electromagnetic induction via the conductor portion. .
- a sheet including the conductor portion may be attached to the surface of the semiconductor portion.
- the semiconductor part may be provided on the circuit board, and the conductor part may be provided on the circuit board so as to be close to the first antenna and the second antenna.
- the transmitting circuit outputs a first electric signal that changes from a first potential to a second potential to the first antenna
- the receiving circuit detects the changing second electric signal
- the semiconductor portion is Furthermore, a circuit unit that operates by switching an operation mode according to the second electric signal detected by the receiving circuit may be provided.
- the present invention is a signal propagation plate provided in the vicinity of a semiconductor unit including a transmission circuit, a reception circuit, a first antenna connected to the transmission circuit and a second antenna connected to the reception circuit, A conductor portion provided close to the first antenna and the second antenna is provided, and proximity wireless communication is used between the transmission circuit and the reception circuit.
- the semiconductor device using proximity wireless communication can change the setting of the internal operation mode without increasing the number of terminals of the semiconductor device, and can be used for setting the operation mode and the like in the semiconductor device. Applicable to. In particular, it is useful when the same semiconductor device is used in a variety of products (for example, a digital TV, a video recorder, a mobile phone, etc.).
Abstract
Description
本発明に係る一の実施の形態としての半導体装置100aについて説明する。
半導体装置100aは、図1に示すように、図示していない他の電子部品とともに、回路基板10a上に搭載され、図2に示すように、シート状の伝播部101a、半導体部120及びパッケージ部150から構成されている。伝播部101aは、半導体部120の上面に、貼設され、パッケージ部150は、半導体部120の保護のために、その周囲を囲むように設けられている。
伝播部101aは、図2及び図3に示すように、例えば、セロファンシールを材料とするシート状(板状)の信号伝播板であり、アクリル系の接着剤などで、半導体部120の上面において、複数のボンディングパッド151、・・・が形成するロの字の形状の内側に、接着されている。伝播部101aの上面には、導体部111a、111b、111cが設けられている。導体部111a、111b、111cは、例えば、Cu等を材料とし、帯形状を有する箔状の導体である。
アンテナ122aに近接するように、また、導体部111gの端部111gxが、受信アンテナ122bに近接し、導体部111gの他の端部111gyが、送信アンテナ121fに近接するように、伝播部101cの上面に、導体部111f及び111gが接着されている。
半導体部120は、図4に示すように、送信アンテナ121a、121b、121c、121d、121e、121f、送信部123a、123b、123c、123d、123e、123f、生成部125a、125b、125c、125d、125e、125f、受信アンテナ122a、122b、122c、受信部124a、124b、124c、第一記憶部126、第二記憶部127、第三記憶部128、入出力部130及び論理部131から構成され、これらの構成要素は、半導体のプロセス技術を利用して、半導体部120の内部に形成されている。
送信アンテナ121aは、半導体のプロセス技術の多層配線を利用して半導体部120の内部に形成された1回巻き以上のコイル(インダクタ)状の金属配線である。送信アンテナ121aは、磁界が半導体部120の上面に直交する方向を向くように、また、図3に示すように、コイルの上部が半導体部120の上面から露出するように、半導体部120の内部の上面近くに、形成されている。送信アンテナ121b、121c、121d、121e、121f及び受信アンテナ122a、122b、122cについても、送信アンテナ121aと同様に形成されている。
生成部125aは、送信データを生成する。送信データは、H(high level
)又はL(low level)の何れかを示す。生成部125aは、半導体装置100
aがリセットされたとき、その後に、一度だけ、生成した送信データを送信部123aへ出力する。つまり、システム起動時に、一度だけ、送信データを出力する。また、同期信号として、図示していないクロック信号生成部からクロック信号を受け取り、受け取ったクロック信号を送信クロック信号として送信部123aへ出力する。
データを無線により送信する場合に、恒常的にHの状態を保つことは困難であるので、送信部123aは、電気信号が第1のパターンにより変化している状態をHとして出力し、電気信号が第2のパターンにより変化している状態をLとして出力する。第1のパターン及び第2のパターンについては、後述する。
受信部124aは、受信した電気信号が第3のパターンにより変化している状態をHと解釈し、受信した電気信号が第4のパターンにより変化している状態をLと解釈する。ここで、送信部123aが第1のパターンにより変化する電気信号を送信アンテナ部121aへ出力したとき、送信アンテナ部121aと誘導結合した受信アンテナ部122aから、受信部124aは、第3のパターンにより変化する電気信号を受信する。また、送信部123aが第2のパターンにより変化する電気信号を送信アンテナ部121aへ出力したとき、送信アンテナ部121aと誘導結合した受信アンテナ部122aから、受信部12
4aは、第4のパターンにより変化する電気信号を受信する。
第一記憶部126は、第一モードを記憶するための領域を備える。第一モードは、H、L及びHi-Z(ハイインピーダンス)の何れかを示す値をとる。
入出力部130は、外部のバス30aと、論理部131との間で、データの入出力を制御する。また、入出力部130は、第一記憶部126、第二記憶部127及び第三記憶部128にそれぞれ記憶されている第一モード、第二モード、第三モードにより、動作モードを変更して動作する。つまり、入出力部130は、いずれかの受信部により検出した変化する電気信号により、動作モードを切り換えて動作する回路部である。
論理部131は、例えば、MPU(micro processing unit)やDSP(digital
signal processor)やメモリコントローラであり、または、それらを組み合わせたものである。また、論理部131は、入出力部130を介して、外部メモリ20aなどの回路基板10aに搭載された他の電子部品との間で、データの入出力を行う。
(1)伝播部101aの例
図5に、伝播部101a上の導体部111a、111b、111cの配置、半導体部120の送信アンテナ部と受信アンテナ部との誘導結合、及び第一記憶部126、第二記憶部127及び第三記憶部128に記憶されている第一モード、第二モード及び第三モードの関係を示す。
aへ出力すると、送信アンテナ121aと受信アンテナ122aとは、導体部111aを介して、電磁誘導により結合する。このため、受信部124aは、受信アンテナ122aから、第3のパターンにより変化する電気信号を受信する。受信部124aが受信した電気信号は、電位が変化しているので、受信部124aが、第3のパターンにより電位の変化する電気信号を検出すると、第一モードとして、Hを第一記憶部126へ出力する。第一記憶部126は、第一モードとして、Hを記憶する。図5には、この場合において、信号の伝わる経路201を示している。また、この場合の第一モードを示している。
図6に、伝播部101b上の導体部111d、111eの配置、半導体部120の送信アンテナ部と受信アンテナ部との誘導結合、及び第一記憶部126、第二記憶部127及び第三記憶部128に記憶される第一モード、第二モード及び第三モードの関係を示す。
2cから、第3のパターンにより変化する電気信号を受信する。受信部124bが受信した電気信号は、電位が変化しているので、受信部124bが、第3のパターンにより電位の変化する電気信号を検出すると、第二モードとして、Hを第二記憶部127へ出力する。第二記憶部127は、第二モードとして、Hを記憶する。図6には、この場合において、信号の伝わる経路204を示している。また、この場合の第二モードを示している。また、受信部124cが受信した電気信号は、電位が変化しているので、受信部124cが、第3のパターンにより電位の変化する電気信号を検出すると、第三モードとして、Hを第三記憶部128へ出力する。第三記憶部128は、第三モードとして、Hを記憶する。図6には、この場合において、信号の伝わる経路205を示している。また、この場合の第三モードを示している。
図7に、伝播部101c上の導体部111f、111gの配置、半導体部120の送信
アンテナ部と受信アンテナ部との誘導結合、及び第一記憶部126、第二記憶部127及び第三記憶部128に記憶される第一モード、第二モード及び第三モードの関係を示す。
上記において説明した各伝播部を貼り付けた半導体装置の応用例について、説明する。
シュメモリ20aが搭載され、回路基板10bには、半導体装置100b、16ビット幅のバス30b及びNORフラッシュメモリ20bが搭載され、回路基板10cには、半導体装置100c、NANDバス30c及びNANDフラッシュメモリ20cが搭載されている。なお、各回路基板にはその他の電子部品も搭載されているが、これらを省略している。
Dフラッシュメモリ(第一モード=L)となり、バス幅は、16ビット(第二モード=H)となる。
本発明に係る別の実施の形態としての半導体装置100dについて説明する。
なお、本発明を上記の実施の形態に基づいて説明してきたが、本発明は、上記の実施の形態に限定されないのはもちろんである。以下のような場合も本発明に含まれる。
Array)であり、第二回路143は、メモリ回路であり、FPGAにおいて、第1の処理
回路を構成するための構成データを記憶しており、第三回路144も、メモリ回路であり、FPGAにおいて、第2の処理回路を構成するための構成データを記憶しているとしてもよい。第一記憶部126に記憶されている第一モードがHである場合には、FPGAである第一回路141は、メモリ回路である第二回路143から構成データを読み出し、読み出した構成データを用いて、FPGAに第1の処理回路を構成する。第一記憶部126に記憶されている第一モードがLである場合には、FPGAである第一回路141は、メモリ回路である第三回路144から構成データを読み出し、読み出した構成データを用いて、FPGAに第2の処理回路を構成する。
)であるとしても良い。
データ及び送信クロック信号を、それぞれ、送信部123a、123b及び123cへ送信し、第2の生成部は、第2の送信データ及び送信クロック信号を、それぞれ、送信部123d、123e及び123fへ送信するとしてもよい。ここで、第1の送信データは、Hを示し、第2の送信データは、Lを示す。なお、逆に、第1の送信データは、Lを示し、第2の送信データは、Hを示すとしてもよい。
なく、内部の動作モードの設定変更をすることができ、半導体装置において、動作モードなどを設定する等の用途に適用できる。特に、同一の半導体装置を、多品種(例えば、デジタルテレビ、ビデオレコーダ、携帯電話など)において用いる場合において有用である。
100a、100b、100c、100d 半導体装置
101a、101b、101c、101d 伝播部
111a、111b、111c、111d 導体部
111e、111f、111g 導体部
120、120d 半導体部
121a、121b、121c、121d、121e、121f 送信アンテナ
122a、122b、122c 受信アンテナ
123a、123b、123c、123d、123e、123f 送信部
124a、124b、124c 受信部
125a、125b、125c、125d、125e、125f 生成部
126 第一記憶部
127 第二記憶部
128 第三記憶部
130 入出力部
131 論理部
150、150d パッケージ部
Claims (6)
- 半導体装置であって、
送信回路、受信回路、前記送信回路に接続された第1アンテナ及び前記受信回路に接続された第2アンテナを備える半導体部と、
前記第1アンテナ及び前記第2アンテナに近接して設けられた導体部とを備え、
前記送信回路及び前記受信回路の間で近接無線通信を用いる
ことを特徴とする半導体装置。 - 前記第1アンテナ及び前記第2アンテナは、コイル状の金属配線であり、
前記第1アンテナと前記第2アンテナとは、前記導体部を介して、電磁誘導により結合される
ことを特徴とする請求項1に記載の半導体装置。 - 前記導体部を備えるシートが前記半導体部表面に貼設されている
ことを特徴とする請求項2に記載の半導体装置。 - 前記半導体部は、回路基板上に設けられ、
前記第1アンテナ及び前記第2アンテナに近接するように、前記導体部が前記回路基板上に設けられている
ことを特徴とする請求項2に記載の半導体装置。 - 前記送信回路は、第1電位から第2電位に変化する第1電気信号を前記第1アンテナへ出力し、
前記受信回路は、変化する第2電気信号を検出し、
前記半導体部は、さらに、前記受信回路により検出した前記第2電気信号により、動作モードを切り換えて動作する回路部を備える
ことを特徴とする請求項2に記載の半導体装置。 - 送信回路、受信回路、前記送信回路に接続された第1アンテナ及び前記受信回路に接続された第2アンテナを備える半導体部に近接して設けられる信号伝播板であって、
前記第1アンテナ及び前記第2アンテナに近接して設けられた導体部を備え、
前記送信回路及び前記受信回路の間で近接無線通信を用いる
ことを特徴とする信号伝播板。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP11832266.8A EP2629328A4 (en) | 2010-10-13 | 2011-10-04 | SEMICONDUCTOR ELEMENT WITH NEAR WIRELESS PROXIMITY COMMUNICATION |
JP2012538562A JP5923717B2 (ja) | 2010-10-13 | 2011-10-04 | 近接無線通信を用いた半導体装置 |
CN201180004938.5A CN102656682B (zh) | 2010-10-13 | 2011-10-04 | 采用邻近无线通信的半导体装置 |
US13/513,923 US8952472B2 (en) | 2010-10-13 | 2011-10-04 | Semiconductor device using close proximity wireless communication |
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JP2010-230184 | 2010-10-13 |
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PCT/JP2011/005599 WO2012049821A1 (ja) | 2010-10-13 | 2011-10-04 | 近接無線通信を用いた半導体装置 |
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US (1) | US8952472B2 (ja) |
EP (1) | EP2629328A4 (ja) |
JP (1) | JP5923717B2 (ja) |
CN (1) | CN102656682B (ja) |
TW (1) | TW201219808A (ja) |
WO (1) | WO2012049821A1 (ja) |
Cited By (1)
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JP2023014293A (ja) * | 2019-11-26 | 2023-01-26 | 国立大学法人 東京大学 | 情報処理装置 |
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KR20140139340A (ko) * | 2013-05-27 | 2014-12-05 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
JP6975898B2 (ja) * | 2017-12-26 | 2021-12-01 | パナソニックIpマネジメント株式会社 | 推定方法、推定装置およびプログラム |
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JP2892131B2 (ja) | 1990-09-25 | 1999-05-17 | アイシン・エィ・ダブリュ株式会社 | 自動変速機 |
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JP2004119921A (ja) | 2002-09-30 | 2004-04-15 | Renesas Technology Corp | 半導体集積回路 |
US7519396B2 (en) | 2004-07-23 | 2009-04-14 | Panasonic Corporation | Integrated circuit package |
JP2007036722A (ja) * | 2005-07-27 | 2007-02-08 | Toshiba Corp | 半導体装置 |
US20080191883A1 (en) * | 2007-02-12 | 2008-08-14 | Checkpoint Systems, Inc. | Resonant tag |
JP5258343B2 (ja) | 2008-03-27 | 2013-08-07 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体集積回路 |
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2011
- 2011-10-04 JP JP2012538562A patent/JP5923717B2/ja not_active Expired - Fee Related
- 2011-10-04 US US13/513,923 patent/US8952472B2/en not_active Expired - Fee Related
- 2011-10-04 WO PCT/JP2011/005599 patent/WO2012049821A1/ja active Application Filing
- 2011-10-04 EP EP11832266.8A patent/EP2629328A4/en not_active Withdrawn
- 2011-10-04 CN CN201180004938.5A patent/CN102656682B/zh not_active Expired - Fee Related
- 2011-10-05 TW TW100136048A patent/TW201219808A/zh unknown
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JPS62294327A (ja) * | 1986-05-19 | 1987-12-21 | Sanyo Electric Co Ltd | スイツチ回路 |
JPH06294843A (ja) * | 1993-04-12 | 1994-10-21 | Hitachi Ltd | ピン引出し用配線シール及びピン引出し用配線を具えた実装ボード |
JP4131544B2 (ja) | 2004-02-13 | 2008-08-13 | 学校法人慶應義塾 | 電子回路 |
JP2006060786A (ja) * | 2004-07-23 | 2006-03-02 | Matsushita Electric Ind Co Ltd | 集積回路パッケージ |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2023014293A (ja) * | 2019-11-26 | 2023-01-26 | 国立大学法人 東京大学 | 情報処理装置 |
JP7455424B2 (ja) | 2019-11-26 | 2024-03-26 | 国立大学法人 東京大学 | 情報処理装置 |
Also Published As
Publication number | Publication date |
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JPWO2012049821A1 (ja) | 2014-02-24 |
US8952472B2 (en) | 2015-02-10 |
CN102656682A (zh) | 2012-09-05 |
TW201219808A (en) | 2012-05-16 |
JP5923717B2 (ja) | 2016-05-25 |
EP2629328A4 (en) | 2014-07-16 |
CN102656682B (zh) | 2016-06-08 |
EP2629328A1 (en) | 2013-08-21 |
US20120241888A1 (en) | 2012-09-27 |
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