CN105490671A - 高隔离度宽带开关 - Google Patents
高隔离度宽带开关 Download PDFInfo
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- CN105490671A CN105490671A CN201510629841.3A CN201510629841A CN105490671A CN 105490671 A CN105490671 A CN 105490671A CN 201510629841 A CN201510629841 A CN 201510629841A CN 105490671 A CN105490671 A CN 105490671A
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- bonding wire
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/642—Capacitive arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6611—Wire connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48155—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48157—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10161—Shape being a cuboid with a rectangular active surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/142—HF devices
- H01L2924/1421—RF devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (18)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201462058507P | 2014-10-01 | 2014-10-01 | |
US62/058,507 | 2014-10-01 | ||
US14/852,380 | 2015-09-11 | ||
US14/852,380 US9893025B2 (en) | 2014-10-01 | 2015-09-11 | High isolation wideband switch |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105490671A true CN105490671A (zh) | 2016-04-13 |
CN105490671B CN105490671B (zh) | 2019-07-16 |
Family
ID=
Citations (20)
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US5221912A (en) * | 1991-10-24 | 1993-06-22 | Keane William J | YIG tuned band reject filter for 2-18 GHz with full one-quarter wavelength RF coupling loops |
CN1146664A (zh) * | 1995-07-07 | 1997-04-02 | 富士通合成半导体公司 | 用于直播卫星传输的单平衡降频器和混合环信号组合器 |
US6002589A (en) * | 1997-07-21 | 1999-12-14 | Rambus Inc. | Integrated circuit package for coupling to a printed circuit board |
CN1264188A (zh) * | 1999-01-27 | 2000-08-23 | 半导体射频系统公司 | 用于双极化天线的隔离改进电路 |
CN1335674A (zh) * | 2000-06-22 | 2002-02-13 | 德克萨斯仪器股份有限公司 | 一种带有键合引线电感的片上信号滤波器 |
US20050271148A1 (en) * | 2004-06-03 | 2005-12-08 | Timothy Dupuis | RF isolator with differential input/output |
US20080278256A1 (en) * | 2007-05-11 | 2008-11-13 | Intersil Americas Inc. | Rf - coupled digital isolator |
US20080296050A1 (en) * | 2007-04-27 | 2008-12-04 | Denso Corporation | Semiconductor chip mounting board with multiple ports |
US20090236701A1 (en) * | 2008-03-18 | 2009-09-24 | Nanyang Technological University | Chip arrangement and a method of determining an inductivity compensation structure for compensating a bond wire inductivity in a chip arrangement |
CN101553918A (zh) * | 2005-10-24 | 2009-10-07 | 飞思卡尔半导体公司 | 半导体结构以及组装方法 |
KR20110051016A (ko) * | 2009-11-09 | 2011-05-17 | 삼성전기주식회사 | 연결형 vdd 패드가 형성된 인쇄회로기판 |
CN202085387U (zh) * | 2011-06-01 | 2011-12-21 | 北京大学 | 功率射频耦合器 |
CN103123918A (zh) * | 2013-01-04 | 2013-05-29 | 天津大学 | 一种射频半导体器件 |
US20130260708A1 (en) * | 2006-06-21 | 2013-10-03 | Broadcom Corporation | Power recovery circuit based on partial standing waves |
CN103413821A (zh) * | 2013-05-07 | 2013-11-27 | 天津大学 | 半导体器件 |
CN103718469A (zh) * | 2011-08-01 | 2014-04-09 | 株式会社村田制作所 | 高频模块 |
CN102299686B (zh) * | 2010-06-01 | 2014-04-30 | Nxp股份有限公司 | 电感电路装置 |
CN203589181U (zh) * | 2012-10-31 | 2014-05-07 | 安捷伦科技有限公司 | 正向耦合的定向耦合器 |
CN103812457A (zh) * | 2012-11-12 | 2014-05-21 | 安华高科技通用Ip(新加坡)公司 | 在功率放大器中提供集成定向耦合器 |
CN101877683B (zh) * | 2009-03-30 | 2014-08-13 | 硅谷实验室公司 | 电容型隔离电路 |
Patent Citations (21)
Publication number | Priority date | Publication date | Assignee | Title |
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US5221912A (en) * | 1991-10-24 | 1993-06-22 | Keane William J | YIG tuned band reject filter for 2-18 GHz with full one-quarter wavelength RF coupling loops |
CN1146664A (zh) * | 1995-07-07 | 1997-04-02 | 富士通合成半导体公司 | 用于直播卫星传输的单平衡降频器和混合环信号组合器 |
US6002589A (en) * | 1997-07-21 | 1999-12-14 | Rambus Inc. | Integrated circuit package for coupling to a printed circuit board |
CN1264188A (zh) * | 1999-01-27 | 2000-08-23 | 半导体射频系统公司 | 用于双极化天线的隔离改进电路 |
CN1335674A (zh) * | 2000-06-22 | 2002-02-13 | 德克萨斯仪器股份有限公司 | 一种带有键合引线电感的片上信号滤波器 |
US20050271148A1 (en) * | 2004-06-03 | 2005-12-08 | Timothy Dupuis | RF isolator with differential input/output |
CN101553918A (zh) * | 2005-10-24 | 2009-10-07 | 飞思卡尔半导体公司 | 半导体结构以及组装方法 |
US20130260708A1 (en) * | 2006-06-21 | 2013-10-03 | Broadcom Corporation | Power recovery circuit based on partial standing waves |
US20080296050A1 (en) * | 2007-04-27 | 2008-12-04 | Denso Corporation | Semiconductor chip mounting board with multiple ports |
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US20080278256A1 (en) * | 2007-05-11 | 2008-11-13 | Intersil Americas Inc. | Rf - coupled digital isolator |
US20090236701A1 (en) * | 2008-03-18 | 2009-09-24 | Nanyang Technological University | Chip arrangement and a method of determining an inductivity compensation structure for compensating a bond wire inductivity in a chip arrangement |
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CN202085387U (zh) * | 2011-06-01 | 2011-12-21 | 北京大学 | 功率射频耦合器 |
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CN203589181U (zh) * | 2012-10-31 | 2014-05-07 | 安捷伦科技有限公司 | 正向耦合的定向耦合器 |
CN103812457A (zh) * | 2012-11-12 | 2014-05-21 | 安华高科技通用Ip(新加坡)公司 | 在功率放大器中提供集成定向耦合器 |
CN103123918A (zh) * | 2013-01-04 | 2013-05-29 | 天津大学 | 一种射频半导体器件 |
CN103413821A (zh) * | 2013-05-07 | 2013-11-27 | 天津大学 | 半导体器件 |
Non-Patent Citations (2)
Title |
---|
H. KHATRI: ""On-chip monolithic filters for receiver interference suppression using bond-wire inductors"", 《SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, 2006. DIGEST OF PAPERS. 2006 TOPICAL MEETING ON》 * |
I.DOERR: ""Parameterized models for a RF chip-to-substrate interconnect"", 《ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, 2001. PROCEEDINGS., 51ST》 * |
Also Published As
Publication number | Publication date |
---|---|
US9893025B2 (en) | 2018-02-13 |
EP3002783A3 (en) | 2016-06-08 |
US20160099220A1 (en) | 2016-04-07 |
EP3002783A2 (en) | 2016-04-06 |
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