WO2009151284A3 - 이중 하드마스크막을 이용한 씨모스이미지센서 제조 방법 - Google Patents

이중 하드마스크막을 이용한 씨모스이미지센서 제조 방법 Download PDF

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Publication number
WO2009151284A3
WO2009151284A3 PCT/KR2009/003131 KR2009003131W WO2009151284A3 WO 2009151284 A3 WO2009151284 A3 WO 2009151284A3 KR 2009003131 W KR2009003131 W KR 2009003131W WO 2009151284 A3 WO2009151284 A3 WO 2009151284A3
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WO
WIPO (PCT)
Prior art keywords
coating
hard mask
logic region
gate
mask coating
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Application number
PCT/KR2009/003131
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English (en)
French (fr)
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WO2009151284A2 (ko
Inventor
백운석
Original Assignee
크로스텍 캐피탈, 엘엘씨
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 크로스텍 캐피탈, 엘엘씨 filed Critical 크로스텍 캐피탈, 엘엘씨
Priority to CN2009801220909A priority Critical patent/CN102099915A/zh
Priority to US12/996,999 priority patent/US20110164161A1/en
Priority to EP09762671.7A priority patent/EP2306521A4/en
Priority to JP2011513425A priority patent/JP5226863B2/ja
Publication of WO2009151284A2 publication Critical patent/WO2009151284A2/ko
Publication of WO2009151284A3 publication Critical patent/WO2009151284A3/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685Process for coatings or optical elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1462Coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689MOS based technologies

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 로직영역에 실리사이드를 형성하고 화소영역에 이온주입을 이용하게 하면서도 하드마스크막 제거 공정이 필요없고 하드마스크막의 두께를 낮게 유지할 수 있으며, 게이트패턴 형성시 임계선폭 제어가 용이하게 하며, 게이트포토레지스트패턴의 임계선폭 균일도를 향상시킬 수 있는 씨모스이미지센서 제조 방법을 제공하기 위한 것으로, 본 발명의 씨모스이미지센서 제조 방법은 화소영역과 로직영역이 정의된 기판 상부에 게이트도전막을 형성하는 단계; 상기 게이트도전막 상에 상기 화소영역에 형성되는 두께가 상기 로직영역에 형성되는 두께보다 두꺼운 하드마스크막을 형성하는 단계; 상기 하드마스크막 상에 유기반사방지막을 형성하는 단계; 상기 유기반사방지막 상에 제1포토레지스트패턴을 형성하는 단계; 상기 제1포토레지스트패턴을 식각장벽으로 하여 상기 유기반사방지막과 하드마스크막을 식각하는 단계; 상기 하드마스크막을 식각장벽으로 상기 게이트도전막을 식각하여 상기 화소영역과 로직영역에 각각 게이트패턴을 형성하는 단계; 상기 로직영역에 잔류하는 하드마스크막을 제거하는 단계; 및 상기 로직영역에 실리사이드를 형성하는 단계를 포함한다.
PCT/KR2009/003131 2008-06-11 2009-06-10 이중 하드마스크막을 이용한 씨모스이미지센서 제조 방법 WO2009151284A2 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN2009801220909A CN102099915A (zh) 2008-06-11 2009-06-10 采用双硬掩模涂层制造cmos图像传感器的方法
US12/996,999 US20110164161A1 (en) 2008-06-11 2009-06-10 Method of manufacturing cmos image sensor using double hard mask layer
EP09762671.7A EP2306521A4 (en) 2008-06-11 2009-06-10 METHOD FOR MANUFACTURING CMOS IMAGE SENSORS BASED ON THE USE OF DOUBLE HARD MASK COATING
JP2011513425A JP5226863B2 (ja) 2008-06-11 2009-06-10 2重ハードマスク層を使用したcmosイメージセンサの製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020080054879A KR20090128902A (ko) 2008-06-11 2008-06-11 이중 하드마스크막을 이용한 씨모스이미지센서 제조 방법
KR10-2008-0054879 2008-06-11

Publications (2)

Publication Number Publication Date
WO2009151284A2 WO2009151284A2 (ko) 2009-12-17
WO2009151284A3 true WO2009151284A3 (ko) 2010-04-15

Family

ID=41417257

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2009/003131 WO2009151284A2 (ko) 2008-06-11 2009-06-10 이중 하드마스크막을 이용한 씨모스이미지센서 제조 방법

Country Status (6)

Country Link
US (1) US20110164161A1 (ko)
EP (1) EP2306521A4 (ko)
JP (1) JP5226863B2 (ko)
KR (1) KR20090128902A (ko)
CN (1) CN102099915A (ko)
WO (1) WO2009151284A2 (ko)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9034742B2 (en) 2013-10-04 2015-05-19 Samsung Electronics Co., Ltd. Method for fabricating semiconductor device
CN103887224B (zh) * 2014-03-20 2017-01-11 上海华力微电子有限公司 一种形成浅沟槽隔离的方法
CN106816441B (zh) * 2015-12-02 2019-07-30 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
CN111146226A (zh) * 2019-12-30 2020-05-12 格科微电子(上海)有限公司 前照式图像传感器的形成方法及前照式图像传感器
CN117153786B (zh) * 2023-10-31 2024-03-01 合肥晶合集成电路股份有限公司 一种半导体结构及其制造方法
CN117878060B (zh) * 2024-03-11 2024-05-28 合肥晶合集成电路股份有限公司 一种半导体结构及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6730610B1 (en) * 2002-12-20 2004-05-04 Taiwan Semiconductor Manufacturing Co., Ltd Multiple thickness hard mask method for optimizing laterally adjacent patterned layer linewidths
KR20040059982A (ko) * 2002-12-30 2004-07-06 주식회사 하이닉스반도체 반도체소자의 전도 패턴 형성 방법
KR100772271B1 (ko) * 2006-08-16 2007-11-01 동부일렉트로닉스 주식회사 이미지 센서 소자의 콘택 제조 방법

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3624140B2 (ja) * 1999-08-05 2005-03-02 キヤノン株式会社 光電変換装置およびその製造方法、デジタルスチルカメラ又はデジタルビデオカメラ
JP3782297B2 (ja) * 2000-03-28 2006-06-07 株式会社東芝 固体撮像装置及びその製造方法
US6448595B1 (en) * 2000-06-26 2002-09-10 Twin Han Technology Co., Ltd. Active photodiode CMOS image sensor structure
US20020142252A1 (en) * 2001-03-29 2002-10-03 International Business Machines Corporation Method for polysilicon conductor (PC) Trimming for shrinking critical dimension and isolated-nested offset correction
US6518151B1 (en) * 2001-08-07 2003-02-11 International Business Machines Corporation Dual layer hard mask for eDRAM gate etch process
JP3757213B2 (ja) * 2003-03-18 2006-03-22 富士通株式会社 半導体装置の製造方法
US7118987B2 (en) * 2004-01-29 2006-10-10 Taiwan Semiconductor Manufacturing Co., Ltd. Method of achieving improved STI gap fill with reduced stress
US7125775B1 (en) * 2004-03-18 2006-10-24 Integrated Device Technology, Inc. Method for forming hybrid device gates
JP2006032688A (ja) * 2004-07-16 2006-02-02 Fujitsu Ltd 固体撮像装置
TWI302754B (en) * 2005-02-28 2008-11-01 Magnachip Semiconductor Ltd Complementary metal-oxide-semiconductor image sensor and method for fabricating the same
CN100468752C (zh) * 2005-11-24 2009-03-11 联华电子股份有限公司 半导体元件及其制作方法
KR100694480B1 (ko) * 2005-12-22 2007-03-12 매그나칩 반도체 유한회사 반도체 소자의 게이트 전극 형성방법
KR100713349B1 (ko) * 2005-12-28 2007-05-04 동부일렉트로닉스 주식회사 Cmos 이미지 센서의 제조 방법
US7531374B2 (en) * 2006-09-07 2009-05-12 United Microelectronics Corp. CMOS image sensor process and structure
KR20090090776A (ko) * 2008-02-22 2009-08-26 삼성전자주식회사 이미지 센서 및 그 제조 방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6730610B1 (en) * 2002-12-20 2004-05-04 Taiwan Semiconductor Manufacturing Co., Ltd Multiple thickness hard mask method for optimizing laterally adjacent patterned layer linewidths
KR20040059982A (ko) * 2002-12-30 2004-07-06 주식회사 하이닉스반도체 반도체소자의 전도 패턴 형성 방법
KR100772271B1 (ko) * 2006-08-16 2007-11-01 동부일렉트로닉스 주식회사 이미지 센서 소자의 콘택 제조 방법

Also Published As

Publication number Publication date
EP2306521A2 (en) 2011-04-06
US20110164161A1 (en) 2011-07-07
CN102099915A (zh) 2011-06-15
JP5226863B2 (ja) 2013-07-03
WO2009151284A2 (ko) 2009-12-17
EP2306521A4 (en) 2013-05-22
KR20090128902A (ko) 2009-12-16
JP2011523227A (ja) 2011-08-04

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