WO2007123040A1 - 電力増幅器 - Google Patents
電力増幅器 Download PDFInfo
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- WO2007123040A1 WO2007123040A1 PCT/JP2007/058059 JP2007058059W WO2007123040A1 WO 2007123040 A1 WO2007123040 A1 WO 2007123040A1 JP 2007058059 W JP2007058059 W JP 2007058059W WO 2007123040 A1 WO2007123040 A1 WO 2007123040A1
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- amplifier
- circuit
- distortion
- order intermodulation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
Definitions
- the present invention relates to a power amplifier used in wireless communication.
- FIG. 1 is a block diagram showing a feedforward amplifier for realizing low distortion characteristics.
- the feedforward amplifier includes amplifier 1, delay lines 10 and 11, a subtractor 2 that combines the signal from amplifier 1 and the signal of delay line 10 force to extract third-order intermodulation distortion 6, and third-order intermodulation.
- An error amplifier 3 that amplifies the distortion 6 to generate a third-order intermodulation distortion 7 and a combiner 4 that cancels the third-order intermodulation distortion 6 and the third-order intermodulation distortion 7 are included.
- the operation of the feedforward amplifier shown in FIG. 1 will be briefly described.
- the input signal 12 is input from the input terminal 13
- the input signal 12 is input to the amplifier 1 and the delay line 10.
- the output signal from the amplifier 1 includes third-order intermodulation distortion 6 in addition to the amplified main signal 5.
- the subtractor 2 extracts the third-order intermodulation distortion 6 generated in the amplifier 1 by synthesizing these signals.
- the error amplifier 3 amplifies the input third-order intermodulation distortion 6 and outputs the amplified third-order intermodulation distortion 7.
- the synthesizer 4 adds the main signal 5 and the third order intermodulation distortion 6 input via the delay line 11 and the third order intermodulation distortion 7 from the error amplifier 3.
- the third-order intermodulation distortion 9 due to the addition of the third-order intermodulation distortion 6 and the third-order intermodulation distortion 7 is canceled in the signal output from the output terminal 14.
- distortion compensation is performed using distortion itself that also generates amplifier force, so that a large amount of distortion compensation can be realized, as described in “MWE2004 Microwave Workshop Digest, pp.575-584, 2004, November” ( In the following, it is referred to as document 1).
- FIG. 2 is a block diagram showing the distortion compensation type amplification device proposed in Document 2.
- FIG. 2 is a block diagram showing a configuration example of a conventional amplification device.
- the amplifying apparatus includes a low distortion amplifier 21, 22, a high distortion amplifier 23, a phase equalizer 24, a hybrid transformer 25, a combiner 26, It is the structure which has.
- the hybrid transformer 25 distributes the input signal 37 to the main signal 28 having the same phase as the input signal 37 and the main signal 27 obtained by inverting the phase of the input signal 37 by 180 °. To do.
- the main signal 28 is input to the low distortion amplifier 21, and the main signal 27 is input to the high distortion amplifier 23.
- the low distortion amplifier 21 and the low distortion amplifier 22 amplify the main signal 28, so that the main signal 29 and the third-order intermodulation distortion 30 obtained by amplifying the main signal 28 are output from the low distortion amplifier 22.
- the high distortion amplifier 23 when receiving the main signal 27 from the hybrid transformer 25, the high distortion amplifier 23 generates third-order intermodulation distortion 32 for distortion compensation from the main signal 27. Subsequently, the main signal 27 and the third-order intermodulation distortion 32 are output.
- the phase equalizer 24 provided in the subsequent stage of the high distortion amplifier 23 receives the main signal 27 and the third order intermodulation distortion 32 from the high distortion amplifier 23
- the phase equalizer 24 in the low distortion amplifier 21 The shift is corrected, and the phase is corrected so that the phase is opposite to the phase of the third-order intermodulation distortion 30 output from the low distortion amplifier 22. Then, the phase-adjusted third order intermodulation distortion 32 and the main signal 31 replacing the main signal 27 are output.
- the synthesizer 26 synthesizes the main signal 29 and third-order intermodulation distortion 30 output from the low distortion amplifier 22 and the main signal 31 and third-order intermodulation distortion 32 output from the phase equalizer 24. .
- the third-order intermodulation distortion 34 output to the output terminal 36 can be canceled, and the relative strength of the third-order intermodulation distortion 34 with respect to the main signal 33 can be reduced at the output terminal 36.
- distortion compensation is possible with a single loop configuration, and the circuit scale is reduced.
- Fig. 3 is a block diagram showing an example of the configuration of a conventional Dono / Tee type amplifier.
- the Dono-tee amplifier includes a main amplifier 41, a sub-amplifier 42, a ⁇ 4 wire 43, 44, a synthesizer 45, an input terminal 46, an output terminal 47, and a distributor 48.
- the main amplifier 41 is set to a class A to AB bias state
- the sub-amplifier 42 is set to a class C bias state.
- Input terminal 46 force
- the distributor 48 distributes the input signal 51 to the path to the main amplifier 41 and the path to the ⁇ 4 line 43 and the sub-amplifier 42.
- Each of the main amplifier 41 and the sub-amplifier 42 amplifies the received input signal 51.
- the main amplifier 41 amplifies the input signal 51 and sends it to the synthesizer 45 via the ⁇ 4 line 44.
- the sub-amplifier 42 amplifies the input signal 51 received via the ⁇ 4 line 43 and sends it to the combiner 45.
- the synthesizer 45 synthesizes the signal received from the main amplifier 41 and the signal received from the sub-amplifier 42 via the ⁇ 4 line 44 and outputs it to the output terminal 47.
- the load impedance of the main amplifier 41 is optimized in a wide range of input power using the fact that the output impedance of the sub-amplifier 42 changes as the input power increases. Can be designed. As a result, the efficiency can be improved over the wide range of input power compared to the case of the main amplifier 41 alone.
- the first problem to be solved is that unnecessary power loss occurs in the conventional distortion compensation method, and power loss occurs.
- the feedforward amplifier referred to in FIG. 1 requires an error amplifier and a delay circuit, which causes a problem of increasing power consumption.
- the error amplifier needs to be of a certain size, and the error amplifier itself does not output the main signal, so the power efficiency is remarkably increased. Decrease.
- a delay line is necessary to perform good distortion compensation over a wide band.
- the delay line is on the output side of the main amplifier, there is a problem that the loss of this line reduces the efficiency of the entire amplifier.
- the main signal is synthesized in an out-of-phase state in the output synthesizer, so that the power of the main signal is reduced. There is a problem of reducing power efficiency because of loss.
- the second problem to be solved is that in the conventional high efficiency amplifier, a large signal distortion occurs and the linearity deteriorates.
- the main signal In-phase third-order intermodulation distortion occurs, which causes signal distortion.
- the sub-amplifier 42 is placed in a class C bias state, so that third-order intermodulation distortion 55 is generated in the same manner, and the entire third-order intermodulation is generated. The problem of signal distortion that distortion 57 becomes large arises.
- the present invention has been made to solve the problems of the conventional techniques as described above, and an object thereof is to provide a power amplifier that suppresses power loss and reduces distortion.
- the power amplifier according to the present invention receives the input signal distributed by the distributor that distributes the input signal, and each of the two main signals having different frequencies included in the input signal.
- Reverse-phase third-order intermodulation distortion generator circuit that outputs modulation distortion, anti-phase third-order intermodulation distortion generator circuit, first amplifier that amplifies and outputs the received signal, and input signal distributed by the distributor And a synthesizer that synthesizes the output signal of the first amplifier and the output signal of the second amplifier.
- the amplifier when the input signal is amplified in the second amplification path, third-order intermodulation distortion having the same phase as the main signal is generated. The amplitude is reduced by the antiphase third-order intermodulation distortion generated by the distortion generation circuit.
- the main signal output from the combiner is a signal amplified by each of the first amplifier and the second amplifier. Therefore, it is possible to reduce distortion while suppressing the power loss that occurs in the conventional parallel type low distortion amplifier! In addition, the amplifier can operate with high efficiency and low distortion.
- FIG. 1 is a block diagram showing a configuration example of a conventional feedforward amplifier.
- FIG. 2 is a block diagram showing a configuration example of an amplifier having a conventional distortion compensation method.
- FIG. 3 is a block diagram showing an example of the configuration of a conventional Dono / tee amplifier.
- FIG. 4 is a block diagram showing a configuration example of the power amplifier according to the first embodiment.
- FIG. 5 is a block diagram showing a configuration example of the antiphase third-order intermodulation distortion generating circuit in the power amplifier shown in FIG.
- FIG. 6 is a conceptual diagram showing a third-order nonlinear process and third-order intermodulation distortion generated by the process.
- FIG. 7 is a conceptual diagram showing a second-order nonlinear process and third-order intermodulation distortion caused by the process.
- FIG. 8 is a block diagram showing a configuration example of a power amplifier according to a second embodiment.
- FIG. 9 is a circuit diagram showing a specific example of an antiphase third-order intermodulation distortion generating circuit.
- Fig. 10 is a graph showing the change in impedance in the RF fundamental band and the change in the ratio of its real part to the absolute value with respect to the capacitance value of the capacitive element of the amplitude adjustment circuit shown in Fig. 9.
- FIG. 11 is a graph showing changes in the amplitude and phase of the third-order intermodulation distortion with respect to the capacitance value of the capacitive element in the amplitude adjustment circuit shown in FIG.
- Fig. 12 is a graph for comparing the characteristic results of the configuration with and without the phase adjustment circuit.
- FIG. 13 is a circuit diagram showing an amplification path including amplifier 61 and antiphase IMD3 generation circuit 63 in the circuit configuration shown in FIG.
- FIG. 14 is a circuit diagram showing an amplification path including the amplifier 62 in the circuit configuration shown in FIG.
- Figure 15 is the circuit shown in each of FIGS. 13 and 14, it relates to the main signal and the third-order phase intermodulation distortion of phase is a graph showing the average input power dependence of 2 ton e signal.
- FIG. 16 is 8, the circuit shown in each of FIGS. 13 and 14, a graph illustrating the relative amplitude intensities for the main signal of the third-order intermodulation modulation distortion, the average input power dependence of 2 ton e signal It is.
- FIG. 17 is a circuit diagram showing a first modification of the second embodiment.
- FIG. 18 is a circuit diagram showing a second modification of the second embodiment.
- FIG. 19 is a circuit diagram showing a third modification of the second embodiment.
- FIG. 20 is a circuit diagram showing a fourth modification of the second embodiment.
- FIG. 21 is a circuit diagram showing a fifth modification of the second embodiment.
- FIG. 22 is a circuit diagram showing a sixth modification of the second embodiment.
- FIG. 23 is a circuit diagram showing a seventh modification of the second embodiment.
- FIG. 24 is a circuit diagram showing an eighth modification of the second embodiment.
- FIG. 25 is a circuit diagram showing a ninth modification of the second embodiment.
- FIG. 26 is a circuit diagram showing a tenth modification of the second embodiment.
- FIG. 27 is a block diagram showing a configuration example of a power amplifier according to a third embodiment.
- FIG. 28 is a block diagram showing a first modification of the third embodiment.
- FIG. 29 is a block diagram showing another configuration in the first modification of the third embodiment.
- FIG. 30 is a block diagram showing a configuration example of a power amplifier according to a fourth embodiment.
- FIG. 31 is a block diagram showing a first modification of the fourth embodiment.
- FIG. 32 is a block diagram showing a structural example of a power amplifier according to a fifth embodiment.
- FIG. 33 is a block diagram showing a configuration example of a power amplifier according to a sixth embodiment.
- FIG. 34 is a block diagram showing a first modification of the sixth embodiment.
- FIG. 35 is a block diagram showing a second modification of the sixth embodiment.
- FIG. 36 is a block diagram showing a third modification of the sixth embodiment.
- a power amplifier according to the present invention maintains a main signal amplification factor and generates a reverse-phase third-order intermodulation distortion to cancel third-order intermodulation distortion generated when the main signal is amplified. Is provided.
- FIG. 4 is a block diagram showing a configuration example of the power amplifier according to the first embodiment.
- the power amplifier of this embodiment includes a distributor 76 that distributes an input signal 65, a main signal 66, and a third-order intermodulation distortion (IMD3: 3rd-order Inter- modulatio n distortion) 67 anti-phase third-order intermodulation distortion generator circuit 63, anti-phase third-order intermodulation distortion generator circuit 63 connected to the output side of anti-phase third-order intermodulation distortion generator circuit 63, and anti-phase third-order intermodulation distortion generator circuit 63 And an amplifier 62 connected in parallel to the amplifier 61, and an amplifier 61 and a synthesizer 64 for combining the output signals of the amplifier 62.
- IMD3 3rd-order Inter- modulatio n distortion
- an input terminal 74 for inputting an input signal from the outside is provided in front of the distributor 76.
- An output terminal 75 for outputting the output signal of the synthesizer 64 is provided at the subsequent stage of the synthesizer 64.
- antiphase IMD3 generation circuit the antiphase third-order intermodulation distortion generation circuit is referred to as “antiphase IMD3 generation circuit”.
- the power amplifier of the present embodiment has two systems for signal amplification.
- a negative phase IMD3 generating circuit 63 and an amplifier 61 are connected in series on one of the two amplification paths, and an amplifier 62 is provided on the other.
- in-phase is defined as a phase difference in the range of 90 ° force and + 90 °.
- Reverse phase is defined as having a phase difference in the range of + 90 ° to + 180 ° and in the range of 90 ° to 180 °.
- the amplifier 62 when receiving the input signal 65 from the distributor 76, the amplifier 62 generates a third-order intermodulation distortion 71 having the same phase as the main signal 70 included in the input signal 65.
- the next intermodulation distortion 71 is sent to the synthesizer 64. It is easy to realize that the amplifier 62 outputs the third-order intermodulation distortion 71 having the same phase as the main signal 70 by reducing the idle current of the amplifier 62. Reducing the idle current of the amplifier 62 increases power efficiency and reduces power consumption during idle operation. [0032] Since the phase shift of main signal 66 output from anti-phase IMD3 generation circuit 63 is small, the phase difference between main signal 68 output from amplifier 61 and main signal 70 output from amplifier 62 is small. Both are in phase. Further, the third-order intermodulation distortion 69 output from the amplifier 61 and the third-order intermodulation distortion 71 output from the amplifier 62 are in a reverse phase relationship.
- combiner 64 combines main signal 68 and third-order intermodulation distortion 69 received from amplifier 61 with main signal 70 and third-order intermodulation distortion 71 received from amplifier 62. Then, a main signal 72 obtained by combining the main signal 68 and the main signal 70 and a third order intermodulation distortion 73 obtained by combining the third order intermodulation distortion 69 and the third order intermodulation distortion 71 are output from the output terminal 75.
- the third-order intermodulation distortion 69 and the third-order intermodulation distortion 71 cancel each other because the third-order intermodulation distortion 69 and the third-order intermodulation distortion 71 are in an opposite phase relationship. As a result, the relative strength of the third-order intermodulation distortion 73 with respect to the main signal 72 can be reduced at the output terminal 75.
- the number of stages of the amplifier 61 and the amplifier 62 is not limited to one, but may be a multistage configuration.
- FIG. 5 is a block diagram showing an example of the configuration of the anti-phase IMD3 generation circuit.
- the anti-phase IMD3 generation circuit 63 includes an input terminal 84, a distortion generation circuit 81, a third-order intermodulation distortion phase adjustment circuit 82, a third-order intermodulation distortion amplitude adjustment circuit 83, And an output terminal 85.
- the phase adjustment circuit for third-order intermodulation distortion is simply referred to as “phase adjustment circuit”
- the amplitude adjustment circuit for third-order intermodulation distortion is simply referred to as “amplitude adjustment circuit”.
- the distortion generation circuit 81 outputs third-order intermodulation distortion necessary for distortion compensation.
- the phase adjustment circuit 82 sets the phase of the third-order intermodulation distortion output from the distortion generation circuit 81 to an optimal value by setting the load impedance in the difference frequency band impedance of the distortion generation circuit 81 to an optimal value.
- the difference frequency band refers to a frequency band corresponding to a frequency difference between two input main signals (desired waves) or a frequency band corresponding to a modulation bandwidth of an input modulation wave.
- the amplitude adjustment circuit 83 is used to change the load impedance in the RF fundamental wave band of the distortion generation circuit 81. By setting the optimum value, the amplitude of the third-order intermodulation distortion output from the distortion generating circuit 81 is set to the optimum value.
- the RF fundamental band refers to the carrier wave of the input signal and the nearby frequency band.
- connection relationship between the distortion generation circuit 81, the phase adjustment circuit 82, and the amplitude adjustment circuit 83 is such that the load impedances of the RF fundamental wave band and the difference frequency band of the distortion generation circuit 81 are determined by the phase adjustment circuit 82 and the amplitude adjustment circuit 83.
- the configuration shown in FIG. 5 is not limited as long as the adjustment circuit 83 can set the optimum value.
- the configuration is not limited to the configuration in which the distortion generating circuit 81 is installed between the phase adjusting circuit 82 and the amplitude adjusting circuit 83 shown in FIG. 5, but the phase adjusting circuit 82 is installed between the distortion generating circuit 81 and the amplitude adjusting circuit 83.
- the amplitude adjusting circuit 83 may be installed between the distortion generating circuit 81 and the phase adjusting circuit 82 which may be installed.
- phase adjustment circuit 82 that sets the phase of the third-order intermodulation distortion output from the distortion generation circuit 81 to an optimum value
- amplitude adjustment circuit 83 that sets the amplitude of the third-order intermodulation distortion output from the distortion generation circuit 81 to an optimum value
- the distortion generating circuit 81 has a non-linear element 101, and one end of the non-linear element 101 is connected to a signal line 108 at a connection point 109.
- the voltage V (t) and current i (t) of the non-linear element 101 at the connection point 109 with the signal line 108 are the DC voltage V (t) at idle and the current i (t).
- the phase adjustment circuit 82 has an impedance element 102, and one end of the impedance element 102 is connected to the signal line 108.
- the impedance of the impedance element 102 is represented by Z (f).
- the amplitude adjustment circuit 83 includes an impedance element 103, and the impedance element 103 is connected in series to the signal line 108.
- the impedance of the impedance element 103 is represented by Z (f).
- the impedance element 106 represents the load impedance Z (f) connected to the output terminal 85 of the negative phase IMD3 generation circuit 63.
- the impedance element 104 represents a load impedance Z (f) connected to the input terminal 84 of the anti-phase IMD3 generation circuit 63.
- This load impedance Z (f) is the RF fundamental band
- the input power of the anti-phase IMD3 generation circuit 63 is close to the conjugate matching and is designed to be in a state and signal power is appropriately transmitted.
- the impedance Z (f) viewed from the amplitude adjustment circuit 83 side and the input viewed from the phase adjustment circuit 82 side and distortion generation circuit 81 side are shown.
- the impedance Z (f) is also close to conjugate matching.
- the signal source 105 is connected to the input of the anti-phase IMD3 generation circuit 63, the desired frequencies are f and f (f ⁇ f), and the maximum voltage amplitude force (5 ) 2tone signal v
- FIG. 6 and FIG. 7 are diagrams for explaining the generation process of the third-order intermodulation distortion.
- Equation (6) Equation (7), and Equation (8), d represents the third-order intermodulation distortions 123 and 124 shown in FIG.
- Third-order intermodulation distortions 123 and 124 are generated by mixing main signals 121 and 122 by third-order nonlinear processes 125 and 126.
- Equation (6) Equation (7), and Equation (9), d represents the third-order intermodulation distortion 142 shown in FIG.
- the main signals 121 and 122 are mixed by a second-order nonlinear process 149 to generate a second-order intermodulation distortion 145, and the third-order intermodulation distortion 142 is a second-order nonlinear modulation distortion 145.
- the process 150 produces again by the process 150 with the main signal 122.
- the third-order intermodulation distortion 141 generated by re-mixing the second-order intermodulation distortion 14 5 with the main signal 122 by the second-order nonlinear process 151 becomes (d) * of the complex conjugate of d.
- d is the third-order intermodulation distortion 143,1 shown in FIG.
- main signals 121 and 122 are mixed by a second-order nonlinear process 152 to produce second-order harmonics 147 and 148. It is generated by re-mixing with main signals 121 and 122 by 153 and 154.
- the amplitude I d I of the third-order intermodulation distortion 143,144 generated via the second-order harmonics 147,148 is the impedance I Z (2f) of the second-order harmonic band.
- S2 c I is usually several ⁇
- the third-order intermodulation distortions 143 and 144 have negligible strength with respect to the third-order intermodulation distortion d caused by the third-order nonlinear processes 125 and 126.
- the amplitude I d I of the third-order intermodulation distortion 141, 142 generated via the second-order intermodulation distortion 145 is the impedance f of the difference frequency band f)
- S2 I is usually a relatively high value of about several hundred ⁇ power without the phase adjustment circuit 82. Therefore, the third-order intermodulation distortions 141 and 142 generated via the second-order intermodulation distortion 145 can have a larger amplitude than the third-order intermodulation distortions 123 and 124 generated by the third-order nonlinear processes 125 and 126.
- phase adjustment circuit 82 is installed and IZ (Af) IIZ (Af) I is reduced to several tens of ⁇ or less, 2 Third-order intermodulation distortions 141 and 142 generated via second-order intermodulation distortion 145 are suppressed.
- phase adjustment circuit 82 Even if the phase adjustment circuit 82 is installed, the third-order intermodulation distortions 123 and 124 generated by the third-order nonlinear processes 125 and 126 are not significantly changed. Therefore, by installing the phase adjustment circuit 82, only the third-order intermodulation distortions 141 and 142 generated through the second-order intermodulation distortion 145 are suppressed, and the third-order intermodulation distortions 123 and 124 generated by the third-order nonlinear processes 125 and 126 are suppressed. Can be output as the main component of third-order intermodulation distortion.
- phase difference between the third-order intermodulation distortion 142 and the main signal 122 generated via the second-order intermodulation distortion 145 is an expression.
- phase difference between the third-order intermodulation distortion 141 and the main signal 121 generated via the second-order intermodulation distortion 145 is calculated as shown in Equation (13).
- phase difference between the third-order intermodulation distortion 142 calculated by Equation (12) and Equation (13) and the main signal 122.
- the phase difference between the third-order intermodulation distortion 141 and the main signal 121 is also in the range of + 90 ° for -90 ° force. That is, the third-order intermodulation distortions 141 and 142 generated via the second-order intermodulation distortion 145 are in phase with the main signals 121 and 122.
- Equation (14) if the coefficient K representing the third-order nonlinear process is positive, the third-order nonlinear process 1
- phase difference between the third-order intermodulation distortions 123 and 124 caused by 25 and 126 and the main signals 121 and 122 is 180 °. That is, third-order intermodulation distortions 123 and 124 generated by third-order nonlinear processes 125 and 126 are out of phase with main signals 121 and 122. Therefore, by using a nonlinear element having a positive coefficient ⁇ representing the third-order nonlinear process as the nonlinear element 101, the third-order nonlinear processes 125, 126
- the third-order intermodulation distortions 123 and 124 generated in this way can be in a phase opposite to that of the main signals 121 and 122.
- the third-order intermodulation distortion 141, 142 generated via the second-order intermodulation distortion 145 is in phase with the main signals 121, 122, and the third-order intermodulation generated by the third-order nonlinear process 125,126.
- phase adjustment circuit 82 is installed and I Z (Af)
- the third-order intermodulation distortions 141 and 142 generated through the second-order intermodulation distortion 145 are suppressed. Then, it is possible to output the third-order intermodulation distortions 123 and 124 having the opposite phase to the main signals 121 and 122, which are generated by the third-order nonlinear processes 125 and 126, as the main components of the third-order intermodulation distortion. In such a case, the third-order intermodulation distortion 67 output from the anti-phase IMD3 generation circuit 63 is out of phase with the main signal 66.
- the second-order intermodulation distortion 145 is The third-order intermodulation distortions 141 and 142 that are in phase with the main signals 121 and 122, which are generated via the main signal, are the main components of the third-order intermodulation distortion. Therefore, the third-order intermodulation distortion 67 output from the anti-phase IMD3 generation circuit 63 is in phase with the main signal 66.
- the phase difference between the main signal and third-order intermodulation distortion can be set to an optimal value.
- Equation (11) the amplitude I d I of the third-order intermodulation distortion of frequency 2f -f and the amplitude I of the third-order intermodulation distortion of frequency 2f -f output from the output terminal 85.
- d I is determined by equation (11). It can be seen that it is proportional to the amount of impedance in the defined RF fundamental band
- Q c I is the ratio between the real part and the absolute value of the impedance Z (f) of the RF fundamental band as seen from the amplitude adjustment circuit 83 side I Z (f)
- the amplitude adjustment circuit 83 is adjusted so that I 2 / Re [Z (f)] increases by 2 then the anti-phase IMD3 generation circuit 63 force is also output.
- the amplitude of the third-order intermodulation distortion 67 can be increased. it can.
- the amplitude of the third-order intermodulation distortion 67 output from the antiphase IMD3 generation circuit 63 can be reduced.
- the amplitude of the third-order intermodulation distortion 67 output from the generation circuit 63 can be set to an optimum value.
- the amplitude of the third-order intermodulation distortion 67 output from the antiphase IMD3 generating circuit 63 can be set to an optimum value by the amplitude adjusting circuit 83, and the antiphase IMD3 can be set by the phase adjusting circuit 82.
- the phase of the third-order intermodulation distortion 67 output from the generation circuit 63 can be set to an optimum value.
- the third-order output from the amplifier 61 is set.
- the amplitude and phase of the intermodulation distortion 69 can be set to optimum values so that the amplitude and phase of the third-order intermodulation distortion 71 output from the amplifier 62 are opposite to each other and the amplitude is the same or close to that.
- a low distortion state can be realized by canceling the intermodulation distortions 69 and 71.
- the amplitude and phase of the third-order intermodulation distortion 67 output from the antiphase IMD3 generation circuit 63 can be set to optimum values by separate means, the amplitude adjustment circuit 83 and the phase adjustment circuit 82, respectively.
- both the amplitude and phase of the third-order intermodulation distortion 67 can be easily set to optimum values for distortion compensation at the same time.
- the 2-tone signal represented by Equation (4) is used as the input signal.
- Input signal at the time of using the circuit in bright is not limited to 2 ton e signals may enter a common modulation signal.
- Literature “Microwave Journal, vol.42, no.12, pp. 70-84, December,
- an amplifier with reduced intermodulation distortion which is a distortion index when a two-tone signal is input, has a distortion index such as an adjacent channel power ratio (adjacent channel power ratio, ACPR) can also be reduced. Therefore, the circuit of the present invention can effectively reduce distortion even when a general modulation wave is input as well as a 2tone signal.
- FIG. 8 is a block diagram showing a configuration example of the power amplifier according to the second embodiment.
- the power amplifier includes a distributor 76 that distributes an input signal, and an anti-phase IMD3 generating circuit that outputs a main signal and third-order intermodulation distortion of the anti-phase of the main signal.
- a distributor 76 that distributes an input signal
- an anti-phase IMD3 generating circuit that outputs a main signal and third-order intermodulation distortion of the anti-phase of the main signal.
- the amplifier 61 connected to the output of the negative phase IMD3 generation circuit 63, the amplifier 62 connected in parallel with the negative phase IMD3 generation circuit 63 and the amplifier 61, and the output signals of the amplifier 61 and the amplifier 62 are combined.
- a synthesizer 64 An input terminal 74 is provided before the distributor 76, and an output terminal 75 is provided after the combiner 64.
- the amplifier 61 is composed of a bipolar transistor 165 having an amplifying function, a base noise circuit composed of a bipolar transistor 168 and a resistance element 169, a ⁇ 4 line 167, and a capacitance element 166. And a collector bias circuit.
- An RF signal is input to the base terminal of the bipolar transistor 165.
- the collector terminal serves as an RF signal output terminal, and the collector voltage of the bipolar transistor 165 is applied from the power supply terminal 283.
- the amplifier 62 has the same structure as that of the amplifier 61.
- the amplifier 62 includes a bipolar transistor 225 having an amplifying action, a base bias circuit including a bipolar transistor 228 and a resistance element 229, and X ⁇ 4-wire 227 And a collector bias circuit composed of a capacitor element 226, and the collector voltage of the bipolar transistor 225 is applied from the power supply terminal 303.
- the circuit configurations of the amplifiers 61 and 62 are not limited to the configuration shown in FIG.
- the amplifiers 61 and 62 may be circuits having an amplifying function.
- a field effect transistor may be used instead of the bipolar transistor used in the amplifiers 61 and 62, and a choke coil may be used instead of the ⁇ / 4 line in the collector bias circuit.
- the base bias circuit of the amplifiers 61 and 62 is not limited to the circuit configuration configured by the bipolar transistor 168 and the resistance element 169, and the circuit configuration can appropriately apply the noise to the amplification element such as the bipolar transistor 165. I just need it.
- the amplifiers 61 and 62 are not limited to a single-stage configuration, and a multi-stage amplifier may be used. Thus, as examples of circuits having an amplifying function, various modifications other than the circuit configurations of the amplifiers 61 and 62 shown in FIG. 8 can be considered.
- the collector voltage of the bipolar transistor 168 included in the base bias circuit of the amplifier 61 is applied via the power supply stabilization circuit 194 and the power supply terminal 282.
- the base voltage of the bipolar transistor 168 is applied via the power supply stabilization circuit 192 and the power supply terminal 281.
- the collector voltage of the neuropolar transistor 228 included in the base bias circuit of the amplifier 62 is applied through the power supply stability circuit 254 and the power supply terminal 301, and the base voltage of the bipolar transistor 228 is applied to the power supply stability circuit. 252 and the power supply terminal 302 are applied.
- each of the power stabilization circuit 192, 194 and the power stabilization circuit 252, 254 the voltage fluctuations of the power supply terminals 281, 282 and 301, 302 are transmitted to the bipolar transistor 168 and the bipolar transistor 228, respectively. To suppress. As a result, DC voltages with suppressed voltage fluctuations are supplied to the bipolar transistors 168 and 228.
- the power supply terminals 281, 282 and the power supply terminals 301 and 302 that do not necessarily use the power supply stabilization circuit are directly bipolar. DC voltage can be applied to each of transistor 168 and bipolar transistor 228!
- power supply terminals 281, 282, 283, 301, 302, and 303 are provided, but a plurality of these power supply terminals are connected and combined into one, and these power supply terminals are connected to each other. Try to apply voltage to multiple power terminals.
- an input signal is applied to the preceding stage of the anti-phase IMD3 generation circuit 63.
- An input matching circuit 191 for transmitting the input signal is provided, and an input matching circuit 251 for appropriately transmitting the input signal is provided before the amplifier 62.
- the input matching circuit 191,251 may be configured with either a low-pass filter or a high-pass filter, or a combination of a low-pass filter and a high-pass filter. Good.
- an output matching circuit 193 for appropriately transmitting the output signal is provided in the subsequent stage of the amplifier 61, and the output signal is appropriately transmitted in the subsequent stage of the amplifier 62.
- Output matching circuit 253 is provided.
- the output matching circuits 193 and 253 may be configured with a low-pass filter or a high-pass filter, or may be configured with a combination of a low-pass filter and a high-pass filter.
- the amplifier 61 and the amplifier 62 have the same configuration.
- the input matching circuit 191 and the input matching circuit 251 have the same configuration
- the amplifier 61 and the amplifier 62 do not necessarily have the same configuration as long as the phases of the spectrum of the main signal frequency are the same.
- the input matching circuit 191 and the output matching circuit 251 do not necessarily have the same configuration as long as the phase of the signals to be passed is the same.
- the output matching circuit 193 and the output matching circuit 253 are not necessarily the same configuration. It doesn't have to be. For each, a circuit having a different configuration may be used as necessary.
- the anti-phase IMD3 generation circuit 63 has a distortion generation circuit 81, a phase adjustment circuit 82, and an amplitude adjustment circuit 83.
- the distortion generation circuit 81 outputs the third-order intermodulation distortion necessary for distortion compensation.
- the phase adjustment circuit 82 sets the load impedance in the differential frequency band impedance of the distortion generation circuit 81 to an optimal value, thereby setting the phase of the third-order intermodulation distortion output to the distortion generation circuit 81 to an optimal value.
- the amplitude adjustment circuit 83 sets the amplitude of the third-order intermodulation distortion output from the distortion generation circuit 81 to an optimal value by setting the load impedance in the RF fundamental band of the distortion generation circuit 81 to an optimal value. .
- the distortion generation circuit 81 will be described in detail.
- the distortion generation circuit 81 in the IMD3 generation circuit 63 includes a bipolar transistor 161.
- the emitter terminal of the bipolar transistor 161 is connected to the signal line 108 at the connection point 109.
- the collector voltage of the bipolar transistor 161 is applied from the power supply terminal 282 via the power supply stabilization circuit 194, and the base voltage is supplied from the power supply stabilization circuit 192.
- the emitter terminal of the bipolar transistor 161 is connected to the emitter terminal of the bipolar transistor 168 via the resistor 170.
- the bipolar transistor 161 has nonlinear characteristics similar to those of the nonlinear element 101 shown in the first embodiment, and is used to generate third-order intermodulation distortion necessary for distortion compensation.
- the amplitude adjustment circuit 83 in the anti-phase IMD3 generation circuit 63 is composed of a capacitive element 162 connected in series to the signal line 108.
- the amplitude of the third-order intermodulation distortion 67 output from the output terminal 85 of the raw circuit 63 can be set to an optimum value.
- FIG. 9 is a circuit diagram showing a specific example of an anti-phase IMD3 generation circuit used for characteristic measurement.
- FIG. 9 shows a configuration in which the amplifier 62 is removed from the circuit configuration shown in FIG. 8 and an anti-phase IMD3 generation circuit 63, an input matching circuit 191 that is a peripheral circuit thereof, and power supply stabilization circuits 192 and 194 are left.
- FIG. 10 is a graph showing a change in impedance in the RF fundamental wave band and a change in the ratio between the real part and the absolute value with respect to the capacitance value of the capacitive element in the amplitude adjustment circuit.
- the center frequency of the RF fundamental band was set to 1.95 GHz.
- the horizontal axis of the graph is shown in Figure 9.
- the capacitance value C of the capacitive element 162 in the amplitude adjustment circuit 83 having the above circuit configuration is taken.
- the left vertical axis represents the impedance Z (f) value in the RF fundamental band as seen from the distortion generation circuit 81 to the amplitude adjustment circuit 83 side, and the right vertical axis of the graph represents the real part and the impedance of the impedance.
- FIG. 11 is a graph showing changes in the amplitude and phase of the third-order intermodulation distortion with respect to the capacitance value of the capacitive element in the amplitude adjustment circuit.
- the horizontal axis of the graph represents the capacitance value C of the capacitive element 162 in the amplitude adjustment circuit 83 having the circuit configuration shown in FIG. B on the left vertical axis of the graph
- the amplitude of the third-order intermodulation distortion output from the output terminal 209 can be adjusted and set to an optimum value for distortion compensation.
- the configuration of the amplitude adjustment circuit 83 in the embodiment shown in FIG. 8 is such that the capacitance value of the capacitive element 162 is set to an optimum value, whereby the output terminal of the negative phase IMD3 generation circuit 63 is set. 85 and a means for setting the amplitude of the third-order intermodulation distortion 67 output from the output terminal 209 to a value necessary for distortion compensation.
- the optimum impedance value of the capacitive element 162 in the RF fundamental band depends on the amplitude of the third-order intermodulation distortion 67 required for distortion compensation, but it is usually several ohms and several tens of ohms.
- the capacitance value is usually on the order of a few pF to a few dozen pF. Therefore, the capacitor 162 is integrated. Since the size can be easily integrated on the road, an amplitude adjustment circuit for third-order intermodulation distortion can be realized in a small size and at low cost.
- the capacitor 162 is not limited to be integrated on the integrated circuit, and may be realized by a passive element outside the integrated circuit. Further, the capacitance value of the capacitive element 162 is not limited to the range of several pF to several tens of pF, and the capacitance value may be arbitrarily set as necessary.
- phase adjustment circuit 82 will be described in detail.
- phase adjustment circuit 82 in anti-phase IMD3 generation circuit 63 has a circuit in which capacitive element 163 and inductor element 164 are connected in series. One end of the circuit on the inductor element 164 side is connected in parallel with the signal line 108, and one end of the circuit on the capacitor element 163 side is grounded.
- the capacitance value of the capacitive element 163 in the phase adjustment circuit 82 is desirably a relatively large value that falls within the range of several nF to several hundred uF. The reason will be described below.
- the range of the difference frequency ⁇ 1 ” is assumed to be between a few kHz and several tens of MHz corresponding to the modulation bandwidth of the communication system. In this case, the DC current is cut and the difference frequency ⁇ 1” is supported.
- Impedance Z (f) viewed from the amplitude adjustment circuit 83 side, phase adjustment circuit 82 side and distortion generation
- the inductor value of the inductor element 163 in the phase adjustment circuit 82 is preferably about several ⁇ to several tens ⁇ .
- Inductor element 163 has no effect on matching for the fundamental RF band! Therefore, it is necessary to have an impedance of several tens of ohms, which is sufficiently higher than the matching impedance. In the frequency range corresponding to the difference frequency ⁇ f, it is necessary to have a sufficiently low impedance of several ⁇ or less. This is because the inductor value satisfies at least these two conditions.
- the inductor element 163 may be integrated on an integrated circuit or may be mounted as a passive element outside the integrated circuit.
- the third-order intermodulation distortions 141 and 142 generated via the second-order intermodulation distortion 145 are suppressed. Then, it is possible to output the third-order intermodulation distortions 123 and 124 having a phase opposite to that of the main signals 121 and 122 generated by the third-order nonlinear processes 125 and 126 as the main components of the third-order intermodulation distortion. In such a case, the third-order intermodulation distortion 67 output from the anti-phase IMD3 generation circuit 63 is in anti-phase with the main signal 66.
- the configuration provided with the phase adjustment circuit 82 will be compared with the characteristics of the configuration.
- the circuit configuration shown in FIG. As a configuration including the phase adjustment circuit 82, the circuit configuration shown in FIG. Further, as a configuration not provided with the phase adjustment circuit 82, a configuration obtained by removing the phase adjustment circuit 82 from the circuit configuration shown in FIG. 9 was used.
- FIG. 12 is a graph for comparing the characteristic results of the configuration provided with the phase adjustment circuit and the configuration provided with the phase adjustment circuit.
- the difference frequency was set to 4 MHz and a 2 tone signal with a center frequency of 1.95 GHz was input.
- the average input power of 2ton e signal is taken on the horizontal axis of the graph.
- the vertical axis of the graph represents the phase of the third-order intermodulation distortion output from the output terminal 209.
- the graph in Fig. 12 shows the average input power dependence of the 2tone signal with respect to the phase of the third-order intermodulation distortion.
- the third-order intermodulation distortions 141 and 142 in phase with the main signals 121 and 122 generated via the second-order intermodulation distortion 145 are suppressed. This is because the third-order intermodulation distortions 123 and 124, which are generated by the third-order nonlinear processes 125 and 126 and have a phase opposite to that of the main signals 121 and 122, are output as the main components of the third-order intermodulation distortion.
- Z (Af) I is not reduced and is the same as the main signals 121 and 122, which are generated via the second-order intermodulation distortion 145.
- the configuration of the phase adjustment circuit 82 in the embodiment shown in FIG. 8 is such that the antiphase third order intermodulation distortion inversion circuit 63 outputs the main signal 66 and the third order intermodulation distortion 67 opposite in phase.
- the third-order intermodulation distortion 71 in phase with the main signal 70 output from the amplifier 62 is canceled.
- the configuration of the phase adjustment circuit 82 provides a means for enabling the relative intensity of the third-order intermodulation distortion 73 to the main signal 72 at the output terminal 75 to be reduced.
- the circuit shown in FIG. 13 shows an amplification path including amplifier 61 and antiphase IMD3 generation circuit 63 in the circuit configuration shown in FIG.
- the circuit shown in FIG. 14 shows an amplification path including the amplifier 62 in the circuit configuration shown in FIG.
- the circuit configuration shown in FIG. 8 is obtained by arranging the circuit shown in FIG. 13 and the circuit shown in FIG. 14 in parallel between distributor 76 and synthesizer 64 and connecting them to distributor 76 and synthesizer 64, respectively. It corresponds to. The characteristic results of these two circuits are shown below.
- Figure 15, Figure 13 and respectively for the circuits shown in FIGS. 14, to the main signal and the third-order intermodulation modulation distortion of phase is a graph showing the average input power dependence of 2 ton e signal.
- the difference frequency is 4 MHz and a 2-tone signal with a center frequency of 1.95 GHz is input.
- the average input power of 2ton e signal was taken on the horizontal axis of the graph.
- the vertical axis of the graph shows the phase of the main signal and third-order intermodulation distortion! /
- phase difference between the main signal and the third-order intermodulation distortion is almost 180 °, indicating that the phase is reversed.
- the phase difference between the main signal and third-order intermodulation distortion is in the range of 90 ° in a wide power range, indicating that they are in phase.
- the main signal of the circuit shown in FIG. 13 and the main signal of the circuit shown in FIG. 14 have almost the same phase.
- Figure 16 shows the third-order intermodulation for the circuits shown in Figure 8, Figure 13, and Figure 14, respectively. It is a graph which shows the average input power dependence of 2tone signal of the relative amplitude intensity with respect to the main signal of distortion (IMD3).
- the horizontal axis of the graph represents the average input power of the 2tone signal
- the vertical axis of the graph represents the relative amplitude intensity of the third-order intermodulation distortion with respect to the main signal.
- the difference frequency is 4 MHz
- a 2-tone signal with a center frequency of 1.95 GHz is input.
- the amplitude adjustment circuit 83 of the circuit shown in FIG. 13 the relative amplitude intensity of the third-order intermodulation distortion that also outputs the circuit force shown in FIG.
- FIG. 13 is approximately the same as that of the circuit shown in FIG. The element value is set.
- the circuit shown in Fig. 8 has a third-order intermodulation distortion of 10 dB or more, which is 10 dB or more lower than the circuits of Figs. Improved suppression has been obtained.
- the result of FIG. 16 shows that the power amplifier of the present invention is actually effective in reducing distortion.
- phase adjustment circuit 82 is configured using a plurality of elements in the anti-phase IMD3 generation circuit 63 shown in FIG.
- FIG. 17 is a circuit diagram showing a first modification of the second embodiment shown in FIG. Unlike 2 ton e signal, if you enter a common modulated wave having a continuous scan Bae outside Le in modulation band, the modulation bandwidth of the low frequency close to the frequency (0 Hz corresponding to the modulation bandwidth The frequency IZ (Af) IIZ (Af) I has been reduced evenly.
- phase adjustment circuit 82 shown in FIG.
- the phase adjustment circuit 82 includes a plurality of capacitance elements 341a, 341b,..., 341x (a, b,. , M is an integer equal to or greater than 1), the circuit 361a is connected in series to the inductor element 342, and the circuit 361b has the same configuration as the circuit 361a.
- the circuit 361b has a configuration in which a plurality of capacitive elements 351a, 351b,..., 351x connected in parallel are connected in series to the inductor element 352.
- One of the two terminals of the circuit 361a is grounded, and the other terminal is connected in parallel to the signal line 108.
- one of the two terminals of the circuit 361b is grounded, and the other terminal is connected to the signal line 108 in parallel.
- the number of configurations connected in parallel to 108 and grounded at the other terminal is not limited to two. Instead of providing the circuit 361b, only the circuit 361a may be used. Alternatively, three or more configurations similar to the circuit 361a may be provided.
- the capacitance elements 341a, 341b, ⁇ , 341x and the capacitance elements 351a, 35 lb, '' ', and 351x have different capacitance values. Reduces impedance at different frequency ranges. Therefore, the frequency range in which the impedance I Z (A f) I I Z (A f) I of the difference frequency band is reduced can be expanded.
- phase adjustment circuit 82 a plurality of elements are used for the phase adjustment circuit 82, but the configuration is different from that of the first modification.
- FIG. 18 is a circuit diagram showing a second modification of the second embodiment shown in FIG.
- the phase adjustment circuit 82 is composed of a plurality of capacitive elements 371a, 371b, ..., 371x (a, b, ...
- the circuit 381 is connected to the signal line 108 in series.
- Inductor element 372 has one of two terminals connected in parallel to signal line 373 and the other terminal grounded.
- a resistance element for bypassing the current output from the distortion generation circuit 81 is provided in another position in the antiphase IMD3 generation circuit 63 shown in FIG.
- FIG. 19 is a circuit diagram showing a third modification of the second embodiment shown in FIG. As shown in FIG. 19, a resistance element 391 is connected to a connection point 109 of the signal line 108. Of the two terminals of the resistance element 391, one terminal is connected to the connection point 109 and the other terminal is grounded.
- the emitter current of the bipolar transistor 161 in the distortion generation circuit 81 is bypassed as the base current of the bipolar transistor 165 via the resistance element 170.
- the emitter current of bipolar transistor 161 is bypassed to ground through resistance element 391.
- This modification has a configuration in which a field effect transistor is used as a nonlinear element of the distortion generation circuit 63 in the antiphase IMD3 generation circuit 63 shown in FIG.
- FIG. 20 is a circuit diagram showing a fourth modification of the second embodiment shown in FIG.
- the distortion generating circuit 81 includes a field effect transistor 401 as the nonlinear element 101.
- the source terminal is connected in parallel to the signal line 108
- the gate terminal is connected to the power supply stability circuit 192a via the connection point 205a
- the drain terminal is connected to the power supply stability via the connection point 203.
- the field effect transistor 401 is similar to the case of using the neuropolar transistor 161, and the nonlinear element shown in the first embodiment is used. It has nonlinear characteristics similar to those of the child 101 and can generate third-order intermodulation distortion necessary for distortion compensation.
- This modification is a configuration in which a diode is used as the nonlinear element of the distortion generation circuit 63 in the anti-phase IMD3 generation circuit 63 shown in FIG.
- FIG. 21 is a circuit diagram showing a fifth modification of the second embodiment shown in FIG.
- the distortion generating circuit 81 includes a diode 411 as the nonlinear element 101.
- a force sword terminal is connected in parallel to the signal line 108, and an anode terminal is connected to the power supply stabilization circuit 194 through the connection point 203.
- the diode 411 has the same non-linear characteristics as the non-linear element 101 shown in the first embodiment, and generates the third-order intermodulation distortion necessary for distortion compensation, as in the case of using the bipolar transistor 161. Can do.
- the amplitude adjustment circuit 83 is configured by using a plurality of elements in the anti-phase IMD3 generation circuit 63 shown in FIG.
- FIG. 22 is a circuit diagram showing a sixth modification of the second embodiment shown in FIG.
- the amplitude adjustment circuit 83 includes a circuit 434 in which a resistance element 431, a capacitance element 432, and an inductor element 433 are connected in series.
- the circuit 434 is connected to the signal line 108 in series.
- the respective values of the resistor element 431, the capacitor element 432, and the inductor element 433 are set to optimum values, so that the distortion generating circuit 81 From the amplitude adjustment circuit 83 side, the real part and absolute value of the impedance Z (f) in the RF fundamental band
- the resistance element 431, the capacitive element 432, and the inductor element 433 are elements for amplitude adjustment, and the amplitude is set to an optimal value compared to the configuration shown in FIG.
- the number of elements is increasing. As the number of elements for setting increases, the degree of freedom of adjustment increases compared to the configuration shown in Fig. 8, and it is easy to set the amplitude of the third-order intermodulation distortion output at the output terminal 85 force with the optimum value. Become.
- resistor element 431, the capacitor element 432, and the inductor element 433 may be used.
- FIG. 23 is a circuit diagram showing a seventh modification of the second embodiment shown in FIG.
- the amplitude adjustment circuit 83 includes a circuit 424 in which a resistance element 421, a capacitance element 422, and an inductor element 423 are connected in parallel.
- the circuit 424 is connected to the signal line 108 in series.
- the respective values of the resistor element 421, the capacitor element 422, and the inductor element 423 are set to optimum values based on the same principle as that of the sixth modified example of the second embodiment.
- resistance element 421, capacitive element 422, and inductor element 423 are elements for amplitude adjustment. Therefore, as in the sixth modification, the degree of freedom of adjustment is increased compared to the configuration shown in FIG. 8 by the number of elements for amplitude adjustment, and the third-order mutual output output from the output terminal 85 is increased. It becomes easy to set the amplitude of the modulation distortion with an optimum value.
- the bipolar transistor 161 in the distortion generating circuit 81 has not only a function as the nonlinear element 101 that generates third-order intermodulation distortion for distortion compensation. Also, it has a function of applying a base voltage to the bipolar transistor 165 in the amplifier 61. In such a configuration, the bipolar transistor 168, the resistive element 169, and the resistive element 170, which are components of the bias circuit of the amplifier 61, which are provided separately from the distortion generating circuit 81, can be omitted. Miniaturization is possible.
- resistor element 421, the capacitor element 422, and the inductor element 423 may be used.
- FIG. 24 is a circuit diagram showing an eighth modification of the second embodiment shown in FIG. As shown in FIG. 24, the amplitude adjustment circuit 83 includes a resistance element 451, a capacitance element 452, and an inductor element 4.
- the 53 has a circuit 454 connected in series.
- the circuit 454 is connected to the signal line 108 in parallel.
- resistance element 451, capacitance element 452, and inductor element 453 are elements for amplitude adjustment.
- the degree of freedom of adjustment increases compared to the configuration shown in Fig. 8, and the amplitude of the third-order intermodulation distortion that is output at 85 output terminals is optimized by the increase in the number of elements for amplitude adjustment. This makes it difficult to set the value.
- the bipolar transistor 161 in the distortion generating circuit 81 is replaced with the bipolar transistor 165 in the amplifier 61 having only the function as the nonlinear element 101, as in the seventh modification. It also has the function of applying a base voltage. Therefore, bipolar transistor 168, which is a component of the bias circuit of amplifier 61, and resistance element 1 Since 69 and the resistance element 170 can be omitted, further miniaturization is possible.
- resistor element 451, the capacitor element 452, and the inductor element 453 may be used.
- This modification uses a plurality of elements for the amplitude adjustment circuit 83, but has a different configuration from the deviations of the sixth to eighth modifications.
- FIG. 25 is a circuit diagram showing a ninth modification of the second embodiment shown in FIG.
- amplitude adjustment circuit 83 includes circuit 444 in which resistance element 441, capacitive element 442, and inductor element 443 are connected in parallel, and capacitive element 162. And circuit 4
- the values of the resistor element 441, the capacitor element 162, the capacitor element 442, and the inductor element 443 are set to optimum values based on the same principle as that of the sixth modification example of the second embodiment.
- the amplitude of the third-order intermodulation distortion output from the output terminal 85 can be set to an optimum value for distortion compensation.
- resistance element 441, capacitive element 162, capacitive element 422, and inductor element 443 are elements for amplitude adjustment. For this reason, as in the sixth and seventh modifications, the degree of freedom of adjustment is greater than that of the configuration shown in FIG. This makes it easier to set the amplitude of third-order intermodulation distortion to an optimal value.
- resistor element 441, the capacitor element 162, the capacitor element 442, and the inductor element 443 may be used.
- the amplitude adjustment circuit 83 is combined with the sixth to ninth modifications. It is a configuration.
- FIG. 26 is a circuit diagram showing a tenth modification of the second embodiment shown in FIG.
- the amplitude adjustment circuit 83 includes circuits 462 a and 462 b connected in series to the signal line 108 and circuits 461 a and 461 b connected in parallel to the signal line 108.
- Each of the circuit 462a and the circuit 462b is one of the circuit 434 described in the sixth modification and the circuit 424 described in the seventh modification.
- Each of the circuit 461a and the circuit 461b is one of the circuit 454 described in the eighth modification and the circuit 444 described in the ninth modification.
- the element values of the resistive element, the capacitive element, and the inductor element in the circuits 461a and 461b and the circuits 462a and 462b are set based on the same principle as that of the sixth modified example of the second embodiment.
- the amplitude of the third-order intermodulation distortion output from the output terminal 85 can be set to an optimum value for distortion compensation.
- the degree of freedom of adjustment is increased by the increase in the number of elements that can be set to the optimum value compared to the configuration shown in FIG. This makes it easier to set the amplitude of the third-order intermodulation distortion with an optimum value.
- circuits 462a and 462b are provided as circuits connected in series to the signal line 108.
- the circuit 434 of the sixth modification example and The number of circuits corresponding to any one of the circuits 424 of the seventh modified example is not limited to two, and may be one or three or more.
- Two circuits 461a and 461b are provided as circuits connected in parallel to the signal line 108.
- either of the circuit 454 of the eighth modification and the circuit 444 of the ninth modification may be used.
- the number of equivalent circuits is not limited to two, but may be one or three or more.
- the power described in the case where the circuits 461a and 461b and the circuits 462a and 462b are used is not limited to this.
- the present invention is not limited to this, and at least one of the circuits 461a, 461b, 462a, and 462b may be used. ⁇ ⁇ .
- phase adjustment circuit 82 shown in the second embodiment and the first and second modifications of the second embodiment, the third embodiment and the third embodiment of the second embodiment, and 4th and 5th variants The distortion generating circuit 81 shown in the example is combined with the amplitude adjusting circuit 83 shown in the sixth, seventh, eighth, ninth, and tenth modified examples of the second embodiment and the second embodiment. Even when the anti-phase IMD3 generation circuit 63 configured as described above is used, distortion compensation can be performed based on the same principle as described in the first and second embodiments.
- the configuration of the power amplifier according to the third embodiment of the present invention will be described.
- the power amplifier of this embodiment has a configuration in which two power amplifiers described in the first embodiment are connected in series.
- FIG. 27 is a block diagram showing a configuration example of the power amplifier according to the third embodiment.
- the power amplifier of the present embodiment has a configuration including a low distortion amplifier 481a to which a signal is input and a low distortion amplifier 481b connected to a subsequent stage of the low distortion amplifier 481a.
- An input terminal 74 is provided before the low distortion amplifier 481a, and an output terminal 75 is provided after the low distortion amplifier 481b.
- the low distortion amplifier 481a includes a distributor 76a that distributes the input signal 65, a negative phase IMD3 generation circuit 63a that outputs the third phase intermodulation distortion of the main signal and the negative phase of the main signal, and a negative phase IMD3 generation circuit
- An amplifier 61a connected to the output side of 63a, an amplifier 62a connected in parallel with the antiphase IMD3 generation circuit 63a and the amplifier 61a, and a combiner 64a for combining the output signals of the amplifier 61a and the amplifier 62a.
- the low distortion amplifier 481b includes a distributor 76b, an anti-phase IMD3 generation circuit 63b, amplifiers 61b and 62b, and a combiner 64b.
- the output terminal of the synthesizer 64a in the low distortion amplifier 481a is connected to the input terminal of the distributor 76b in the low distortion amplifier 481b.
- each of the negative-phase IMD3 generation circuit 63a and the negative-phase IMD3 generation circuit 63b is the reverse of that described in the first embodiment, the second embodiment, and the modifications thereof.
- Phase IMD3 generating circuit 63 has the same configuration.
- the anti-phase IMD3 generation circuit 63a and the anti-phase IMD3 generation circuit 63b in the present embodiment are also connected to the main signal and the anti-phase signal according to the same principle as described in the first embodiment, the second embodiment, and the modifications thereof. It is possible to output 3rd order intermodulation distortion.
- an amplifier 61 provided with an anti-phase IMD3 generation circuit 63a in the previous stage a outputs a main signal 68a and a third-order intermodulation distortion 69a having a phase opposite to that of the main signal 68a.
- the amplifier 62a not provided with the antiphase IMD3 generation circuit in the previous stage outputs the main signal 70a and the third-phase intermodulation distortion 71a having the same phase with respect to the main signal 70a.
- the third-order intermodulation distortion 69a and the third-order intermodulation distortion 71a which are out of phase with each other, are canceled in the synthesizer 64a, and the combined signal of the main signal 68a and the main signal 70a is sent to the low-distortion amplifier 481b in the subsequent stage Is output.
- the third-order intermodulation distortion 69b and the third-order intermodulation distortion 71b that are out of phase with each other are canceled out by the combiner 64b by the same principle as the low-distortion amplifier 481a in the front
- a low distortion output signal in which the next intermodulation distortion is suppressed is output to the output terminal 75.
- the main signal is synthesized in the same phase in each of the synthesizer 64a and the synthesizer 64b, the power loss during the synthesis is also suppressed.
- the configuration shown in FIG. 27 is a two-stage configuration in which the low distortion amplifier 481a and the low distortion amplifier 481b are connected.
- the present invention is not limited to the two-stage configuration and has the same configuration as the low distortion amplifier 481a. Connect three or more low distortion amplifiers. By configuring a power amplifier in which low-distortion amplifiers are connected in multiple stages and increasing the number of amplifier stages, a higher gain amplifier can be realized.
- the configuration shown in FIG. 27 provides a low gain and high gain amplifier while suppressing power consumption.
- the amplification paths of the low distortion amplifier 481a and the low distortion amplifier 481b described in the third embodiment are connected to each other.
- FIG. 28 is a block diagram showing a first modification of the third embodiment shown in FIG.
- the power amplifier of this modification has the same configuration force as that shown in FIG. 27 except that the combiner 64a and the distributor 76b are removed, and the output terminal of the amplifier 61a is connected to the anti-phase IM.
- the D3 generating circuit 63b is connected to the input terminal of the amplifier 62a, and the output terminal of the amplifier 62a is connected to the input terminal of the amplifier 62b.
- the amplifier 6 la provided with the anti-phase IMD3 generation circuit 63a in the previous stage includes a main signal 68a and a third-order intermodulation distortion 69a having an anti-phase with respect to the main signal 68a.
- Reverse phase IMD3 departure Transmit to raw circuit 63b.
- the amplifier 61b provided with the anti-phase IMD3 generation circuit 63b in the previous stage transmits the main signal 68b and the third-order intermodulation distortion 69b having an anti-phase with respect to the main signal 68b to the synthesizer 64b.
- the amplifier 62a not provided with the antiphase IMD3 generation circuit in the previous stage transmits the main signal 70a and the third-order intermodulation distortion 71a having the same phase with respect to the main signal 70a to the amplifier 62b.
- the amplifier 62b transmits the main signal 70b obtained by amplifying the main signal 70a and the third order intermodulation distortion 71b obtained by amplifying the third order intermodulation distortion 71a to the combiner 64b.
- the configuration shown in Fig. 28 is a two-stage configuration in which the low distortion amplifier 481a and the low distortion amplifier 481b are connected.
- the present invention is not limited to the two-stage configuration and has the same configuration as the low distortion amplifier 481a. Connect three or more low distortion amplifiers. By configuring a power amplifier in which low-distortion amplifiers are connected in multiple stages and increasing the number of amplifier stages, a higher gain amplifier can be realized.
- any one of the antiphase IMD3 generation circuits provided in the previous stage of amplifier 61a and amplifier 61b may be omitted.
- three or more stages of low distortion amplifiers having the same configuration as the low distortion amplifier 481a are connected, it is sufficient to provide a reverse phase IMD3 generation circuit for at least one low distortion amplifier.
- FIGS. 28 and 29 can be made smaller than the configuration shown in FIG. 27 by omitting the synthesizer 64a and the distributor 76b, and are the same as the configurations shown in FIG. A low distortion amplifier can be realized.
- the configuration of the power amplifier according to the fourth embodiment of the present invention will be described.
- the power amplifier of this embodiment has a configuration in which an amplifier is provided in front of the power amplifier described in the first embodiment.
- FIG. 30 is a block diagram showing a configuration example of the power amplifier according to the fourth embodiment.
- the power amplifier according to the present embodiment has a configuration including an amplifier 481 and an amplifier 491a provided in front of the amplifier 481.
- Amplifier 481 distributes input signal 65.
- An amplifier 62 connected in parallel with the circuit 63 and the amplifier 61, and an amplifier 61 and a combiner 64 that combines the output signals of the amplifier 62 are provided.
- An input terminal 74 is provided before the amplifier 491a, and an output terminal 75 is provided after the synthesizer 64.
- the negative-phase IMD3 generation circuit 63 is the same as any of the negative-phase IMD3 generation circuit 63 described in the first embodiment and the second embodiment and its modifications. It has the composition of.
- the anti-phase IMD3 generation circuit 63 in the present embodiment also generates third-order intermodulation distortion that is in anti-phase with the main signal based on the same principle as described in the first embodiment, the second embodiment, and the modification thereof. It is possible to output.
- the amplifier 491a when the input signal 65 is input via the input terminal 74, the amplifier 491a amplifies the input signal 65 and transmits it to the distributor 76.
- the distributor 76 distributes the signal received from the amplifier 49 la to the anti-phase IMD3 generation circuit 63 and the amplifier 62.
- the anti-phase IMD3 generation circuit 63 takes the third-order intermodulation distortion to be generated in anti-phase with respect to the main signal and with a large amplitude. As a result, the anti-phase IMD3 generation circuit 63 outputs anti-phase third-order intermodulation distortion with respect to the main signal. Then, amplifier 61 amplifies the main signal and third-order intermodulation distortion received from anti-phase IMD3 generation circuit 63 and transmits them to synthesizer 64.
- the amplifier 62 amplifies the main signal and third-order intermodulation distortion in phase with the main signal and transmits the amplified signal to the combiner 64.
- the amplifier 61 outputs a third-order intermodulation distortion 69 that is out of phase with respect to the main signal 68
- the amplifier 62 outputs a third-order intermodulation distortion 71 that is out of phase with respect to the main signal 70. Synthesized with 64.
- the third-order intermodulation distortion 69 and the third-order intermodulation distortion 71 cancel each other, and it becomes possible to output a signal with a low distortion at the output terminal 75.
- the anti-phase IMD3 generating circuit 63 sets the third-order intermodulation distortion to be generated in anti-phase with respect to the main signal and with a small amplitude. In this way, the anti-phase IMD3 generating circuit 63 adjusts the anti-phase third-order intermodulation distortion so that the amplitude does not become too large. Output.
- the amplifier 61 amplifies the main signal received from the anti-phase IMD3 generation circuit 63 and the third-order intermodulation distortion and transmits the amplified signal to the combiner 64.
- the amplifier 62 amplifies the main signal and third-order intermodulation distortion in phase with the main signal and transmits the amplified signal to the combiner 64.
- the amplifier 61 outputs a third-order intermodulation distortion 69 of opposite phase to the main signal 68
- the amplifier 62 outputs a third-order intermodulation distortion 71 of opposite phase to the main signal 70. Is synthesized. As a result, third-order intermodulation distortion 69 and third-order intermodulation distortion 71 cancel each other, and a low distortion signal can be output from output terminal 75.
- the configuration shown in FIG. 30 can reduce the number of parts compared to the configuration described in the third embodiment.
- This modification has a configuration in which the amplifier 491a is provided at the subsequent stage of the amplifier 481 in the power amplifier shown in FIG.
- a detailed description of the same configuration and operation as in the fourth embodiment is omitted.
- FIG. 31 is a block diagram showing a first modification of the fourth embodiment shown in FIG. Fig 3
- the embodiment shown in FIG. 1 is a configuration in which the amplifier 491a provided in the previous stage of the amplifier 481 is removed from the configuration shown in FIG. 30, and the amplifier 491b is provided in the subsequent stage of the amplifier 481 instead.
- a low distortion signal is output from the amplifier 481, and then amplified by the amplifier 491b. Since the third-order intermodulation distortion is reduced in the signal output from the amplifier 481, distortion can be suppressed and the main signal can be further amplified.
- the anti-phase IMD3 generating circuit 63 takes the third-order intermodulation distortion to be generated in anti-phase and large amplitude with respect to the main signal. As a result, the anti-phase IMD3 generation circuit 63 outputs anti-phase third-order intermodulation distortion to the main signal. Then, the amplifier 61 amplifies the main signal and third-order intermodulation distortion received from the antiphase IMD3 generation circuit 63 and transmits the amplified signal to the combiner 64.
- the amplifier 62 amplifies the main signal and the third-order intermodulation distortion in phase with the main signal to the synthesizer 64.
- the amplifier 61 outputs a third-order intermodulation distortion 69 that is out of phase with respect to the main signal 68
- the amplifier 62 outputs a third-order intermodulation distortion 71 that is out of phase with respect to the main signal 70. Synthesized.
- third-order intermodulation distortion 69 and third-order intermodulation distortion 71 cancel each other. In this way, it is possible to further reduce the amplitude of the third-order intermodulation distortion of the signal output from the amplifier 491b.
- the anti-phase IMD3 generating circuit 63 sets the third-order intermodulation distortion to be generated in anti-phase with respect to the main signal and with small amplitude. In this way, the anti-phase IMD3 generating circuit 63 adjusts and outputs the anti-phase third-order intermodulation distortion so that the amplitude does not become too large with respect to the main signal.
- the amplifier 61 amplifies the main signal received from the anti-phase IMD3 generation circuit 63 and the third-order intermodulation distortion and transmits the amplified signal to the combiner 64.
- the amplifier 62 amplifies the main signal and third-order intermodulation distortion in phase with the main signal and transmits the amplified signal to the combiner 64.
- the amplifier 61 outputs a third-order intermodulation distortion 69 of opposite phase to the main signal 68
- the amplifier 62 outputs a third-order intermodulation distortion 71 of opposite phase to the main signal 70. Is synthesized.
- third-order intermodulation distortion 69 and third-order intermodulation distortion 71 cancel each other. In this way, it is possible to further reduce the amplitude of the third-order intermodulation distortion of the signal output from the amplifier 491b.
- the configuration shown in Fig. 31 can also reduce the number of parts compared to the configuration shown in the third embodiment, and, similarly to the third embodiment, has low distortion and high gain. This amplifier can be realized.
- the configuration of the power amplifier according to the fifth embodiment of the present invention will be described.
- the power amplifier of this embodiment has an amplification path having a reverse phase IMD3 generation circuit and an inverse MD3 generation circuit described in the first embodiment, and a plurality of amplification paths are provided. It is a configuration.
- FIG. 32 is a block diagram showing a configuration example of the power amplifier according to the fifth embodiment.
- the power amplifier of the present embodiment includes a plurality of first amplification paths having a negative phase IMD3 generation circuit, and a plurality of second amplification paths not having a negative phase IMD3 generation circuit.
- a distributor 76 that distributes the input signal 65 to the plurality of first amplification paths and the plurality of second amplification paths, and the output signals of the plurality of first amplification paths and the plurality of second amplification path forces.
- Synthesize And a synthesizer 64 An input terminal 74 is provided upstream of the distributor 76, and an output terminal 75 is provided downstream of the combiner 64.
- the plurality of first amplification paths are a plurality of circuits 483a, 483b, ⁇ , 483x (a, b, ⁇ , x is m and m is an integer of 2 or more) It corresponds to.
- Each of the plurality of second amplification paths is provided with one amplifier. These amplifiers are expressed as amplifiers 62a, 62b,..., 62y (the number of a, b,..., Y is n, and n is an integer of 2 or more).
- the number of second amplification paths is n.
- the circuits 483a to 483x and the amplifiers 62a to 62y are connected in parallel.
- the circuit 483a includes an anti-phase IM D3 generation circuit 63a that outputs a main signal and a third-order intermodulation distortion having an anti-phase with respect to the main signal, and an amplifier connected to the output side of the anti-phase IMD3 generation circuit 63a Has 61a.
- the circuit 483b includes an anti-phase IMD3 generation circuit 63b and an amplifier 61b. Since the other circuits 483c to 483x have the same configuration, detailed description thereof is omitted here.
- each of the negative-phase IMD3 generation circuits 63a to 63x is the same as that of the negative-phase IMD3 generation circuit 63 described in the first embodiment, the second embodiment, and the modifications thereof. It has the same configuration as either one.
- the anti-phase IM D3 generation circuit 63 in the present embodiment is also based on the same principle as that described in the first embodiment, the second embodiment, and the modification thereof, and the third-order mutual phase of the main signal and the anti-phase. Modulation distortion can be output.
- Each of the anti-phase IMD3 generation circuits 63a to 63x in the circuits 483a to 483x is set so that the modulation distortion is offset.
- circuits 483a to 483x having anti-phase IMD3 generation circuits output anti-phase third-order intermodulation distortions 69a to 69x with respect to main signals 68a to 68x, respectively.
- an anti-phase IMD3 generating circuit is provided, and the amplifiers 62a to 62y in the amplification path output third-order intermodulation distortions 71a to 71y having anti-phase to the main signals 70a to 70y.
- the third-order intermodulation distortion 69a to 69x and the third-order intermodulation 71a to 71y, which are in opposite phase to each other, are synthesized so that they are canceled by the combiner 64, and the output in which the third-order intermodulation distortion is suppressed.
- Signal is output terminal 75 Is output.
- a low distortion amplifier can be realized as in the other embodiments described above.
- the present invention is applied to a Doherty amplifier.
- FIG. 33 is a block diagram showing a configuration example of the power amplifier according to the sixth embodiment.
- the power amplifier 501 of the present embodiment includes first and second amplification paths connected in parallel, and a distributor 76 that distributes an input signal to the first and second amplification paths.
- a synthesizer 64 for synthesizing the output signals of the first and second amplification paths.
- An input terminal 74 is provided upstream of the distributor 76, and an output terminal 75 is provided downstream of the combiner 64.
- the first amplification path includes a negative phase IMD3 generation circuit 63 that outputs the main signal and third-phase intermodulation distortion of the negative phase of the main signal, and an amplifier 561 connected to the output side of the negative phase IMD3 generation circuit 63. And a ⁇ 4 line 511 connected to the subsequent stage of the amplifier 561.
- the second amplification path includes an amplifier 562 and a ⁇ 4 line 512 connected to the front stage of the amplifier 562.
- the ⁇ ⁇ 4 line 511 and the ⁇ ⁇ 4 line 512 serve as a phase adjustment unit for changing the phase by 90 °.
- the negative phase IMD3 generation circuit 63 is the same as that of the negative phase IMD3 generation circuit 63 described in the first embodiment and the second embodiment and its modifications. It has the same configuration.
- the anti-phase IMD3 generation circuit 63 in this embodiment is also based on the same principle as described in the first embodiment, the second embodiment, and the modification thereof, and the third-order intermodulation of the main signal and anti-phase. It is possible to output distortion.
- amplifier 561 is set to ⁇ to ⁇ class bias, and amplifier 562 is set to a class C bias state.
- the amplifier 561 operates corresponding to the main amplifier in the Doherty amplifier, and the amplifier 562 operates corresponding to the sub-amplifier in the Doherty amplifier.
- the load impedance of the main amplifier 561 is changed over a wide input power range by utilizing the fact that the output impedance of the amplifier 562 changes as the input power increases based on the same principle as the conventional Dono and Tee type amplifiers. Can be set to an optimum state of efficiency.
- the amplifier 561 alone in a wide input power range The efficiency can be improved compared to the case of.
- a third-order intermodulation distortion 539 having an antiphase with respect to the main signal 538 is output from an amplifier 561 provided with an antiphase IMD3 generation circuit 63 in the preceding stage.
- the anti-phase IMD3 generation circuit is provided in the previous stage, and the third-order intermodulation distortion 541 having the same phase with respect to the main signal 540 is output from the amplifier 562.
- the third-order intermodulation distortion 539 and the third-order intermodulation distortion 541 that are in opposite phase to each other are synthesized so as to cancel each other out in the synthesizer 64, so that a low distortion signal is output to the output terminal 75.
- This modification is a configuration in which the anti-phase IMD3 generation circuit 63 provided in the first amplification path is provided in front of the amplifier 562 in the second amplification path in the configuration shown in FIG.
- FIG. 34 is a block diagram showing a first modification of the sixth embodiment shown in FIG.
- the power amplifier 502 shown in FIG. 34 removes the anti-phase IMD3 generation circuit 63 provided in the previous stage of the amplifier 561 operating as the main amplifier in the configuration shown in FIG. 33, and operates as a sub-amplifier instead. In this configuration, an anti-phase IMD3 generation circuit 63 is provided in front of the amplifier 562 to be operated.
- a third-order intermodulation distortion 529 having a reversed phase is output from the amplifier 562 provided with the reversed-phase IMD3 generating circuit 63 to the main signal 528.
- an anti-phase IMD3 generation circuit is provided in the previous stage, and an in-phase third-order intermodulation distortion 531 is output from the amplifier 561 to the main signal 530.
- the third-order intermodulation distortion 529 and the third-order intermodulation distortion 531 that are in opposite phase to each other are synthesized so as to cancel each other in the synthesizer 64, so that a low-distortion signal is output to the output terminal 75.
- This modification is a configuration in which, in the configuration shown in FIG. 33, the anti-phase IMD3 generation circuit 63 provided in the first amplification path is provided in front of the ⁇ 4 line 512 of the second amplification path.
- FIG. 35 is a block diagram showing a second modification of the sixth embodiment shown in FIG.
- the power amplifier 503 shown in FIG. 35 removes the anti-phase IMD3 generation circuit 63 provided in the preceding stage of the amplifier 561 operating as the main amplifier in the configuration shown in FIG. 33, and instead serves as a sub-amplifier.
- an anti-phase IMD3 generation circuit 63 is provided in front of the ⁇ 4 line 512 provided in the path including the amplifier 562 that operates.
- the efficiency can be improved over the wide input power range over the amplifier 561 alone, based on the same principle as that of the first modification of the sixth embodiment.
- distortion can be reduced.
- This modification is a configuration in which, in the configuration shown in FIG. 33, an equivalent circuit having characteristics equivalent to those of the ⁇ 4 line is replaced with the ⁇ 4 line.
- FIG. 36 is a block diagram showing a third modification of the sixth embodiment shown in FIG.
- the power amplifier 501a shown in FIG. 36 has a circuit composed of capacitive elements 551a and 551b and inductor elements 552a that are lumped constant elements.
- the ⁇ 4 wire 512 is replaced with a circuit 512a including capacitive elements 553a and 553b and an inductor element 554a.
- the circuit 51 la is an equivalent circuit having the same characteristics as the ⁇ ⁇ 4 wire 51 1.
- Circuit 512a is equivalent to ⁇ 4 wire 512.
- the circuit 511a includes the capacitive elements 551a and 551b and the inductor element 552a.
- the present invention is not limited to such a configuration, and the circuit 51la has a capacity.
- the circuit 512a may have a configuration in which the number of capacitive elements and inductor elements is added to or reduced from the configuration illustrated in FIG.
- ⁇ 4 line 511 and E ⁇ 4 line 512 are replaced with equivalent circuits, only one of them may be used.
- the efficiency can be improved over the wide input power range compared to the case of the amplifier 561 alone, and distortion can be reduced based on the same principle as in the sixth embodiment. Can be achieved.
- the first effect of the present invention is that distortion can be reduced while suppressing power loss during power combining, which has occurred in conventional parallel-type low distortion amplifiers. That's it.
- the reason for this is that in the present invention, a circuit that generates third-order intermodulation distortion that is out of phase with the main signal is proposed. This is because the main signal can be synthesized in the same phase.
- the second effect of the present invention is that the amplifier can operate with high efficiency and low distortion.
- the reason for this is that when the amplifier is operated in a state where the idle current of the amplifier is reduced for high-efficiency operation, third-order intermodulation distortion in phase with the main signal is generated, but the main proposed in the present invention. This is because a circuit that generates third-order intermodulation distortion that is out of phase with the signal can cancel out third-order intermodulation distortion that is in phase with the main signal generated by the amplifier force.
- the third effect of the present invention is that, in a circuit that generates third-order intermodulation distortion that is out of phase with the main signal, the amplitude and phase of the third-order intermodulation distortion that also generates the circuit force are set to optimum values.
- the distortion of the amplifier can be easily reduced. The reason is as follows.
- a circuit that generates third-order intermodulation distortion that is out of phase with the main signal By setting the load impedance in the RF fundamental band of the distortion generator circuit to the optimum value on the road, the amplitude of the third-order intermodulation distortion output from the distortion generator circuit can be set to the optimum value.
- the phase of the third-order intermodulation distortion output from the distortion generation circuit can be set to an optimal value. Therefore, the amplitude of the third-order intermodulation distortion from the circuit that generates the third-order intermodulation distortion in phase opposite to the main signal connected in parallel to the amplifier so that the third-order intermodulation distortion that also generates the amplifier force can be canceled. This is because the phase can be set to an optimum value.
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Abstract
Description
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JP2008512079A JP5245822B2 (ja) | 2006-04-21 | 2007-04-12 | 電力増幅器 |
US12/297,901 US7821337B2 (en) | 2006-04-21 | 2007-04-12 | Power amplifier |
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JP2006117745 | 2006-04-21 | ||
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PCT/JP2007/058059 WO2007123040A1 (ja) | 2006-04-21 | 2007-04-12 | 電力増幅器 |
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US9596120B2 (en) | 2013-09-26 | 2017-03-14 | Nec Corporation | Signal transmission apparatus, distortion compensation apparatus, and signal transmission method |
WO2018220668A1 (ja) * | 2017-05-29 | 2018-12-06 | 三菱電機株式会社 | 電力増幅器 |
WO2019130608A1 (ja) * | 2017-12-28 | 2019-07-04 | 住友電気工業株式会社 | 高調波処理回路及び増幅回路 |
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ATE467265T1 (de) * | 2002-09-17 | 2010-05-15 | Nxp Bv | Erhalten der linearität eines hf- leistungsverstärkers |
US8013680B2 (en) * | 2007-11-05 | 2011-09-06 | Viasat, Inc. | Distributed Doherty amplifiers |
JP5042955B2 (ja) * | 2008-09-22 | 2012-10-03 | 株式会社日立製作所 | 無線基地局及び受信機障害診断方法 |
US8736364B2 (en) * | 2009-10-13 | 2014-05-27 | Nec Corporation | Power amplifier and method of operation thereof |
US9264080B2 (en) * | 2014-01-31 | 2016-02-16 | Silicon Laboratories Inc. | Reducing second order distortion in an amplifier |
US20170005624A1 (en) | 2015-06-30 | 2017-01-05 | Skyworks Solutions, Inc. | Parallel amplifier linearization in a radio frequency system |
JP6422594B2 (ja) * | 2015-11-18 | 2018-11-14 | 三菱電機株式会社 | 歪補償回路 |
JP6729059B2 (ja) * | 2016-06-24 | 2020-07-22 | 日本電気株式会社 | 中継装置、中継システム及び中継方法 |
KR101973443B1 (ko) * | 2017-10-17 | 2019-04-29 | 삼성전기주식회사 | 왜곡특성이 개선된 파워 증폭 장치 |
KR102322042B1 (ko) * | 2017-11-29 | 2021-11-08 | 한국전자통신연구원 | 비선형 노이즈에 의한 광 신호의 왜곡을 방지하는 호스트 장치 및 상기 호스트 장치를 포함하는 분산형 안테나 시스템 |
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US7821337B2 (en) | 2010-10-26 |
JP5245822B2 (ja) | 2013-07-24 |
JPWO2007123040A1 (ja) | 2009-09-03 |
US20090072901A1 (en) | 2009-03-19 |
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