Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
  • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
  • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
  • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/12—Mountings, e.g. non-detachable insulating substrates
  • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
  • H01L23/15—Ceramic or glass substrates
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
  • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
  • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
  • H01L23/3731—Ceramic materials or glass
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
  • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
  • H01L2224/29001—Core members of the layer connector
  • H01L2224/29099—Material
  • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
  • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
  • H01L2224/321—Disposition
  • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/10—Details of semiconductor or other solid state devices to be connected
  • H01L2924/11—Device type
  • H01L2924/13—Discrete devices, e.g. 3 terminal devices
  • H01L2924/1304—Transistor
  • H01L2924/1305—Bipolar Junction Transistor [BJT]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/10—Details of semiconductor or other solid state devices to be connected
  • H01L2924/11—Device type
  • H01L2924/13—Discrete devices, e.g. 3 terminal devices
  • H01L2924/1304—Transistor
  • H01L2924/1305—Bipolar Junction Transistor [BJT]
  • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/10—Details of semiconductor or other solid state devices to be connected
  • H01L2924/11—Device type
  • H01L2924/13—Discrete devices, e.g. 3 terminal devices
  • H01L2924/1304—Transistor
  • H01L2924/1306—Field-effect transistor [FET]
  • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/03—Use of materials for the substrate
  • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/03—Conductive materials
  • H05K2201/0332—Structure of the conductor
  • H05K2201/0335—Layered conductors or foils
  • H05K2201/0352—Differences between the conductors of different layers of a multilayer
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/03—Conductive materials
  • H05K2201/0332—Structure of the conductor
  • H05K2201/0335—Layered conductors or foils
  • H05K2201/0355—Metal foils
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/09—Shape and layout
  • H05K2201/09209—Shape and layout details of conductors
  • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
  • H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
  • Y10T29/49155—Manufacturing circuit on or in base

Definitions

• Circuit board semiconductor module using the same, and circuit board manufacturing method
• the present invention is used in a circuit board, particularly a power semiconductor module, in which a metal circuit board serving as a conductive circuit board is bonded to one surface of an insulating ceramic substrate, and a metal heat dissipation plate is bonded to the other surface.
• the present invention relates to a bonded circuit board. In particular, it is a technology that can be effectively applied to power semiconductor modules that require high reliability for cooling and cooling cycles. Background art
• a conductive metal plate (metal circuit plate) that becomes a circuit is joined to one surface (upper surface) of an insulating ceramic substrate made of aluminum nitride or silicon nitride, and the other surface ( Circuit boards with a heat-dissipating metal plate (metal heat-dissipating plate) bonded to the lower surface are widely used.
• a copper plate or an aluminum plate is used as this metal plate.
• a semiconductor element or the like is mounted on the upper surface of the metal circuit board.
• the active ceramic method using brazing material and the V-free copper direct bonding method which directly bonds the copper plate, are used for bonding the insulating ceramic substrate and the metal plate.
• the metal circuit board and the metal heat sink are provided so that a large current can flow.
• the thickness of the plate is relatively thick, at least 0.5 mm.
• the thermal expansion coefficient of insulating ceramic and copper differ greatly (for example, about 3. OX 10 _6 ZK for silicon nitride ceramics) in, copper 16. 7 X 10 "VK) o Therefore, great thermal stress is generated in the cooling process and the power semiconductor module operation when the thermal cycle after bonding.
• Such a circuit board is required to have a reliability in which the heat radiation characteristic is guaranteed even after a predetermined number of times of a thermal cycle test from 55 ° C to 150 ° C. Depending on the field of use, for example, it is required to pass a thermal cycle test of 200 times or more, 1000 times or more, or even 3000 times or more. In particular, when it is mounted on a hybrid vehicle, an electric vehicle, a train, an aircraft, etc., high reliability with high heat and cold resistance is required.
• the aluminum nitride substrate has high thermal conductivity, but its mechanical strength and fracture toughness are low and its reliability is low, so that application to an insulating ceramic substrate is difficult.
• silicon nitride substrates have relatively high thermal conductivity and high mechanical properties as insulating ceramic substrates, so it is considered that circuit substrates can be realized with high reliability.
• Patent Document 1 describes a technique in which a fracture toughness value of a silicon nitride substrate is 6.5 MPa'm 1/2 or more. Has been. By using a silicon nitride substrate with a three-point bending strength of 500 MPa or more and a high fracture toughness value of 6.5 MPa ⁇ m 1/2 or more, the occurrence of cracks due to thermal stress is suppressed.
• the fracture toughness value is an amount indicating the difficulty of entering a crack when the insulating ceramic substrate is scratched.
• Patent Document 2 discloses that a metal circuit board or the like is bonded to an insulating ceramic substrate.
• the fracture toughness value of an insulating ceramic substrate is increased.
• joining metal circuit boards increases the fracture toughness value, especially on the surface of the insulating ceramic substrate (the face on the side where the metal circuit boards are joined), thereby increasing the durability against the thermal cycle. It has been shown.
• by improving the fracture toughness value of the surface of the insulating ceramic substrate particularly the surface ceramic surface force cracks are prevented from progressing and cracking.
• Patent Document 1 JP 2002-201075
• Patent Document 2 JP 2005-26252 A
• the present invention has been made in view of such problems, and an object thereof is to provide an invention that solves the above problems.
• the present invention has the following configurations to solve the above problems.
• the gist of the invention described in claim 1 is that an insulating ceramic substrate, a metal circuit board bonded to one surface of the insulating ceramic substrate, a metal heat sink bonded to the other surface of the insulating ceramic substrate, In the circuit board, the apparent fracture toughness value in the in-plane direction of the circuit board is 3.0 to 6.5 MPa'm 1/2 .
• the gist of the invention of claim 2 is that the difference between the fracture toughness value in the in-plane direction of the insulating ceramic substrate and the apparent fracture toughness value in the in-plane direction of the circuit board is 3.0 MPa'm 1/2
• the gist of the invention described in claim 3 resides in the circuit board according to claim 1 or 2, wherein the absolute value of the warp amount of the circuit board is 80 mZinch or less.
• the gist of the invention of claim 4 is that the fracture toughness value in the in-plane direction of the insulating ceramic substrate is 5.5 MPa'm 1/2 or more, and the thickness of the insulating ceramic substrate is 0.2 to 1.
• the gist of the invention described in claim 5 is that the metal circuit board and the metal heat sink are copper plates having a thickness of 0.5 mm to 5. Omm. It exists in the described circuit board.
• the gist of the invention described in claim 6 is that the ratio of the total area of the metal circuit board to the total area of the metal heat sink is 5Z9 or more, according to any one of claims 1 to 5. Lies on the circuit board.
• the gist of the invention according to claim 7 resides in the circuit board according to any one of claims 1 to 6, wherein the insulating ceramic substrate is silicon nitride ceramics.
• the gist of the present invention is that an insulating ceramic substrate, a metal circuit board bonded to one surface of the insulating ceramic substrate, a metal heat sink bonded to the other surface of the insulating ceramic substrate, and a circuit comprising In the substrate, the thickness of the insulating ceramic substrate is t (mm), the thickness of the metal circuit board is t (mm), the thickness of the metal heat sink is t (mm), and c 1 2 Existing in a circuit board characterized by (t 2 ⁇ t 2 ) / t 2 / ⁇ 1.5, where K (MPa'm 1/2 ) is the internal fracture toughness value of the porous ceramic substrate .
• the gist of the invention according to claim 9 resides in the circuit board according to claim 8, wherein the ratio of the total area of the metal circuit board to the total area of the metal heat sink is 5Z9 or more.
• the gist of the invention described in claim 10 resides in the circuit board according to claim 8 or 9, wherein the metal circuit board and the metal heat sink have a thickness of 0.5 to 5 mm.
• the gist of the invention described in claim 11 resides in the circuit board according to claim 8 or 9, wherein the metal circuit board and the metal heat sink have a thickness of 0.8 to 5 mm.
• the gist of the invention of claim 12 is the circuit board according to any one of claims 8 to 11, wherein the thickness of the insulating ceramic substrate is 0.2 to 1.0 mm. Exist.
• the gist of the invention described in claim 13 is the force 1 according to any one of claims 8 to 12, wherein an apparent fracture toughness value inside the circuit board is 4.0 MPa'm 1/2 or more.
• the circuit board is the force 1 according to any one of claims 8 to 12, wherein an apparent fracture toughness value inside the circuit board is 4.0 MPa'm 1/2 or more.
• the gist of the invention of claim 14 is that the difference between the fracture toughness value inside the insulating ceramic substrate and the apparent fracture toughness value inside the circuit board is 2.5 MPa'm 1/2 or less.
• the gist of the invention of claim 15 resides in the circuit board according to any one of claims 8 to 14, wherein the metal circuit board and the metal heat sink are copper.
• the gist of the invention of claim 16 resides in the circuit board according to any one of claims 8 to 15, wherein the insulating ceramic substrate is silicon nitride ceramics.
• the gist of the invention described in claim 17 is that the bonding between the insulating ceramic substrate and the metal circuit board and the bonding between the insulating ceramic substrate and the metal heat radiating plate are performed through an active metal filter material.
• the subject matter of claim 18 is an insulating ceramic substrate, a metal circuit board bonded to one surface of the insulating ceramic substrate, a metal heat dissipation plate bonded to the other surface of the insulating ceramic substrate,
• a circuit board manufacturing method comprising: joining an insulating ceramic substrate and the metal circuit board and joining the insulating ceramic substrate and the metal heat dissipation plate through an active metal brazing material.
• the circuit board manufacturing method is characterized in that the brazing temperature is 600 ° C to 900 ° C.
• the gist of the invention described in claim 19 is that the fracture toughness value in the in-plane direction of the insulating ceramic substrate is 5.5 MPa'm 1/2 or more, and the thickness of the insulating ceramic substrate is 0.2 to 1. 19.
• the gist of the invention of claim 20 is that the metal circuit board and the metal heat sink are 0.5 m.
• the method of manufacturing a circuit board according to claim 18, wherein the circuit board is a copper plate having a thickness of m to 5. Omm.
• the gist of the invention described in claim 21 is that the ratio of the total area of the metal circuit board to the total area of the metal heat sink is 5/9 or more. It exists in the manufacturing method of the circuit board of description.
• the gist of the invention described in claim 22 resides in the method for manufacturing a circuit board according to any one of claims 18 to 21, wherein the insulating ceramic substrate is silicon nitride ceramics.
• the gist of the invention described in claim 23 is that the thickness of the insulating ceramic substrate is t (mm), the thickness of the metal circuit board is t (mm), and the thickness of the metal heat sink is t (mm). And said insulation
• the gist of the invention described in claim 24 is that the ratio of the total area of the metal circuit board to the total area of the metal heat sink is 5Z9 or more. Exist.
• the gist of the invention of claim 25 is the method for manufacturing a circuit board according to claim 23 or 24, characterized in that the thickness of the metal circuit board and the metal heat sink is 0.5 to 5 mm. Exist.
• the gist of the invention described in claim 26 is that the thickness of the metal circuit board and the metal heat radiating plate is 0.8 to 5 mm, according to the method for manufacturing a circuit board according to claim 23 or 24. Exist.
• the gist of the invention of claim 27 is the circuit board according to any one of claims 23 to 26, wherein the thickness of the insulating ceramic substrate is 0.2 to 1.0 mm. It exists in the manufacturing method.
• the gist of the invention described in claim 28 resides in the method of manufacturing a circuit board according to any one of claims 23 to 27, wherein the metal circuit board and the metal heat sink are copper.
• the gist of the invention described in claim 29 resides in the method for manufacturing a circuit board according to any one of claims 23 to 28, wherein the insulating ceramic substrate is silicon nitride ceramics.
• the gist of the invention of claim 30 is a semiconductor module comprising the circuit board according to any one of claims 1 to 17 and a semiconductor chip mounted on the circuit board. Exist.
• the present invention is configured as described above, even when a thick metal circuit board or a metal heat sink is used, it is highly durable against cracking of an insulating ceramic substrate even with respect to a thermal cycle. A circuit board and a semiconductor module having characteristics can be obtained.
• the inventor has found that the fracture toughness value evaluated in the cross section of the insulating ceramic substrate is greater than the fracture toughness value evaluated on the surface of the insulating ceramic substrate for the durability of the semiconductor module against the thermal cycle. Have a stronger correlation.
• the fracture toughness values evaluated in this section include the apparent fracture toughness value in the in-plane direction and the internal fracture strength. The inventors have invented a circuit board configuration capable of keeping these fracture toughness values high, thereby obtaining a semiconductor module having high durability against a thermal cycle.
• FIG. 1 is a plan view of the circuit board 1 and a cross-sectional view in the II direction.
• a metal circuit board 3 is bonded to one surface of an insulating ceramic substrate 2 and a metal heat sink 4 is bonded to the other surface via a brazing material 5.
• the insulating ceramic substrate 2 for example, silicon nitride ceramic is used.
• copper is used as the metal circuit board 3 and the metal heat sink 4.
• the brazing filler metal 5 is an active metal typified by, for example, an Ag-Cu alloy to which Ti is added. To be joined.
• the semiconductor module using the circuit board 1 is formed by mounting a semiconductor chip (not shown) connected to the metal circuit board 3 with solder.
• the apparent fracture toughness value K in the in-plane direction of the circuit board 1 is 3.0 to 6.5 MPa'm 1/2 .
• K is a value for the extension of cracks in the in-plane direction of the insulating ceramic substrate 2.
• the toughness value K depends on the fracture toughness value of the insulating ceramic substrate 2 and the insulating ceramic substrate 2.
• the apparent fracture toughness value causes cracks in the insulating ceramic substrate 2 in the circuit board 1 to which the metal circuit board 3 and the metal heat sink 4 are joined. It is possible to grasp the mechanical characteristics against extension. Further, the cracks generated in the insulating ceramic substrate 2 due to the stress caused by the difference in thermal expansion between the insulating ceramic substrate 2 and the metal plate are more easily extended in the in-plane direction of the insulating ceramic substrate 2. Therefore, the apparent fracture toughness value K in the in-plane direction is set to 3. OMPa-m 1
• the apparent fracture toughness value in the thickness direction where the anisotropy of the fracture toughness value is high, becomes low, and cracks may extend in the thickness direction. Therefore, the apparent fracture toughness value K in the in-plane direction is desirably 6.5 MPa'm 1/2 or less.
• FIG. 2 shows an outline of a method for measuring K 1 and K 2.
• the direction of the diagonal is parallel to the surface of the insulating ceramic substrate 2 (horizontal direction) and the Vickers indenter specified in JISB7725 A square indentation 6 in the thickness direction (vertical direction) is formed.
• the length of the diagonal line of the indent 6 is equal in both directions, and its length is 2a.
• FIG. 2 cracks in the insulating ceramic substrate 2 occur in the diagonal direction, and the total length is 2c in the horizontal direction and 2c in the vertical direction.
• the crack length c in the IF method compliant with JISR1607 c
• the fracture toughness value calculated from the horizontal crack is the fracture toughness value K in the in-plane direction or the fracture toughness value K in the in-plane direction.
• K becomes a smaller value.
• FIG. 3 is a schematic diagram of cracks that occur in the actual circuit board 1 during the cooling and heating cycle.
• the semiconductor chip 7 is mounted in contact with the metal circuit board 3 via a solder layer (not shown).
• Cracks 8 occur in the insulating ceramic substrate 2, especially near the outer peripheral surface of the pattern of the metal circuit board 3, and extend in the horizontal direction inside the insulating ceramic substrate 2 as shown in FIG. 3.
• the reason for this is that tensile stress tends to work particularly in the thickness direction in the insulating ceramic substrate 2 to which the metal circuit board 3 and the metal heat sink 4 are joined.
• the difference between the apparent fracture toughness value in the in-plane direction of the plate 1 and the fracture toughness value in the in-plane direction of the insulating ceramic substrate 2 depends on the residual stress applied to the insulating ceramic substrate 2 in the circuit board 1 Value. Therefore, this reduces the residual stress applied to the insulating ceramic substrate 2.
• the apparent fracture toughness value in the in-plane direction of the circuit board 1 is 3.0. It was ⁇ 6.5 MPa′m 1/2 , and the cracks that entered the insulating ceramic substrate 2 from the outer peripheral portion of the metal circuit board 3 bonded to the insulating ceramic substrate 2 were extended, leading to destruction.
• the absolute value of the warp amount of the circuit board 1 was set to 80 / z mZincMlinch or less, and the residual stress applied to the insulating ceramic substrate 2 was reduced.
• the apparent fracture toughness value K in the in-plane direction of the circuit board 1 is 3.0 to 6.5 MPa'm 1/2 , and the insulation
• Figure 4 shows the creation of multiple circuit boards 1 with different thicknesses of the metal circuit board 3, and the relationship between the amount of warpage and the above-mentioned K.
• the warpage amount is 80 mZinch or less, and it can be confirmed that the thermal cycle characteristics are improved.
• the fracture toughness value K in the in-plane direction of the insulating ceramic substrate 2 is set to 5.5 MPa-m 1/2
• the residual stress applied to the insulating ceramic substrate 2 was reduced by setting the thickness to 0.2 mm or more.
• the lower limit of 0.2 mm it has been confirmed that cracks do not occur even within the range of 0.2 mm ⁇ 0.02 mm. Therefore, even within this range, it can be preferably used.
• the apparent fracture toughness in the in-plane direction of the circuit board 1 becomes 3.0 to 6.5 MPa'm 1/2 , and the metal circuit bonded to the insulating ceramic substrate 2
• the fracture toughness value varies depending on the type of raw material powder used, the composition of the sintering aid, the amount of added calories, the sintering conditions, and the like. Therefore, by optimizing the manufacturing conditions, the columnar particles can be grown, and the amount and composition of the grain boundary phase in the sintered body can be optimized to increase the grain boundary strength. . In addition, it is possible to increase the fracture toughness value in a certain direction by orienting crystal grains in a desired direction and imparting anisotropy. In addition, in order to ensure the heat dissipation of circuit board 1, the thickness of insulating ceramic substrate 2 is 1. Omm or less It is desirable that
• the ratio (area ratio) of the total area of the metal circuit board 3 to the total area of the metal heat sink 4 was set to 5Z9 or more.
• a circuit pattern is actually formed on the metal circuit board 3
• a circuit forming portion in which the metal circuit board 3 is bonded to the one surface of the insulating ceramic substrate 2 and the metal circuit board are provided. When 3 is joined, there is a non-circuit forming part.
• the apparent fracture toughness value K in the in-plane direction is 3.
• a highly reliable circuit board 1 can be obtained at 0 to 6.5 MPa'm 1/2 .
• cracks entering the insulating ceramic substrate 2 from the outer peripheral portion of the metal circuit board 3 bonded to the insulating ceramic substrate 2 were extended and could not be broken.
• Figure 5 shows the results of investigating the relationship between this area ratio and K, as in Figure 4. From this result, if this area ratio is small
• the area ratio should be 5Z9 or higher (0.556 or higher).
• the metal circuit board 3 and the metal heat sink 4 are preferably copper plates having a thickness of 0.5 to 5. Omm.
• the metal circuit board 3 and the metal heat sink 4 are preferably copper plates having a thickness of 0.5 to 5. Omm.
• the metal circuit board 3 and the metal heat sink 4 a copper plate having a thickness of 0.5 mm or more and high thermal conductivity, it is possible to provide the circuit board 1 having a good heat dissipation and the thickness is 5 Omm or less can reduce the residual stress due to the difference in thermal expansion between the insulating ceramic substrate 2, the metal circuit board 3, and the metal heat sink 4, and the apparent fracture toughness value K in the in-plane direction is 3.0.
• a highly reliable circuit board 1 can be obtained at ⁇ 6.5 MPa'm 1/2 .
• thermal cycle characteristics can be improved.
• Sarasako uses a brazing material 5 that is an active metal to bond the insulating ceramic substrate 2 and the metal circuit board 3 and the insulating ceramic substrate 2 and the metal heat sink 4 through a brazing material 5. This was done by heating at ⁇ 900 ° C.
• the residual stress applied to the insulating ceramic substrate 2 is caused by the difference in thermal expansion between the insulating ceramic substrate 2, the metal circuit board 3, and the metal heat sink 4 at the time of bonding. Therefore, by reducing the bonding temperature to 900 ° C or lower. Therefore, the difference in thermal expansion between the insulating ceramic substrate 2 and the metal plate can be reduced, and the residual stress can be reduced.
• the insulating ceramic substrate 2 and the metal circuit board are joined to each other through an active metal brazing material, and the brazing temperature is set to 600 ° C. to 900 ° C. 3 and the metal heat sink 4 can reduce the residual stress due to the difference in thermal expansion, and the apparent fracture toughness value K in the in-plane direction is 3.0 to 6.5 MPa'm 1/2 .
• a highly reliable circuit board 1 can be obtained.
• the outer peripheral force of the metal circuit board 3 bonded to the insulating ceramic substrate 2 was strong enough to cause cracks to enter the insulating ceramic substrate 2 and to break down.
• thermal cycle characteristics are improved by setting the temperature to 900 ° C or lower.
• an Ag-Cu alloy paste to which Ti, the active metal is added is printed on both sides of the insulating ceramic substrate 2 (silicon nitride ceramics) as an active metal brazing material.
• the same rectangular metal plate (copper) is heated and bonded to both sides at a temperature of 600 ° C to 900 ° C.
• the metal plate on one side of the insulating ceramic substrate 2 is etched to form a metal circuit plate 3 that forms a circuit pattern.
• the metal plate bonded to the other surface may be used as it is as the metal heat radiating plate 4 without etching treatment, or the metal heat radiating plate 4 may be similarly formed by forming a pattern.
• Ni-P plating is applied to the metal circuit board 3 and the metal heat sink 4 after the circuit pattern is formed, and the circuit board 1 is manufactured.
• a semiconductor module is formed by mounting a semiconductor chip on the circuit board 1 described above.
• the metal circuit board 3 and the semiconductor chip are, for example, soldered. Jointed.
• This semiconductor module has high durability against thermal cycles.
• the circuit board 11 according to the second embodiment of the present invention can be applied regardless of the strength of anisotropy of the insulating ceramic substrate.
• the structure of the circuit board 11 is the same as that of the circuit board 1 according to the first embodiment, and FIG. 1 shows a plan view and a sectional view taken along line I-I.
• a metal circuit board 13 is joined to one surface of an insulating ceramic substrate 12, and a metal heat radiating plate 14 is joined to the other face via a brazing material 15.
• the thickness of the insulating ceramic substrate 12 is t
• the thickness of the metal circuit board 13 is t
• the thickness of the metal heat sink 14 is t.
• the thickness of the brazing material 15 is negligible compared to these. Insulating cell
• the brazing filler metal 15 is an active metal typified by, for example, an Ag-Cu alloy doped with Ti, and the metal circuit board 13 and the metal heat sink 4 are insulated at a temperature of about 750 ° C. Bonded to the conductive ceramic substrate 12.
• the apparent fracture toughness value K inside the circuit board 11 is 4.0 MPa'm 1/2 or more.
• the apparent fracture toughness value inside the circuit board 11 refers to the insulation in the circuit board 11 having a structure in which the metal circuit board 13 is bonded to one surface of the insulating ceramic substrate 12 and the metal heat sink 14 is bonded to the other surface. This is the amount measured by the IF method in which a Vickers indenter is pushed into the cross section of the ceramic substrate 12 in the direction A in FIG. 2 with a predetermined load (for example, 2 kgf) in accordance with JISR1607.
• the internal fracture toughness value K is the fracture toughness value calculated in the same manner for the insulating ceramic substrate 12 before the metal circuit board 13 and the metal heat sink 14 are joined. These are amounts showing the difficulty of crack extension in the horizontal and vertical directions of the insulating ceramic substrate 12. K is an amount determined by the properties of the insulating ceramic substrate, but K depends on the fracture toughness value of the insulating ceramic substrate 12 itself and the residual stress applied to the insulating ceramic substrate 12. For example, if there is a residual stress in the tensile direction, cracks tend to extend especially in the direction perpendicular to the direction of the tensile stress. In this case, the apparent fracture toughness value K is Get smaller.
• the internal apparent fracture toughness value K is a value obtained by applying metal to the insulating ceramic substrate 12. After the circuit board 13 and the metal heat radiating board 14 are joined, the apparent fracture toughness value K in the in-plane direction is calculated by the method shown in FIG. However, the crack length at this time c
• the fracture toughness values calculated from the cracks in the straight direction are the internal apparent toughness value K and the internal fracture toughness value K. These are quantities indicating the difficulty of cracking the insulating ceramic substrate 12 in the horizontal and vertical directions.
• the internal apparent fracture toughness value K depends on the internal fracture toughness value K of the insulating ceramic substrate 12.
• the thickness t, the thickness t of the metal circuit board 13, and the thickness of the metal heat sink 14 It depends on t.
• FIG. 7 shows the result of investigating the number of cycles (cycle life) until the insulating ceramic substrate 12 is cracked by applying a thermal cycle to the circuit board 11 and examining the correlation with the above-mentioned apparent fracture toughness value K. is there. From this, it was confirmed that there was a strong correlation between the cycle life and the apparent fracture toughness value K inside. In particular, in order to increase the cycle life to 3000 times or more, it was confirmed that the internal apparent fracture toughness value K was 4.0 MPa'm 1/2 .
• the fracture toughness value of the surface of the insulating ceramic substrate 12 also changes by joining the metal circuit board 13 and the heat sink 14.
• the fracture toughness value of the surface is the same as the internal fracture toughness value from the indentation and cracks that were obtained by injecting a Vickers indenter into the surface of the insulating ceramic substrate 12 in the direction B in FIG. Calculated by the method.
• Figure 8 shows the results of investigating the correlation between the cycle life in this case and the fracture toughness value of this surface. It can be seen that the correlation is weaker than in Figure 7. That is, the cycle life has a greater influence on the internal apparent fracture toughness value K force than on the surface fracture toughness value. This fact shows that when the insulating ceramic substrate 12 is cracked by the thermal cycle, the influence of the internal crack extension is larger than that of the crack extension on the surface.
• the internal apparent fracture toughness value K is gold
• the fracture toughness value K of the inner part of the insulating ceramic substrate 12 becomes smaller. This is because residual stress in the tensile direction is generated inside the insulating ceramic substrate 12 due to the joining of the metal circuit board 13 and the metal heat sink 14. Therefore, in order to reduce this effect and keep the internal apparent fracture toughness value K high, the thickness (t and t) of the metal circuit board 13 and the metal heat sink 14 is small and close.
• the inventor sets the thickness of the insulating ceramic substrate 12 to t (mm), the thickness of the metal circuit board 13 to t (mm), and the thickness of the metal heat sink 14 t (mm), insulating ceramic
• ZK was the amount giving this guideline.
• X is 1.5 (lZMPaZm 1/2 )
• the apparent fracture toughness value K inside the insulating ceramic substrate 12 becomes 4.0 MPa'm 1/2 or more.
• a high cycle life with respect to the thermal cycle was obtained.
• the internal fracture toughness value K is 6.5 MPa'm 1/2 and the thickness t is 0.3 mm.
• a silicon nitride ceramic substrate is used as the insulating ceramic substrate 12, and the metal circuit board 13 and the metal heat sink 14
• Figure 9 shows the result of measuring the internal apparent fracture toughness value K after bonding the different thicknesses of copper (both copper) to this and examining the correlation with the above X value.
• K was always smaller than K, but in particular, it was confirmed that as X increases, K tends to decrease. In the figure, white circles did not crack after 3000 heat cycles, and X points cracked. From this result, the internal apparent fracture toughness igK can be set to 4.0 MPa'm 1/2 or more when X is 1.5 (lZMPaZm 1/2 ), and a high cycle life against the thermal cycle is obtained. It was.
• Fig. 10 shows the result of examining the correlation between the difference K-K between the internal fracture toughness value K and the apparent internal fracture toughness value K, and the above X.
• K is always smaller than K (K-K> 0) force
• X is 1.5 (lZMPaZm 1/2 )
• K-K should be 2.5MPa'm 1/2 or less. It can be confirmed that a high cycle life with respect to the thermal cycle can be obtained.
• the ratio (area ratio) of the total area of the metal circuit board 13 to the total area of the metal heat sink 14 was set to 5/9 or more (0.556 or more).
• FIG. 11 shows the results of preparing a plurality of circuit boards 11 with different total areas of the metal circuit board 13 and examining the relationship between the area ratio and the KK. From this result, it can be confirmed that when this area ratio is small, KK becomes large, and by setting this area ratio to 5Z9 or more, a high cycle life and a cycle life can be obtained.
• the thickness of the metal circuit board 13 and the metal heat sink 14 was in the range of 0.5 to 5. Omm. If it is thinner than 0.5 mm, the heat dissipation effect will be insufficient, and if it is thicker than Omm, the volume of the semiconductor module will increase and the weight will increase, which is not practical. In the case of circuit boards used in higher power semiconductor modules, the thickness of the metal circuit board 13 and the metal heat sink 14 is set to 0.8 to 5. Omm in order to improve the heat dissipation characteristics. In this case, the warp of the circuit board 11 due to the difference in thermal expansion is further increased, and the effect of setting X in the above range is remarkable.
• the thickness of the insulating ceramic substrate 12 is preferably larger as described above, but specifically, it is preferably about 0.2 to 1. Omm. 0.
• the thickness is less than 2 mm, the metal circuit board 13 and the metal heat sink 14 are easily broken even when the fracture toughness is high. Resistance and inductance increase, which is not preferable.
• the internal fracture toughness value K is preferably 5.5 to 7.5 MPa'm 1/2 .
• silicon nitride ceramics are preferably used as an insulating ceramic substrate having such characteristics.
• the insulating ceramic substrate 12, the metal circuit board 13, and the metal heat sink 14 are joined by the brazing material 15.
• the brazing material 15 is, for example, an Ag—Cu based alloy paste to which Ti as an active metal is added.
• the brazing temperature is preferably 600 to 900 ° C. If the temperature is lower than 600 ° C, brazing will be poor.
• the difference in thermal expansion between the mix substrate 12 and the metal circuit board 13 becomes particularly large, and the residual stress acting on the insulating ceramic substrate 12 becomes high.
• FIG. 12 shows the result of investigating the relationship between this temperature and the KK as in the case of FIG. From this result, it can be confirmed that when this temperature is high, KK becomes large, and by making this temperature 900 ° C or less, the thermal cycle characteristics are improved.
• the circuit board 11 can be manufactured by the same manufacturing method as the circuit board 1 described above.
• a semiconductor module using the same can be manufactured in the same manner.
• This semiconductor module has high durability against cold cycles.
• the metal circuit board and the metal heat sink are joined to the insulating ceramic substrate by brazing.
• high durability is obtained. be able to.
• a circuit board and a semiconductor module were produced using a silicon nitride ceramic substrate as the insulating ceramic substrate and a copper plate as the metal circuit plate and the metal heat dissipation plate.
• In-plane fracture toughness value K and internal fracture toughness value K of the silicon nitride ceramic substrate adopted,
• Table 1 shows the thickness and thickness of the metal circuit board and metal heat sink.
• An active metal brazing material was printed on both sides of the silicon nitride ceramic substrate, and a rectangular copper plate substantially the same as the silicon nitride ceramic substrate was heated and bonded to both sides at a temperature of 600 ° C to 900 ° C.
• Table 1 shows the heat bonding temperatures (brazing temperatures) for each. After cooling, the metal circuit board and the metal heat sink are etched so as to have a predetermined pattern, and the metal circuit board and the metal heat sink A circuit board was fabricated by applying Ni-P plating to the substrate.
• the apparent fracture toughness value K of the part was determined. Measurements were taken at any five locations, and the average value was taken as the apparent fracture toughness value. Circuit board warpage was measured diagonally using a three-dimensional measuring instrument, and the value obtained by dividing the maximum value of the warpage by the length of the diagonal line was taken as the amount of warpage. Table 1 shows these apparent fracture toughness values and warpage.
• a semiconductor chip was soldered on the metal circuit board of the obtained circuit board, and then wire bonding was performed to obtain a semiconductor module.
• the circuit board and the semiconductor module were subjected to a heat cycle test as shown below.
• the heat cycle test the temperature increase / decrease cycle with cooling at 55 ° C for 20 minutes, holding at room temperature for 10 minutes and heating at 150 ° C for 20 minutes is one cycle, and this is repeated 3000 cycles. Then, it was evaluated whether cracks in the silicon nitride ceramic substrate and peeling of the metal circuit board occurred. Cracks were generated by fluorescent flaw detection. Table 1 shows whether cracks occurred after the heat cycle test.
• the thickness was 0.5-5. Omm.
• the area ratio of the total area of the metal circuit board to the total area of the metal heat sink is 5Z9 or more.
• the brazing temperature is 600 or more and less than 900 ° C. In addition, this makes the fracture toughness value in the in-plane direction in the range of 3.0 to 6.5 MPa'm 1/2 .
• Comparative Examples 1 to 7 change t, K, t, and t so that (t 2 -t 2 ) / t 2 / K ⁇ l.
• Example 8 the ratio of the total area of the metal circuit board to the area of the metal heat sink is less than 5Z9.
• the brazing temperature was 950 ° C.
• Table shows the results of examining the internal apparent fracture toughness value in the examples and comparative examples, the difference between the internal fracture toughness value and the internal apparent fracture toughness value, and the presence or absence of cracks after the application of the thermal cycle. Shown in 1.
• FIG. 1 is a plan view and a cross-sectional view of a circuit board according to first and second embodiments of the present invention.
• FIG. 2 is a schematic diagram showing a method for measuring fracture toughness values in circuit boards according to first and second embodiments.
• FIG. 3 is a schematic view showing a situation of cracks generated by applying a cooling cycle in the circuit boards according to the first and second embodiments.
• FIG. 4 is a diagram showing the relationship between the amount of warpage of the circuit board and the apparent fracture toughness value K in the in-plane direction in the circuit board according to the first embodiment of the present invention.
• FIG. 6 is a diagram showing the relationship between the brazing temperature and the apparent fracture toughness value K in the in-plane direction in the circuit board according to the first embodiment of the present invention.
• FIG. 8 A graph showing the relationship between the life against the cold cycle and the fracture toughness value of the surface.
• FIG. 9 is a diagram showing the relationship between an internal apparent fracture toughness value K and X in a circuit board according to a second embodiment of the present invention.
• FIG. 10 is a diagram showing the relationship between the difference K ⁇ K between the apparent fracture toughness value and the internal fracture toughness value and X in the circuit board according to the second embodiment of the present invention. .
• FIG. 11 is a diagram in which the relationship between the ratio of the total area of the metal circuit plate to the total area of the metal heat sink and KK in the circuit board according to the second embodiment of the present invention is examined.
• FIG. 12 is a diagram showing the relationship between brazing temperature and KK in a circuit board according to a second embodiment of the present invention.

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