WO2006095805A1 - 電子回路およびその製造方法 - Google Patents

電子回路およびその製造方法 Download PDF

Info

Publication number
WO2006095805A1
WO2006095805A1 PCT/JP2006/304571 JP2006304571W WO2006095805A1 WO 2006095805 A1 WO2006095805 A1 WO 2006095805A1 JP 2006304571 W JP2006304571 W JP 2006304571W WO 2006095805 A1 WO2006095805 A1 WO 2006095805A1
Authority
WO
WIPO (PCT)
Prior art keywords
electronic circuit
bonding
bonding pad
wire
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2006/304571
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
Naoki Matsushima
Hideaki Takemori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Kyowa Engineering Co Ltd
Original Assignee
Hitachi Kyowa Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Kyowa Engineering Co Ltd filed Critical Hitachi Kyowa Engineering Co Ltd
Priority to US11/814,847 priority Critical patent/US20090294158A1/en
Priority to EP06715442A priority patent/EP1860691A4/en
Publication of WO2006095805A1 publication Critical patent/WO2006095805A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/328—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by welding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/015—Manufacture or treatment of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07141—Means for applying energy, e.g. ovens or lasers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
    • H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07531—Techniques
    • H10W72/07535—Applying EM radiation, e.g. induction heating or using a laser
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5434—Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.

Definitions

  • the present invention relates to an electronic circuit and a method of manufacturing the same, and more particularly to an electronic circuit connecting conductor wires to bonding pads formed on the surface of a resin insulating film and a method of manufacturing the same.
  • Patent Document 1 describes a wire bonding method in which a wire is pulled upward after ball bonding and separated at the tip end of a gold ball to form a bump and second bonding of wire bonding is performed on the bump. There is.
  • Patent Document 3 improves the invention described in Patent Document 1, and after bringing a gold metal into contact with a base metal conductor, the ca- bly is moved in the horizontal direction simultaneously with the vertical direction to increase the bonding area. A wire bonding method for forming bumps is described.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 3-183139
  • FIG. 10 is a plan view and a sectional view of a semiconductor device on which the semiconductor chip 9 is mounted.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
PCT/JP2006/304571 2005-03-09 2006-03-09 電子回路およびその製造方法 Ceased WO2006095805A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US11/814,847 US20090294158A1 (en) 2005-03-09 2006-03-09 Electronic circuit and method for manufacturing same
EP06715442A EP1860691A4 (en) 2005-03-09 2006-03-09 ELECTRONIC SWITCHING AND MANUFACTURING METHOD THEREFOR

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005065431A JP4558539B2 (ja) 2005-03-09 2005-03-09 電子回路用基板、電子回路、電子回路用基板の製造方法および電子回路の製造方法
JP2005-065431 2005-03-09

Publications (1)

Publication Number Publication Date
WO2006095805A1 true WO2006095805A1 (ja) 2006-09-14

Family

ID=36953398

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2006/304571 Ceased WO2006095805A1 (ja) 2005-03-09 2006-03-09 電子回路およびその製造方法

Country Status (4)

Country Link
US (1) US20090294158A1 (enExample)
EP (1) EP1860691A4 (enExample)
JP (1) JP4558539B2 (enExample)
WO (1) WO2006095805A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158750A (ja) * 2007-12-27 2009-07-16 Fujifilm Corp ワイヤボンディング方法及び半導体装置
US8525040B2 (en) * 2008-08-29 2013-09-03 Kyocera Corporation Circuit board and its wire bonding structure
US20100181675A1 (en) * 2009-01-16 2010-07-22 Infineon Technologies Ag Semiconductor package with wedge bonded chip
US20110156260A1 (en) * 2009-12-28 2011-06-30 Yu-Hua Huang Pad structure and integrated circuit chip with such pad structure
EP2362432B1 (en) * 2010-02-25 2017-06-07 Saint-Augustin Canada Electric Inc. Solar cell assembly
US9679869B2 (en) 2011-09-02 2017-06-13 Skyworks Solutions, Inc. Transmission line for high performance radio frequency applications
CN104410373B (zh) 2012-06-14 2016-03-09 西凯渥资讯处理科技公司 包含相关系统、装置及方法的功率放大器模块
JP2014143276A (ja) * 2013-01-23 2014-08-07 Sumitomo Electric Ind Ltd 半導体装置
CN104101961B (zh) * 2013-04-12 2018-12-11 常州市华一通讯科技有限公司 光学通讯装置
US20140339690A1 (en) * 2013-05-20 2014-11-20 Infineon Technologies Ag Elimination of Die-Top Delamination
US9686856B2 (en) * 2014-04-02 2017-06-20 Finisar Corporation Transmission lines
TWI690043B (zh) * 2016-02-17 2020-04-01 瑞昱半導體股份有限公司 積體電路裝置
JPWO2018221256A1 (ja) * 2017-05-29 2020-03-26 株式会社ジャパンディスプレイ 表示装置

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02112249A (ja) * 1988-10-21 1990-04-24 Hitachi Ltd 半導体装置の組立方法およびそれに用いられるワイヤボンディング装置ならびにこれによって得られる半導体装置
JPH03183139A (ja) * 1989-12-12 1991-08-09 Nippon Steel Corp ワイヤボンディング方法
JPH06188559A (ja) * 1992-12-21 1994-07-08 Matsushita Electric Works Ltd プリント基板ジャンパー配線方法及びジャンパー配線用射出成形プリント基板
JPH10112471A (ja) * 1996-10-07 1998-04-28 Denso Corp ワイヤボンディング方法
JPH10229100A (ja) * 1997-02-17 1998-08-25 Tokai Rika Co Ltd ワイヤボンディング方法及びプラスティックパッケージの製造方法
JP2000357700A (ja) * 1999-06-14 2000-12-26 Denso Corp ボールボンディング方法および電子部品の接続方法
JP2002280410A (ja) * 2001-03-16 2002-09-27 Kaijo Corp ワイヤボンディング方法
JP2004289069A (ja) * 2003-03-25 2004-10-14 Seiko Epson Corp 配線基板及びその製造方法、半導体装置及びその製造方法、電子デバイス並びに電子機器
JP2004289071A (ja) * 2003-03-25 2004-10-14 Seiko Epson Corp 配線基板及びその製造方法、半導体装置、電子デバイス並びに電子機器
JP2004289070A (ja) * 2003-03-25 2004-10-14 Seiko Epson Corp 配線基板及びその製造方法、半導体装置、電子デバイス並びに電子機器

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4017886A (en) * 1972-10-18 1977-04-12 Hitachi, Ltd. Discrete semiconductor device having polymer resin as insulator and method for making the same
US4246595A (en) * 1977-03-08 1981-01-20 Matsushita Electric Industrial Co., Ltd. Electronics circuit device and method of making the same
JPH0730012A (ja) * 1993-07-09 1995-01-31 Fujitsu Ltd 半導体装置
EP0954208A4 (en) * 1996-12-27 2002-09-11 Matsushita Electric Industrial Co Ltd METHOD AND DEVICE FOR FIXING AN ELECTRONIC COMPONENT ON A CIRCUIT BOARD
EP0903780A3 (en) * 1997-09-19 1999-08-25 Texas Instruments Incorporated Method and apparatus for a wire bonded package for integrated circuits
JPH11312749A (ja) * 1998-02-25 1999-11-09 Fujitsu Ltd 半導体装置及びその製造方法及びリードフレームの製造方法
DE19809081A1 (de) * 1998-03-04 1999-09-16 Bosch Gmbh Robert Verfahren und Kontaktstelle zur Herstellung einer elektrischen Verbindung
JP3679687B2 (ja) * 2000-06-08 2005-08-03 三洋電機株式会社 混成集積回路装置
TW465064B (en) * 2000-12-22 2001-11-21 Advanced Semiconductor Eng Bonding process and the structure thereof
JP3913134B2 (ja) * 2002-08-08 2007-05-09 株式会社カイジョー バンプの形成方法及びバンプ
JP2003007921A (ja) * 2001-06-19 2003-01-10 Sanyo Electric Co Ltd 回路装置およびその製造方法
DE10130602A1 (de) * 2001-06-26 2002-11-21 Siemens Ag Anordnung mit einem Halbleiterchip und einem mit einer Kontaktstelle versehenen Träger sowie einem ein Anschlusspad des Halbleiterchips mit der Kontaktstelle verbindenden Draht und Verfahren zum Herstellen einer solchen Anordnung
DE10137872C1 (de) * 2001-08-02 2003-06-05 Infineon Technologies Ag Drahtbondkontakt
SG117395A1 (en) * 2001-08-29 2005-12-29 Micron Technology Inc Wire bonded microelectronic device assemblies and methods of manufacturing same
TWI312166B (en) * 2001-09-28 2009-07-11 Toppan Printing Co Ltd Multi-layer circuit board, integrated circuit package, and manufacturing method for multi-layer circuit board
JP3573133B2 (ja) * 2002-02-19 2004-10-06 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
KR100427582B1 (ko) * 2002-08-08 2004-04-28 한국전자통신연구원 광도파로 플랫폼 및 그 제조 방법
JP3854232B2 (ja) * 2003-02-17 2006-12-06 株式会社新川 バンプ形成方法及びワイヤボンディング方法
SG148877A1 (en) * 2003-07-22 2009-01-29 Micron Technology Inc Semiconductor substrates including input/output redistribution using wire bonds and anisotropically conductive film, methods of fabrication and assemblies including same

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02112249A (ja) * 1988-10-21 1990-04-24 Hitachi Ltd 半導体装置の組立方法およびそれに用いられるワイヤボンディング装置ならびにこれによって得られる半導体装置
JPH03183139A (ja) * 1989-12-12 1991-08-09 Nippon Steel Corp ワイヤボンディング方法
JPH06188559A (ja) * 1992-12-21 1994-07-08 Matsushita Electric Works Ltd プリント基板ジャンパー配線方法及びジャンパー配線用射出成形プリント基板
JPH10112471A (ja) * 1996-10-07 1998-04-28 Denso Corp ワイヤボンディング方法
JPH10229100A (ja) * 1997-02-17 1998-08-25 Tokai Rika Co Ltd ワイヤボンディング方法及びプラスティックパッケージの製造方法
JP2000357700A (ja) * 1999-06-14 2000-12-26 Denso Corp ボールボンディング方法および電子部品の接続方法
JP2002280410A (ja) * 2001-03-16 2002-09-27 Kaijo Corp ワイヤボンディング方法
JP2004289069A (ja) * 2003-03-25 2004-10-14 Seiko Epson Corp 配線基板及びその製造方法、半導体装置及びその製造方法、電子デバイス並びに電子機器
JP2004289071A (ja) * 2003-03-25 2004-10-14 Seiko Epson Corp 配線基板及びその製造方法、半導体装置、電子デバイス並びに電子機器
JP2004289070A (ja) * 2003-03-25 2004-10-14 Seiko Epson Corp 配線基板及びその製造方法、半導体装置、電子デバイス並びに電子機器

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1860691A4 *

Also Published As

Publication number Publication date
JP4558539B2 (ja) 2010-10-06
EP1860691A1 (en) 2007-11-28
EP1860691A4 (en) 2012-04-18
US20090294158A1 (en) 2009-12-03
JP2006253289A (ja) 2006-09-21

Similar Documents

Publication Publication Date Title
US6548891B2 (en) Semiconductor device and production process thereof
JP3481444B2 (ja) 半導体装置及びその製造方法
US7655504B2 (en) Semiconductor device and method of manufacturing the same
KR100488126B1 (ko) 반도체 장치 및 그 제조 방법
JP3723453B2 (ja) 半導体装置
JP2002359346A (ja) 半導体装置および半導体チップの積層方法
JP2003197673A (ja) 半導体装置およびその製造方法
JP2004221372A (ja) 半導体装置、半導体モジュール、電子機器、半導体装置の製造方法および半導体モジュールの製造方法
JP2004343030A (ja) 配線回路基板とその製造方法とその配線回路基板を備えた回路モジュール
WO2001026147A1 (en) Semiconductor device, method of manufacture thereof, circuit board, and electronic device
JP4558539B2 (ja) 電子回路用基板、電子回路、電子回路用基板の製造方法および電子回路の製造方法
JP4492233B2 (ja) 半導体チップの実装構造および半導体チップの実装方法
JP2002300000A (ja) 弾性表面波装置
US20110147905A1 (en) Semiconductor device and method of manufacturing the same
JP2002305215A (ja) 半導体装置およびこれを用いた積層構造体
CN101533818A (zh) 集成电路元件的封装结构及其制造方法
JP2004363319A (ja) 実装基板及び半導体装置
JP2003152023A (ja) 半導体装置の接続構造とその製造方法
JPH06338539A (ja) 半導体素子の接続方法
JP4754763B2 (ja) 半導体装置
JPH11145188A (ja) 半導体装置及びその製造方法
JPH1145909A (ja) 半導体装置の実装構造
JPH07321150A (ja) 半導体集積回路装置およびその製造方法
JP4575928B2 (ja) 半導体装置
JP2003318356A (ja) 半導体モジュールとその製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2006715442

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: DE

NENP Non-entry into the national phase

Ref country code: RU

WWP Wipo information: published in national office

Ref document number: 2006715442

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 11814847

Country of ref document: US