WO2004088725A3 - Verfahren zum mehrstufigen herstellen von diffusionslötverbindungen für leistungsbauteile mit halbleiterchips - Google Patents

Verfahren zum mehrstufigen herstellen von diffusionslötverbindungen für leistungsbauteile mit halbleiterchips Download PDF

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Publication number
WO2004088725A3
WO2004088725A3 PCT/DE2004/000668 DE2004000668W WO2004088725A3 WO 2004088725 A3 WO2004088725 A3 WO 2004088725A3 DE 2004000668 W DE2004000668 W DE 2004000668W WO 2004088725 A3 WO2004088725 A3 WO 2004088725A3
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WO
WIPO (PCT)
Prior art keywords
semiconductor chips
diffusion
power components
stage production
soldered connections
Prior art date
Application number
PCT/DE2004/000668
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English (en)
French (fr)
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WO2004088725A2 (de
Inventor
Edmund Riedl
Original Assignee
Infineon Technologies Ag
Edmund Riedl
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Filing date
Publication date
Application filed by Infineon Technologies Ag, Edmund Riedl filed Critical Infineon Technologies Ag
Priority to US10/551,745 priority Critical patent/US7851910B2/en
Publication of WO2004088725A2 publication Critical patent/WO2004088725A2/de
Publication of WO2004088725A3 publication Critical patent/WO2004088725A3/de

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00—Soldering, e.g. brazing, or unsoldering
    • B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
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    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/001—Interlayers, transition pieces for metallurgical bonding of workpieces
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12528—Semiconductor component

Abstract

Die Erfindung betrifft ein Verfahren zum mehrstufigen Herstellen von Diffusionslötverbindungen (16, 17) für Leistungsbauteile mit Halbleiterchips, wobei die Schmelztemperaturen von Diffusionslöt-Legierungen (14, 15) und Diffusionslötverbindungen (16, 17) derart gestaffelt werden, dass eine erste Schmelztemperatur der ersten Diffusionslöt-Legierung (14) niedrigere ist als eine zweite Schmelztemperatur der zweiten Diffusionslöt-Legierung (15) und wobei die zweite Schmelztemperatur niedriger ist als eine dritte Schmelztemperatur einer ersten Diffusionslötverbindung (16) der ersten Diffusionslöt-Legierung (14).
PCT/DE2004/000668 2003-04-01 2004-03-31 Verfahren zum mehrstufigen herstellen von diffusionslötverbindungen für leistungsbauteile mit halbleiterchips WO2004088725A2 (de)

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US10/551,745 US7851910B2 (en) 2003-04-01 2004-03-31 Diffusion soldered semiconductor device

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DE10314876A DE10314876B4 (de) 2003-04-01 2003-04-01 Verfahren zum mehrstufigen Herstellen von Diffusionslötverbindungen und seine Verwendung für Leistungsbauteile mit Halbleiterchips
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DE10314876A1 (de) 2004-11-04
US7851910B2 (en) 2010-12-14
DE10314876B4 (de) 2008-02-14
US20080014460A1 (en) 2008-01-17
WO2004088725A2 (de) 2004-10-14

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