Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/67005—Apparatus not specifically provided for elsewhere
  • H01L21/67242—Apparatus for monitoring, sorting or marking
  • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
  • H01J37/32082—Radio frequency generated discharge
  • H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32917—Plasma diagnostics
  • H01J37/32935—Monitoring and controlling tubes by information coming from the object and/or discharge
  • H01J37/32963—End-point detection
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
  • H01L21/3065—Plasma etching; Reactive-ion etching
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/67005—Apparatus not specifically provided for elsewhere
  • H01L21/67011—Apparatus for manufacture or treatment
  • H01L21/67017—Apparatus for fluid treatment
  • H01L21/67063—Apparatus for fluid treatment for etching
  • H01L21/67069—Apparatus for fluid treatment for etching for drying etching

Definitions

• the present invention relates generally to apparatus and methods for etching features as part of semiconductor device fabrication processes, and more particularly to an optically controlled method and apparatus allowing accurate control of the depth of a feature being etched.
• a common step in the fabrication of semiconductor devices is etching a feature into a layer of a wafer.
• the depth of the feature can often be a critical factor in the correct operation or failure of the device or otherwise a key manufacturing specification.
• etch stop layer in the wafer prior to etching.
• the presence of an etch stop layer provides a way to prevent the feature from being etched deeper than the etch stop layer, but requires a more complicated wafer structure to start with and is therefore complex and costly.
• an etch stop layer cannot be used as it would interfere with the correct operation of the device. Further, it can be necessary to etch into a wafer substrate which does not include an etch stop layer.
• optical emission spectroscopy can be used to determine when a layer of polycrystalline silicon has been etched through. The emission spectrum changes when the gate oxide layer is exposed and begins to etch and so the gate oxide layer can be detected. However, again this requires the presence of a special layer effectively acting as an etch stop indicator in the wafer. Further some etching of the gate oxide layer needs to occur in order to generate the change in the emission spectrum and so the depth of the etch through the polysilicon layer cannot be carefully controlled.
• etch depth control Another method which does not provide sufficiently accurate etch depth control is the use of interferometry based techniques.
• a single step etch is used to etch the feature and an interferometric end point (IEP) device is used to measure the relative change in depth of the feature that has been etched into the wafer.
• IEP interferometric end point
• the etching is stopped.
• high etch rate processes cannot stop etching immediately and in a reproducible manner and so there tends to be a significant variation in the actual depth etched.
• the lack of control of etch depth and lack of reproducibility can lead to device failure or to failure to meet manufacturing specifications or to wafer-to-wafer variations that do not meet device designers requirements.
• a method for etching a feature to a desired depth in a wafer includes etching the feature at a first etching rate.
• the feature is then etched at a second etching rate, which is slower than the first etching rate.
• the etching depth is optically determined and etching is stopped so that the feature has the desired depth.
• Using two different etching rates provides high throughput with good depth control.
• Using a second etching rate slower than the first etching rate facilitates improved optical end point resolution.
• the invention provides a method for etching a trench in a silicon layer of a wafer.
• the method includes etching at a first etch rate and then etching at a second etch rate slower than the first etch rate.
• the current etch depth is optically determined and etching is stopped so that the trench depth reaches a desired end point.
• the invention provides apparatus for etching a feature in a wafer.
• the apparatus includes an etching tool including a chuck for holding the wafer.
• An optical end point device is provided and positioned to measure the etch depth.
• An electronic controller communicates with the optical end point device and the etching tool. The controller controls the tool to reduce the etch rate part way through etching the feature and to stop the etching tool, so that the feature is etched to the desired depth.
• Figure 1 is a schematic cross sectional view of etching apparatus according to an aspect of the invention.
• Figure 2 is a schematic cross sectional view of a wafer having a trench etched in it according and illustrating the etching method of the invention
• Figure 3 shows a flow chart illustrating the etching method of the invention
• Figure 4 is a schematic cross sectional view of another embodiment of etching apparatus according to an aspect of the invention.
• the present invention relates to methods and apparatus for controlling the depth of a feature etched in a wafer during fabrication of a semiconductor device.
• FIG. 1 is a schematic view of a plasma processing system 100, including a plasma processing tool 101.
• the plasma processing tool 101 is an inductively coupled plasma etching tool and includes a plasma reactor 102 having a plasma processing chamber 104 therein.
• a transformer coupled power (TCP) controller 150 and a bias power controller 155 respectively control a TCP power supply 151 and a bias power supply 156 influencing the plasma 124 created within plasma chamber 104.
• TCP transformer coupled power
• bias power controller 155 respectively control a TCP power supply 151 and a bias power supply 156 influencing the plasma 124 created within plasma chamber 104.
• the TCP power controller 150 sets a set point for TCP power supply 151 configured to supply a radio frequency signal at 13.56MHz, tuned by a TCP match network 152, to a TCP coil 153 located near the plasma chamber 104.
• An RF transparent window 154 is provided to separate TCP coil 153 from plasma chamber 104 while allowing energy to pass from TCP coil 153 to plasma chamber 102.
• An optically transparent window 165 is provided by a circular piece of sapphire having a diameter of approximately 2.5 cm (1 inch) located in an aperture in the RF transparent windowl54.
• the bias power controller 155 sets a set point for bias power supply 156 configured to supply an RF signal, tuned by bias match network 157, to a chuck electrode 108 located within the plasma chamber 104 creating a direct current (DC) bias above electrode 108 which is adapted to receive a substrate 106, such as a semi- conductor wafer workpiece, being processed
• a direct current (DC) bias above electrode 108 which is adapted to receive a substrate 106, such as a semi- conductor wafer workpiece, being processed
• a gas supply mechanism or gas source 110 includes a source or sources of etchant gas or gases 116 attached via a gas manifold 117 to supply the proper chemistry required for the etching process to the interior of the plasma chamber 104.
• a gas exhaust mechanism 118 includes a pressure control valve 119 and exhaust pump 120 and removes particles from within the plasma chamber 104 and maintains a particular pressure within plasma chamber 104.
• a temperature controller 180 controls the temperature of heaters 182 provided within the chuck 108 by controlling a heater power supply 184.
• substrate etching is achieved by exposing substrate 106 to inonized gas compounds (plasma) under vacuum.
• the etching process starts when the gases are conveyed into plasma chamber 104.
• RF power delivered by TCP coil 153 and tuned by TCP matching network 110 ionizes the gases.
• the power delivered by electrode 108 induces a DC bias on substrate 106 to control the direction and energy of ion bombardment of substrate 106.
• the plasma reacts chemically with the surface of the substrate 106 to remove material not covered by a photoresistive mask.
• a suitable plasma processing tool would be the 2300 Versys Silicon Etch System, as provided by Lam Research Corporation of Fremont, California.
• the etching system includes a single wavelength interferometric end point device 160 located external to the plasma processing chamber 104.
• Optical access to the plasma processing chamber is provided by window 165 comprising a sapphire insert, approximately 2.5cm (one inch) in diameter, in an aperture in the RF transparent window 154.
• the end point device 160 is positioned adjacent to the window 165 and is positioned so as to be able to measure the depth of features etched into the wafer 106 in a direction substantially perpendicular to the plane of the wafer.
• the end point device 160 generates and transmits a substantially single wavelength, or narrow band (bandwidth 10nm), of light which is reflected from the wafer surface and monitored in real time during an etch process as will be described in greater detail below.
• the end point device 160 is provided as an integrated part of the plasma processing chamber 104 or etching tool 101.
• the etching system 100 also includes electronic control circuitry 170 in communication with the end point device 160 and the etching tool 101.
• the electronic control circuitry includes electrical and optical devices to process the optical signals from the end point device to provide electrical signals indicating the current depth of an etched feature and also electrical signals to control the operation of the etching tool.
• the electronic control circuitry 170 can be in the form of a suitably programmed general purpose digital computer. The electronic control circuitry 170 constantly monitors the relative change in depth of a feature being etched in the wafer and can control the etching operation of the etching tool according to the etching method described below.
• a broadband (spectral range approximately 190-lOOOnm) reflectometry based technique and device are used to optically determine the end point of an etch process, instead of the single narrow wavelength band technique and device referred to above.
• the broadband measuring device and technique can provide an absolute measure of feature depths.
• the technique involves using a deterministic approach to parametrically estimate feature depths by matching modeled and measured broadband spectra at any instant in time.
• a suitable broadband reflectometry technique is described in U.S. Provisional Patent Application Serial No. 60/403,213 filed on August 13, 2002, entitled "Endpoint Strategies for in situ Control of Recess and Deep Trench Etch Processes" in the names of Vijaykumar C Venugopal and Andrew J Perry and U.S.
• FIG. 4 shows a schematic cross sectional drawing of an etching system 400 similar to that shown in figure 1, but including the broadband end point measuring device 460.
• Broadband end point measuring device 460 includes a source 461 of broadband radiation, connected by a length of UV grade optical fiber 462 to a collimator 464 adjacent the sapphire window 465.
• the collimator 464 is connected by another length of UV grade optical fiber 466 to a 190-lOOOnm spectrograph 468 which is connected to control circuitry 470.
• Control circuitry 470 is adapted to process signals from the broadband end point 460 device and determine the etch depth in this embodiment.
• the etching tool 101 is controlled to strike and sustain a plasma 124 in the plasma chamber 104 which is used to etch the desired feature in the wafer 106.
• the etching method will now be described with particular reference to figures 2 and 3.
• Figure 2 shows a schematic cross section of a part of a wafer 200 etched according to the method and figure 3 shows a flow chart 300 illustrating the etching method.
• An embodiment of the method will be described with reference to etching a trench in a silicon substrate layer of a wafer as part of a shallow trench isolation (STI) process.
• Figure 2 shows the wafer 200 after the etching process has been carried out.
• STI shallow trench isolation
• the wafer includes a crystalline silicon substrate layer 202, a pad oxide layer 204 and a silicon nitride hard mask layer 206 which has previously been patterned to define the location of the trench feature 210 to be etched.
• a first high etch rate etch of the trench is carried out 304.
• a high etch rate can be considered to be an etch rate greater than approximately 4000A/min.
• An etch rate of approximately 5000 to 8000 A/min can be used for the first fast etch 304.
• the depth of the feature being etched is monitored 306 to determine whether the feature has reached a first depth 212 a substantial way toward the target end point depth 214 desired for the feature.
• the first depth 212 can be more than approximately 65% of the end point depth 214, preferably more than approximately 70% of the end depth and more preferably more than approximately 80% of the end depth.
• the first depth 212 can be in the range of approximately 65 to 85% of the end point depth 214, and more can be in the range of approximately 80 to 85% of the end point depth 214.
• the high etch rate etch can be carried out using the following operating conditions and recipe: a plasma pressure in the range of approximately 10 to 70mT, a TCP power in the range of approximately 500 to 1400W, a bottom electrode bias in the range of approximately 0 to 800W and an etchant gas composition including Ar, Cl , HBr, CF 4 , O , SF 6 and He. Any suitable etchant gas mixture and etching tool operating parameters can be used which provides the required high etch rate etch of the feature in the wafer 200.
• the progress of the etch is monitored 306 in situ by the optical end point device 160 and control circuitry 170 and the first high rate etch 304 is continued 307, until it is determined 306 that the current trench depth has reached the first depth 212.
• the high etch rate process provides a good profile to the bottom of the trench 216 including a smooth rounded bottom surface. This is advantageous as it helps to avoid the formation of voids when the trench is filled with an oxide material and so helps to ob
• a second, slower etch is then carried out 308 which has a lower etch rate than the first etch.
• An etch rate of less than approximately 3000 A/min can be considered slow for an STI process.
• the rate of the second etch step is selected so that it substantially preserves the smooth and rounded profile of the trench bottom so that the completed trench has the desired profile.
• the etching tool is controlled to reduce the etching rate so that the trench is etched to the desired end point depth 214 at a slower rate. This can be achieved by changing the composition of the etchant gas such that HBr is used as the source of etchant species and changing the operating parameters of the etching tool, although other methods can be used to provide the desired slow etching rate.
• etching gas composition and etching tool operating parameters can be used to provide an etch rate of approximately 1000-3 OOOA min: a plasma pressure in the range of approximately 10 to 80mT, a TCP power in the range of approximately 200 to 1200W, a bottom electrode bias in the range of approximately 0 to 500W and an etchant gas composition including Ar, Cl 2 , HBr, CF 4 , O 2 . SF 6 and He.
• etchant gas composition including Ar, Cl 2 , HBr, CF 4 , O 2 . SF 6 and He.
• Carrying out a slower trench depth landing 308 means that greater resolution can be provided by the optical end point measuring device and more time is available in which to control the etching tool so as to stop the etch at an appropriate time so that the trench depth is correct. So the accuracy of measurement of the depth of the trench is improved.
• the etching tool is controlled to stop etching 312 the trench.
• the etching process then ends 314 and provides an etched trench with the desired depth 214 and also having the desired profile and with a high throughput rate, as the bulk of the etching has been carried out at a high etch rate.
• Etching can be stopped 312 either when the measured depth corresponds to the desired feature depth 214, or alternatively, before the measured depth reaches the desired feature depth, for example if there is some 'overshoot' in the etching process.
• the latter embodiment can be used where it is not possible to instantaneously stop etching, hi that case, this is compensated for by controlling the etching tool to stop etching before the desired depth is actually reached so that the trench actually lands at the desired depth rather than overshooting the desired depth.
• the variations in end point triggering time, plasma ignition, RF ramping and match tuning from wafer to wafer can be sufficient to put the wafers outside of the acceptable range of reproducibility.
• the invention not only improves the resolution and therefore accuracy with which the end point can be determined, but also improves the reproducibility of the process from wafer to wafer as any variations in the total process time caused by lags or variations in the etching tool will not create as large a variation in the trench depth owing to the slow etching rate up to the end point. Further, a slow etch rate may not provide the desired trench profile properties.
• the combination of high and low etch rate means that a high manufacturing throughput rate of wafers with high reproducibility can be provided.
• the depth of the trench is monitored constantly as this technique can only measure the depth relative to a starting position (e.g. the wafer surface prior to starting the etch).
• the method can include using the current measured depth of the trench to determine when to change to the slower etch rate and can control the etching tool to automatically change the etch rate.
• the first high rate etch can be carried out for a fixed period of time after which the etch rate is decreased and the depth of the trench is measured to ensure landing at the desired depth.
• the method is not limited to the use of two different etch rates only.
• three or more different etch rates could be used with a corresponding number of cross over depths.
• the cross over between etching rates need not be instantaneous (step change) and can be a gradual (continuous) change in the etch rate, so that the etch rate change occurs over a region rather than at a specific depth.
• a recess process is typically used in the fabrication of memory cell devices.
• a trench is etched in a layer of silicon and a collar of dielectric material is fabricated around the top of the trench.
• the trench is filled with an amount of polysilicon which overlaps an amount of the dielectric collar so as to provide a capacitive device having a desired capacitance.
• variations in the trench depth would change the amount of polysilicon overlapping the dielectric collar and therefore the capacitance. Therefore careful silicon trench depth control is an important aspect of fabricating such devices.
• etch rates will depend on the context of the depth of the feature being etched. If a 5% variation is depth is an acceptable reproducibility metric, then 5% of a very deep feature is a greater distance than 5% of a very shallow feature, and so can be etched correspondingly more quickly.
• a typical trench depth can be in the range of approximately 2,000 to 5,OO ⁇ A, in which case a high etch rate can be approximately 400 ⁇ A/min and higher and a low etch rate can be 3000A/min and lower.
• trench depths of 100,000 to 150,OO ⁇ A can be required.
• high etch rates can be 10,000A/min and higher and low etch rates can be 5,000A/min and lower.
• the ratio of etch rates (high:low) can be greater than 1.3:1, preferably greater than 1.5:1, more preferably greater than 2.5:1 and most preferably greater than 3.5:1,
• the etch rate ratio (high:low) can be in the range from about 1.5:1 to 2.5:1, preferably from about 2.5:1 to 3.5:1 and more preferably about 3.5:1 to 10:1.
• the present invention can be used in the etching of various features, and not just trenches, and in various fabrication processes to provide improved etch depth control and wafer to wafer reproducibility.

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• 2002
  • 2002-09-25 US US10/256,251 patent/US6939811B2/en not_active Expired - Lifetime
• 2003
  • 2003-09-18 WO PCT/US2003/030117 patent/WO2004030050A2/en not_active Ceased
  • 2003-09-18 EP EP03759493A patent/EP1543547B1/en not_active Expired - Lifetime
  • 2003-09-18 AU AU2003275221A patent/AU2003275221A1/en not_active Abandoned
  • 2003-09-18 CN CNB038253666A patent/CN100449706C/zh not_active Expired - Lifetime
  • 2003-09-18 DE DE60336150T patent/DE60336150D1/de not_active Expired - Lifetime
  • 2003-09-18 AT AT03759493T patent/ATE499701T1/de not_active IP Right Cessation
  • 2003-09-18 KR KR1020057005131A patent/KR101116589B1/ko not_active Expired - Fee Related
  • 2003-09-18 JP JP2004539866A patent/JP2006500781A/ja active Pending
  • 2003-09-23 TW TW092126217A patent/TWI324356B/zh not_active IP Right Cessation

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