WO2003023866A1 - Dispositif a semi-conducteur a film mince et son procede de fabrication - Google Patents
Dispositif a semi-conducteur a film mince et son procede de fabrication Download PDFInfo
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- WO2003023866A1 WO2003023866A1 PCT/JP2002/009090 JP0209090W WO03023866A1 WO 2003023866 A1 WO2003023866 A1 WO 2003023866A1 JP 0209090 W JP0209090 W JP 0209090W WO 03023866 A1 WO03023866 A1 WO 03023866A1
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- layer
- semiconductor
- thin film
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- film
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 229
- 239000010409 thin film Substances 0.000 title claims abstract description 152
- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000013078 crystal Substances 0.000 claims abstract description 156
- 239000010408 film Substances 0.000 claims abstract description 112
- 239000000758 substrate Substances 0.000 claims abstract description 58
- 239000001301 oxygen Substances 0.000 claims abstract description 45
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 45
- -1 oxygen ions Chemical class 0.000 claims abstract description 21
- 239000011810 insulating material Substances 0.000 claims abstract description 16
- 239000010410 layer Substances 0.000 claims description 202
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 27
- 238000004519 manufacturing process Methods 0.000 claims description 25
- 238000002513 implantation Methods 0.000 claims description 15
- 238000009826 distribution Methods 0.000 claims description 14
- 238000002425 crystallisation Methods 0.000 claims description 13
- 230000008025 crystallization Effects 0.000 claims description 13
- 230000001678 irradiating effect Effects 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 9
- 239000002245 particle Substances 0.000 claims description 8
- 238000007254 oxidation reaction Methods 0.000 claims description 7
- 230000003647 oxidation Effects 0.000 claims description 6
- 238000001953 recrystallisation Methods 0.000 claims description 6
- 230000001590 oxidative effect Effects 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 3
- 239000002344 surface layer Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 abstract description 8
- 238000009413 insulation Methods 0.000 abstract description 3
- 239000002585 base Substances 0.000 description 14
- 230000037230 mobility Effects 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 239000011521 glass Substances 0.000 description 11
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000000463 material Substances 0.000 description 9
- 230000008018 melting Effects 0.000 description 9
- 238000002844 melting Methods 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 229910052814 silicon oxide Inorganic materials 0.000 description 9
- 238000005468 ion implantation Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 239000013081 microcrystal Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 230000010363 phase shift Effects 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 238000001803 electron scattering Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 125000004430 oxygen atom Chemical group O* 0.000 description 2
- 238000009751 slip forming Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910001148 Al-Li alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000002484 cyclic voltammetry Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000029052 metamorphosis Effects 0.000 description 1
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 229920006255 plastic film Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
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Definitions
- a thin-film semiconductor device or thin-film transistor is a substrate in which a thin-film layer of a semiconductor material typified by silicon is formed on a base layer made of an insulator such as non-Alkaline glass or quartz glass.
- TFT thin-film transistor
- the gate insulating film between the gate electrode and the channel region that compose the TFT circuit on the glass substrate is usually formed of a silicon oxide film, which is required to be formed at a low temperature. You. For this reason, the thermal oxide film formation technology (oxidation temperature of 900 ° C or higher) used in the LSI process using silicon wafer cannot be used, and low-temperature deposition (600 ° C or lower) using the plasma CVD method cannot be used. Therefore, an oxide film must be formed.
- plasma-enhanced deposition oxides have lower insulation and reliability than high-temperature thermal oxides.
- impurities remain between the channel region forming the TFT circuit and the gate insulating film, and the formed silicon oxide film is stoichiometric. Is formed by the combination of SiO 2 in various forms It not, for example, tend inconsistent form such as Siol 9.
- Such defects cause variations in the operating threshold of the TFT when the oxide film is used as a gate insulating film and make it difficult to stabilize the TFT characteristics for a long time. For example, the variation in the TFT operation threshold of such conventional products was about ⁇ 0.4 V, and the change in the threshold over time was large.
- the problems caused by the small grain size of the crystal grains and the irregular arrangement of the crystal grains were unavoidable.
- the polycrystalline silicon film is composed of a large number of crystal grains having extremely small grain sizes, the mobility of the mobility is reduced due to the scattering of electrons and holes due to crystal grain boundaries during TFT operation. There are limits to improvement. .
- a semiconductor substrate having a semiconductor thin film layer having a high mobility by increasing the crystal grain size of polycrystalline silicon.
- a polycrystalline silicon film is heated in a high-temperature furnace to have a large grain size, thereby forming a thin film layer having an average grain size of about 1 m and a mobility of about 100 cm 2 / V'sec.
- a high-temperature treatment of 1000 ° C or more is required, so that quartz glass, which can withstand high temperatures but is expensive, must be used as an insulating base material. Large-area devices have the disadvantage that they are difficult to use.
- the amorphous silicon film or the polycrystalline silicon film is irradiated with excimer or laser light to melt and recrystallize the silicon to obtain a crystal grain size. Attempts have been made to increase this, and it has been put into practical use. According to this method, since the semiconductor film is locally melted in a short time and recrystallized, it is possible to increase the single crystal grain size while using an inexpensive glass substrate as a base layer.
- the crystal grain size obtained is at most about the same, and the particle size is not uniform.
- the particle size is defined as (major axis + minor axis) ⁇ 2 of the single crystal grain, and the measurement was performed by Secco etching to etch the area other than the single crystal silicon region. It can be obtained by observing the remaining single crystal grains after SEM observation.
- TFTs used in commercially available polycrystalline silicon semiconductor circuits are manufactured to include at least several crystal grain boundaries as shown in Fig. 7 in order to reduce mobility variations. .
- the average mobilities in this case was not only to at most 150 Ji m 2 / V- sec.
- An object of the present invention is to provide a gate insulating film in which a semiconductor thin film and a gate insulating film constituting a unit electric circuit have a continuous chemical bond via an interface and are stoichiometrically converted into SiO 2 .
- An object of the present invention is to provide a thin film semiconductor device and a substrate thereof, and a method for manufacturing the same.
- An object of the present invention is to provide a semiconductor device, a substrate capable of realizing the same, and a method for manufacturing such a device or substrate.
- the inventors of the present invention provide a semiconductor thin film device substrate in which a semiconductor thin film layer is formed on a base layer of non-alkali glass or the like, and a part of the semiconductor thin film in the thickness direction is converted and formed as an oxide thin film layer.
- a thin-film semiconductor device substrate includes a base layer made of an insulating material and a thin-film semiconductor layer formed on the base layer, wherein the thin-film semiconductor layer is formed of an amorphous semiconductor layer or a polycrystalline semiconductor layer.
- a semiconductor crystal grain layer formed by crystallization or recrystallization, and an oxide film layer formed by oxidation of an amorphous semiconductor layer or a polycrystalline semiconductor layer.
- the semiconductor device is characterized in that semiconductor single crystal grains are formed and arranged in a regular alignment mode.
- a thin-film semiconductor device includes a base layer made of an insulating material and a thin-film semiconductor layer formed on the base layer.
- the thin-film semiconductor layer includes a semiconductor crystal grain layer and an oxidized non-single-crystal semiconductor layer.
- the oxide film layer is formed as an insulating film of a gate electrode; or further, the semiconductor crystal grain layer has regular semiconductor single crystal grains. It is characterized by being arranged in a target alignment manner.
- the method for manufacturing a thin film semiconductor device substrate according to the present invention includes forming a non-single-crystal semiconductor layer on a base layer made of an insulating material, and irradiating the non-single-crystal semiconductor layer with a line of energy to crystallize or convert the non-single-crystal semiconductor.
- the method for manufacturing a thin film semiconductor device comprises the steps of: depositing a non-single-crystal semiconductor thin film on an insulating base layer; and implanting oxygen ions into the non-single-crystal semiconductor thin film. Forming an oxygen-implanted region in the non-single-crystal semiconductor thin film by irradiating the non-single-crystal semiconductor thin film with an energy ray having a predetermined energy intensity.
- the thin film semiconductor device substrate of the present invention has an oxide film layer formed by oxidizing an amorphous semiconductor layer or a polycrystalline semiconductor layer, when manufacturing a thin film semiconductor device using this substrate, By using the film layer as a gate electrode insulating film of a thin film semiconductor device, it is possible to manufacture the thin film semiconductor device of the present invention, which has a small variation in operation threshold value and can exhibit stable operation for a long time.
- each single crystal grain is Since the gate electrode, the source region, and the drain region can be formed and arranged, the above characteristics, that is, the operation threshold It is possible to manufacture the thin-film semiconductor device of the present invention, which has characteristics that it has little fluctuation and can exhibit stable operation for a long period of time, and that has a large mobility and few problems due to electron scattering and the like.
- the method of manufacturing a thin film semiconductor device substrate according to the present invention includes the steps of: implanting oxygen ions into a thin film semiconductor layer deposited on a substrate made of an insulator material; and irradiating the implanted region with a line of energy.
- a semiconductor thin film device substrate in which an oxide film layer is formed in a semiconductor layer can be used.
- the oxide film layer in the substrate is thinned.
- irradiation is performed in a distribution mode in which a region where the irradiation energy beam intensity is a maximum value and a region where the irradiation energy beam intensity is a minimum value are two-dimensionally arranged.
- FIG. 1 is a schematic view showing one example of a manufacturing process of a thin film semiconductor device of the present invention.
- FIG. 2 is a schematic view showing another example of the manufacturing process of the thin film semiconductor device of the present invention.
- FIG. 3 shows the energy ray intensity at the time of energy ray irradiation in the present invention. It is a schematic diagram which shows an example of a two-dimensional distribution state.
- FIG. 4 is a schematic diagram showing an example of a profile of an intensity change state between the maximum value and the minimum value of the irradiation energy beam intensity at the time of energy beam irradiation in the present invention.
- FIG. 5 is a schematic diagram showing an example of a single crystal grain growth process and an alignment state in a thin film semiconductor layer after irradiation with energy rays according to the method of the present invention.
- FIG. 6 is a schematic diagram showing an example of the correspondence between crystal grains and electrode arrangement states in the thin-film semiconductor device of the present invention.
- FIG. 7 is a schematic diagram showing an example of a correspondence relationship between single crystal grains and electrode arrangement states in a conventional thin film semiconductor device using a polycrystalline thin film semiconductor.
- BEST MODE FOR CARRYING OUT THE INVENTION In the thin film semiconductor device of the present invention, a glass substrate having a strain point of 700 ° C. or lower is preferably used as an insulating material base layer of the thin film semiconductor substrate, but is not limited to glass.
- various transparent or opaque plates made of an insulating material for example, ceramics or a plastic film having appropriate heat resistance can be used.
- an insulating oxide film covers the surface of the single-crystal film, or is embedded in an intermediate region of the single-crystal film, thereby forming a semiconductor single-crystal thin film.
- a thin film layer of a non-single-crystal semiconductor is deposited on the base layer, and oxygen sufficient to form an insulating oxide film layer is ion-implanted therein, and a high-quality film is formed by excimer laser or other energy beam irradiation method described later. This is realized by using a semiconductor thin film composed of an oxide film and single crystal grains having a large grain size.
- non-single-crystal semiconductor an amorphous semiconductor may be used, or a polycrystalline semiconductor in which a single crystal having a fine grain size is already formed, oxygen ion implantation is performed on the semiconductor, and recrystallization is performed.
- the semiconductor thin film layer of the invention may be formed.
- the thickness of the non-single-crystal semiconductor thin film is desirably 30 to 300 mn, preferably 30 to 200 nm.
- This layer functions to prevent diffusion of impurities from the base layer material (eg, glass), and controls the heat distribution of the semiconductor layer in the irradiation crystallization step to control the orientation of the crystal to be crystallized and the crystallization start position. It has a control function, and its film thickness is desirably 20 to 100 nm, particularly 200 to 300 nm.
- a second thermal control / crystal control layer on the amorphous semiconductor layer.
- This layer also has a function of controlling the heat distribution of the semiconductor layer in the irradiation crystallization step and controlling the orientation of the crystal to be crystallized and the crystallization start position, similarly to the first heat conduction and crystallization control layer. It is desirable that the film thickness be 50 to 5000 nm, particularly 100 to 300 nm.
- the thin film single crystal semiconductor layer is formed to be interposed between the two control layers.
- a control layer material is deposited in a thin film on the insulating material base layer, a thin film non-single-crystal semiconductor material is deposited thereon, followed by oxygen ion implantation, and a second control layer is further formed thereon.
- the non-single-crystal semiconductor layer becomes a single-crystal grain layer.
- FIG. 1 are schematic diagrams showing one aspect of each stage from the state where various thin films are deposited on the base layer as described above to the time when a thin film semiconductor device is formed.
- oxygen ions are implanted into the surface region of the non-single-crystal semiconductor layer.
- a first heat conduction / crystal control layer 20 is deposited on a glass substrate 10, and a non-single-crystal semiconductor layer 30 is deposited thereon.
- oxygen ions are implanted into the specific region, and an oxygen implanted region 33 is formed near the surface.
- the oxygen in (b) is The oxide film layer 40 whose implantation region has been subjected to high thermal oxidation by energy rays, the single crystal semiconductor layer 50 that has undergone single crystallization by energy lines, and the non-single crystal semiconductor layer 30 that has not undergone high thermal oxidation or single crystallization. Metamorphosis.
- (C) is a schematic cross-sectional view of one oxide film layer single crystal region. By forming a large number of such single crystals, the thin film semiconductor substrate of the present invention can be obtained. .
- an electrode wiring film mainly made of aluminum (A1) is deposited.
- A1 aluminum
- FIG. 2 are schematic diagrams showing one embodiment in which the implantation of oxygen ions in the step (b) is performed in the intermediate layer region of the non-single-crystal semiconductor layer.
- the deposition of the first heat conduction / crystal layer 20 and the non-single-crystal semiconductor layer in the step (a) is performed in the same manner as in the embodiment of FIG.
- the implantation is performed on the intermediate layer of the non-single-crystal semiconductor layer. Therefore, the oxygen implantation region 33 is formed in the intermediate region having the thickness of the non-single-crystal semiconductor layer. Thereafter, the oxygen implantation region 33 is transformed into an oxide film layer by the irradiation of the energy beam in the step (c), and the non-single-crystal semiconductor layers in the region above and below the oxygen-implanted region 33 are both transformed into single-crystal semiconductor layers. You. Next, as shown in (d), the upper single-crystal semiconductor layer is subjected to the patterning and a part thereof is formed on the gate electrode. The operation of the process (e) is shown in Fig. 1. This is the same as in the embodiment.
- the implantation amount (dose amount) and implantation depth (Rp) of oxygen ions in the step (b) are determined according to the thickness and the position of the insulating oxide film to be formed.
- the means for irradiating the thin-film semiconductor substrate with a single line of energy is not limited to, for example, excimer laser beams.
- continuous oscillation argon laser beams may be used. It may be pulsed or scanned at high speed.
- the irradiation is performed in an energy intensity distribution mode in which the energy intensity maximum points and the energy intensity minimum points are regularly arranged. For example, as shown in Fig. 3 and Fig. 4, within a rectangular area of 5mni x 5mm, the irradiation energy changes at the maximum (Emax) ⁇ minimum (Emin) ⁇ maximum (Emax) at intervals of 10m. Irradiation may be performed in an intensity distribution mode that repeats two-dimensionally (in both x and y directions), and then irradiation may be performed by moving the irradiation position every 5 mm.
- the irradiation may be performed by moving the rectangular area regularly at an arbitrary pitch in the x and y directions.
- the change in the irradiation energy intensity as described above can be achieved by causing a change in the irradiation energy intensity distribution using, for example, a phase shift mask, and as shown in FIG. 4, the change between the maximum value and the minimum value is obtained. It is desirable that the change is substantially continuous.
- the maximum and minimum values are determined by the thickness of the non-single-crystal semiconductor layer, the thickness and thermal conductivity of the first and second control layers, and the ion implantation. It may be adjusted based on the amount of oxygen and its depth.
- the minimum energy intensity is the intensity that provides a thin-film temperature that does not melt the thin-film semiconductor within the irradiation time
- the maximum energy intensity is the intensity that provides sufficient thin-film temperature to melt the thin-film semiconductor within the irradiation time.
- the shape of the irradiation unit is not limited to a 5 mm X 5 mm square as described above, but may be various polygons, as well as the maximum and minimum values of the irradiation energy and the melting point.
- the arrangement shape of the thresholds is not limited to a square lattice, but may be, for example, a delta lattice.
- the portion of the irradiation region where the irradiation energy has the minimum value (the region equal to or lower than the melting threshold (Emth)) is not completely melted.
- semiconductor microcrystals are generated near the melting threshold. Using one of these microcrystals as a crystal nucleus, single crystallization of a semiconductor thin film and growth of an insulating oxide film progress horizontally from this crystal nucleus toward the maximum value of the energy intensity (the direction of the arrow in FIG. 5). ).
- semiconductor microcrystals are formed, and two ion-implanted oxygen atoms and one silicon atom are chemically bonded to each other, so that formation of a SiO 2 layer starts.
- This layer also grows in the horizontal direction as the crystallization of the molten silicon progresses.
- the maximum grain size of the single crystal can be adjusted by adjusting the maximum value interval of the irradiation energy, and the semiconductor oxide layer of an arbitrary thickness can be adjusted by changing the ion implantation oxygen amount or the implantation position. It can be formed on a surface or inside a semiconductor film.
- the thin-film semiconductor device substrate thus obtained is aligned, for example, for each single crystal grain, using an insulating oxide film as a gut oxide film, and using an electrode forming material, for example, molybdenum-tungsten alloy (MoW).
- an electrode forming material for example, molybdenum-tungsten alloy (MoW).
- MoW molybdenum-tungsten alloy
- the gate electrode is formed by depositing it to a thickness (for example, 300 nm) and patterning it into a predetermined shape. After each of the source region and the drain region is formed using the gate electrode as a mask, an interlayer insulating film that surrounds and covers the gate electrode with an insulating material (for example, silicon oxide) is formed.
- an electrode material for example, aluminum-yume
- An electrode is formed, whereby, for example, as shown in FIG. 6, one unit of an electric circuit is regularly arranged for each of the single crystal grains arranged regularly, thereby forming a conventional polycrystal.
- a thin film semiconductor device having a mobility exceeding that of a semiconductor device using a semiconductor thin film substrate, for example, 300 cm 2 / V ⁇ sec or more can be obtained.
- a non-single-crystal semiconductor layer is implanted with oxygen, and an oxide film formed by oxidization due to high heat of energy beam irradiation is used as a gate insulating film. Threshold voltage of semiconductor device after
- the variation of the threshold voltage can be reduced to 0.4 or less.
- the long-term stability of the threshold value due to contamination of the gate insulating film-channel interface is significantly improved, and the Vth shift amount after 10,000 hours of real-time operation can be reduced to 0.05 V or less.
- this insulating oxide layer has been subjected to a high-temperature oxide film forming process, which is a once melting step, so that it is as dense as a silicon thermal oxide film.
- a high-temperature oxide film forming process which is a once melting step
- the characteristics of the flat band voltage (Vfb) obtained from the leak current and CV measurement and the threshold shift amount in the bias temperature stress evaluation (BTS) have the same characteristics as the silicon thermal oxide film. Have been.
- the oxide film layer formed as described above sufficiently covers the single-crystal silicon layer despite the thin film, and does not cause dielectric breakdown.
- the electrode arrangement may be omitted for a specific single crystal grain, or a plurality of electric circuits may be provided for each single crystal grain. Further, the process steps of the electric circuit are performed in the case of manufacturing an N-channel type thin film transistor. However, it is a matter of course that a CMOS transistor structure can be obtained by sequentially implanting impurities with partial masking. Further, the second control layer may be used directly as a laminated gate insulating film, or only the insulating oxide film may be used as a gate insulating layer after etching and removal. In the case where a leak current may occur between adjacent transistors, island separation may be performed by etching or the like before or after crystallization.
- Example As the first thermal conduction and crystal control layer on the surface of a non-alkaline glass substrate manufactured by KOJUNG Co., Ltd. with external dimensions of 400nrni X 500mm, thickness of 0.7mm and strain point of 650 ° C
- the 200nm thick oxide silicon (Si0 2) film was formed by the plasma CVD method, an amorphous silicon of 60nm thickness as the subsequently non-single-crystal semiconductor layer (a-Si: H) exposing the film to air Films were continuously formed without any.
- the non-single-crystal semiconductor layer was annealed and dehydrogenated, and then oxygen ions were implanted, and the surface layer of the non-single-crystal semiconductor layer was used as an oxygen-implanted region.
- Oxygen ion implantation, the acceleration voltage 3 keV was performed at a dose 1.5E 17 / cm 2. Under these conditions, the maximum oxygen concentration position was equivalent to the projection 'range (Rp) of oxygen ions, and was about 10 nm deep. The maximum oxygen concentration was about 23 / cm 3 .
- the implantation amount (dose amount) and depth (Rp) of oxygen ions can be determined by the thickness and formation position of the insulating oxide film to be formed.
- the implantation conditions were determined for the purpose of forming an insulating oxide film layer of about 30 nm on the surface.
- the substrate was irradiated with pulsed excimer laser light having a wavelength of 308 nm from above the substrate to crystallize the non-single-crystal silicon layer and convert the oxygen-injected region into an oxide film layer.
- Laser irradiation is performed in a rectangular area of 5 mm x 5 mni with laser irradiation with an in-plane intensity distribution at an interval of ⁇ ⁇ using a phase shift mask.
- the value and the minimum value are arranged in a square lattice.
- the melting threshold (Emth) was about 0.6 J / cm 2
- the maximum value (Emax) of the laser beam energy intensity was 1.9 Jm 2
- the minimum value (Emin) was 0.1 J / cm 2 .
- the non-single-crystal silicon layer with a thickness of 60 nm was converted into a single-crystal silicon layer with a thickness of about 50 nm and an oxide film layer with a thickness of about 30 nm.
- an oxygen atom of the dough's weight 1.5E 17 / cm 2 is to silicon atoms chemically react you corresponds to silicon thickness of about 20 nm, about 30nm oxide silicon of (Si0 2) layer formed I do.
- the entire surface of the glass substrate was irradiated by excimer / laser light irradiation in the above-described embodiment by moving the irradiation step by 5 mm at every irradiation. After the irradiation was completed, Secco-Etch treatment was performed, and observation with a scanning electron microscope was performed.As a result, a total of 1 million single crystal grains with an average crystal grain size of 4.5 m were regularly arranged in a grid pattern every 5 mm x 5 mm. It was found that a thin film semiconductor substrate was obtained.
- a molybdenum-tandusten alloy film was deposited to a thickness of 300 nm by a sputtering method, aligned for each single crystal grain, and patterned into a predetermined shape to form a gate electrode. Using this gate electrode as a mask, phosphorus was ion-implanted to form source and drain regions.
- a silicon oxide film is deposited as an interlayer insulating film by a plasma CVD method, a contact hole is formed in the insulating film on the source and drain regions, and then an aluminum film is deposited and patterned. As a result, a thin film transistor (TFT) was completed.
- TFT thin film transistor
- This device operated N-channel and exhibited a threshold voltage (Vth) of 1.2 V and a mobility of 496 cm 2 / V ⁇ sec.
- Vth threshold voltage
- the threshold values of the thin film transistors formed on 20 400 mm ⁇ 500 mm thin film semiconductor substrates were 1.2 V ⁇ 0.08 V, and the mobility was 496 ⁇ 56 cm 2 / V ⁇ sec. Furthermore, the shift amount of Vth was only 0.05 V in the BTS evaluation of 10,000 seconds.
- the non-single-crystal semiconductor layer was annealed, dehydrogenated, and then subjected to oxygen ion implantation, so that an intermediate layer of the non-single-crystal semiconductor layer was used as an oxygen implantation region.
- Oxygen ion implantation the acceleration voltage 20 keV, was performed at a dose 1.5E 17 / cm 2. Under these conditions, the maximum oxygen concentration position was equivalent to the oxygen ion projection range (Rp) and was approximately 50 nm deep. The maximum oxygen concentration was about 3E22 / cm 3 .
- the implantation conditions were determined for the purpose of forming an insulating oxide film layer having a thickness of about 30 nm centered on a position about 60 nm from the surface of the semiconductor single crystal film.
- the substrate was irradiated with pulsed excimer laser light having a wavelength of 308 nm from above the substrate to crystallize the non-single-crystal silicon layer and convert the oxygen-injected region into an oxide layer.
- the laser irradiation is performed in a 5 mm X 5 inm rectangular area with a laser irradiation unit that has an in-plane intensity distribution by a phase shift mask at 10 m intervals in one plane, with one irradiation unit, and a total of 250,000 maximum and minimum values The values are arranged in a square lattice.
- the melting threshold (Emth) was about 0.8 J / cm 2
- the maximum value (Emax) of the laser beam energy intensity was 2.3 J / cm 2
- the minimum value (Emin) was 0.1 lJ / cm 2 .
- the second single crystal silicon layer 55 on the surface was patterned into a predetermined shape to form a gate electrode, and phosphorus was ion-implanted using the gate electrode as a mask to form a gate electrode, source and drain regions.
- a silicon oxide film is deposited by plasma CVD as an interlayer insulating film, contact holes are formed in the insulating film on the source and drain regions, and an aluminum film is deposited and patterned to form a thin film transistor (TFT). ) was completed.
- TFT thin film transistor
- the threshold value of the thin film transistor formed on the thin film semiconductor substrate was 1.0 V ⁇ 0.08 V, and the mobility was 475 ⁇ 50 cm 2 / V'sec.
- the shift amount of Vth was only 0.05V in the BTS evaluation of 10,000 seconds.
- the oxide film layer is formed by oxygen ion implantation, but the oxynitride film layer can be formed by introducing nitrogen ions or the like.
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Description
Claims
Priority Applications (2)
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EP02767911A EP1434275A4 (en) | 2001-09-10 | 2002-09-06 | THIN FILM SEMICONDUCTOR ELEMENT AND METHOD FOR THE PRODUCTION THEREOF |
KR1020047003241A KR100737662B1 (ko) | 2001-09-10 | 2002-09-06 | 박막반도체장치 및 그 제조방법 |
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JP2001317414A JP2003086604A (ja) | 2001-09-10 | 2001-09-10 | 薄膜半導体装置及びその基板ならびにその製造方法 |
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US (2) | US20030071312A1 (ja) |
EP (1) | EP1434275A4 (ja) |
JP (1) | JP2003086604A (ja) |
KR (1) | KR100737662B1 (ja) |
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US7531390B2 (en) | 2004-06-04 | 2009-05-12 | Advanced Lcd Technologies Development Center Co., Ltd. | Crystallizing method, thin-film transistor manufacturing method, thin-film transistor, and display device |
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KR100534579B1 (ko) * | 2003-03-05 | 2005-12-07 | 삼성에스디아이 주식회사 | 다결정 실리콘 박막, 이의 제조 방법 및 이를 이용하여제조된 액티브 채널 방향 의존성이 없는 박막 트랜지스터 |
JP2004363241A (ja) * | 2003-06-03 | 2004-12-24 | Advanced Lcd Technologies Development Center Co Ltd | 結晶化半導体層の形成方法及び形成装置ならびに半導体装置の製造方法 |
TW200507279A (en) * | 2003-07-16 | 2005-02-16 | Adv Lcd Tech Dev Ct Co Ltd | Thin-film semiconductor substrate, method of manufacturing the same; apparatus for and method of crystallization;Thin-film semiconductor apparatus, method of manufacturing the same; |
JP4834853B2 (ja) | 2004-06-10 | 2011-12-14 | シャープ株式会社 | 薄膜トランジスタ回路、薄膜トランジスタ回路の設計方法、薄膜トランジスタ回路の設計プログラム、設計プログラム記録媒体、及び表示装置 |
FR2873491B1 (fr) * | 2004-07-20 | 2006-09-22 | Commissariat Energie Atomique | Procede de realisation d'une structure dotee d'au moins une zone d'un ou plusieurs nanocristaux semi-conducteurs localisee avec precision |
KR100724560B1 (ko) * | 2005-11-18 | 2007-06-04 | 삼성전자주식회사 | 결정질 반도체층을 갖는 반도체소자, 그의 제조방법 및그의 구동방법 |
CN101790774B (zh) * | 2007-06-26 | 2012-05-02 | 麻省理工学院 | 半导体晶圆在薄膜包衣中的重结晶以及有关工艺 |
KR102011259B1 (ko) | 2010-02-26 | 2019-08-16 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
KR101877377B1 (ko) | 2010-04-23 | 2018-07-11 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 제작 방법 |
JP2010263240A (ja) * | 2010-07-27 | 2010-11-18 | Sharp Corp | 結晶化方法、結晶化装置、薄膜トランジスタ及び表示装置 |
US9018108B2 (en) | 2013-01-25 | 2015-04-28 | Applied Materials, Inc. | Low shrinkage dielectric films |
US9379175B2 (en) * | 2013-12-26 | 2016-06-28 | Mediatek Inc. | Integrated circuits and fabrication methods thereof |
RU2626292C1 (ru) * | 2016-03-22 | 2017-07-25 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Чеченский государственный университет" (ФГБОУ ВО "Чеченский государственный университет") | Способ изготовления полупроводникового прибора |
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US7531390B2 (en) | 2004-06-04 | 2009-05-12 | Advanced Lcd Technologies Development Center Co., Ltd. | Crystallizing method, thin-film transistor manufacturing method, thin-film transistor, and display device |
US7943936B2 (en) | 2004-06-04 | 2011-05-17 | Advanced Lcd Technologies Development Center Co., Ltd. | Crystallizing method, thin-film transistor manufacturing method, thin-film transistor, and display device |
Also Published As
Publication number | Publication date |
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JP2003086604A (ja) | 2003-03-20 |
US20030071312A1 (en) | 2003-04-17 |
KR20040029464A (ko) | 2004-04-06 |
US7067404B2 (en) | 2006-06-27 |
EP1434275A4 (en) | 2005-12-21 |
US20050121111A1 (en) | 2005-06-09 |
TW565942B (en) | 2003-12-11 |
CN1554122A (zh) | 2004-12-08 |
KR100737662B1 (ko) | 2007-07-09 |
EP1434275A1 (en) | 2004-06-30 |
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