WO2003003470A3 - Feldeffekttransistor und verfahren zu seiner herstellung - Google Patents

Feldeffekttransistor und verfahren zu seiner herstellung Download PDF

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Publication number
WO2003003470A3
WO2003003470A3 PCT/EP2002/006803 EP0206803W WO03003470A3 WO 2003003470 A3 WO2003003470 A3 WO 2003003470A3 EP 0206803 W EP0206803 W EP 0206803W WO 03003470 A3 WO03003470 A3 WO 03003470A3
Authority
WO
WIPO (PCT)
Prior art keywords
field effect
effect transistor
production
transistor
channel width
Prior art date
Application number
PCT/EP2002/006803
Other languages
English (en)
French (fr)
Other versions
WO2003003470A2 (de
Inventor
Martin Popp
Frank Richter
Dietmar Temmler
Andreas Wich-Glasen
Original Assignee
Infineon Technologies Ag
Martin Popp
Frank Richter
Dietmar Temmler
Andreas Wich-Glasen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Martin Popp, Frank Richter, Dietmar Temmler, Andreas Wich-Glasen filed Critical Infineon Technologies Ag
Priority to US10/482,328 priority Critical patent/US20060231918A1/en
Priority to JP2003509545A priority patent/JP2004535063A/ja
Priority to KR1020037016973A priority patent/KR100719152B1/ko
Publication of WO2003003470A2 publication Critical patent/WO2003003470A2/de
Publication of WO2003003470A3 publication Critical patent/WO2003003470A3/de
Priority to US11/294,380 priority patent/US20060231874A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/7851—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with the body tied to the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66651—Lateral single gate silicon transistors with a single crystalline channel formed on the silicon substrate after insulating device isolation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)

Abstract

Es wird ein Transistor bereitgestellt, der in vorteilhafter Weise einen Teil der Fläche, die bei herkömmlichen Transistoren für die Isolation zwischen den Transistoren vorgesehen ist, nutzt. Die Vergrößerung der Kanalweite kann dabei selbstjustiert ohne die Gefahr von Kurzschlüssen erfolgen. Der erfindungsgemäße Feldeffekttransistor besitzt den Vorteil, daß eine deutliche Erhöhung der für den Flußstrom ION wirksamen Kanalweite gegenüber bisher verwendeten, konventionellen Transistorstrukturen gewährleistest werden kann, ohne daß eine Verringerung der erzielbaren Integrationsdichte hingenommen werden muß. So läßt sich beispielsweise der Flußstrom ION um bis 50% steigern, ohne daß die Anordnung der aktiven Gebiete bzw. der Grabenisolation verändert werden muß.
PCT/EP2002/006803 2001-06-28 2002-06-19 Feldeffekttransistor und verfahren zu seiner herstellung WO2003003470A2 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US10/482,328 US20060231918A1 (en) 2001-06-28 2002-06-19 Field effect transistor and method for the production thereof
JP2003509545A JP2004535063A (ja) 2001-06-28 2002-06-19 電界効果トランジスタおよびこれを製造する方法
KR1020037016973A KR100719152B1 (ko) 2001-06-28 2002-06-19 전계-효과 트랜지스터 및 그 제조 방법
US11/294,380 US20060231874A1 (en) 2001-06-28 2005-12-06 Field effect transistor and method for fabricating it

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10131237.7 2001-06-28
DE10131237A DE10131237B8 (de) 2001-06-28 2001-06-28 Feldeffekttransistor und Verfahren zu seiner Herstellung

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US11/294,380 Continuation US20060231874A1 (en) 2001-06-28 2005-12-06 Field effect transistor and method for fabricating it

Publications (2)

Publication Number Publication Date
WO2003003470A2 WO2003003470A2 (de) 2003-01-09
WO2003003470A3 true WO2003003470A3 (de) 2004-02-12

Family

ID=7689801

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/006803 WO2003003470A2 (de) 2001-06-28 2002-06-19 Feldeffekttransistor und verfahren zu seiner herstellung

Country Status (6)

Country Link
US (2) US20060231918A1 (de)
JP (1) JP2004535063A (de)
KR (1) KR100719152B1 (de)
DE (1) DE10131237B8 (de)
TW (1) TW586230B (de)
WO (1) WO2003003470A2 (de)

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EP1555688B1 (de) 2004-01-17 2009-11-11 Samsung Electronics Co., Ltd. Verfahren zur Herstellung eines FinFET mit mehrseitigem Kanal
US7385247B2 (en) 2004-01-17 2008-06-10 Samsung Electronics Co., Ltd. At least penta-sided-channel type of FinFET transistor
KR100541054B1 (ko) 2004-03-23 2006-01-11 삼성전자주식회사 하드마스크 스페이서를 채택하여 3차원 모오스 전계효과트랜지스터를 제조하는 방법
TWI263328B (en) 2005-01-04 2006-10-01 Samsung Electronics Co Ltd Semiconductor devices having faceted channels and methods of fabricating such devices
KR100849177B1 (ko) 2005-01-04 2008-07-30 삼성전자주식회사 패싯 채널들을 갖는 모스 트랜지스터를 채택하는 반도체집적회로 소자들 및 그 제조방법들
JP2006344809A (ja) 2005-06-09 2006-12-21 Toshiba Corp 半導体装置及びその製造方法
KR100695868B1 (ko) 2005-06-23 2007-03-19 삼성전자주식회사 소자 분리막과 그 제조 방법, 이를 갖는 반도체 장치 및 그제조 방법
KR100756809B1 (ko) 2006-04-28 2007-09-07 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
JP2008078356A (ja) * 2006-09-21 2008-04-03 Elpida Memory Inc 半導体装置およびその製造方法
KR100772114B1 (ko) * 2006-09-29 2007-11-01 주식회사 하이닉스반도체 반도체 소자의 제조방법
KR100905783B1 (ko) * 2007-10-31 2009-07-02 주식회사 하이닉스반도체 반도체 소자 및 그의 제조방법
US7705386B2 (en) * 2008-01-07 2010-04-27 International Business Machines Corporation Providing isolation for wordline passing over deep trench capacitor
JP2011066038A (ja) * 2009-09-15 2011-03-31 Toshiba Corp 半導体記憶装置
US8021949B2 (en) 2009-12-01 2011-09-20 International Business Machines Corporation Method and structure for forming finFETs with multiple doping regions on a same chip
US8624320B2 (en) * 2010-08-02 2014-01-07 Advanced Micro Devices, Inc. Process for forming fins for a FinFET device
US9000526B2 (en) * 2011-11-03 2015-04-07 Taiwan Semiconductor Manufacturing Co., Ltd. MOSFET structure with T-shaped epitaxial silicon channel
US9263586B2 (en) 2014-06-06 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum well fin-like field effect transistor (QWFinFET) having a two-section combo QW structure
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Also Published As

Publication number Publication date
JP2004535063A (ja) 2004-11-18
TW586230B (en) 2004-05-01
WO2003003470A2 (de) 2003-01-09
KR20040006041A (ko) 2004-01-16
KR100719152B1 (ko) 2007-05-17
DE10131237A1 (de) 2003-01-23
DE10131237B4 (de) 2006-05-04
DE10131237B8 (de) 2006-08-10
US20060231874A1 (en) 2006-10-19
US20060231918A1 (en) 2006-10-19

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