WO2002019334A3 - Architecture de memoire flash comprenant un stockage separe de donnees en surdebit et utilisateur - Google Patents

Architecture de memoire flash comprenant un stockage separe de donnees en surdebit et utilisateur Download PDF

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Publication number
WO2002019334A3
WO2002019334A3 PCT/US2001/026453 US0126453W WO0219334A3 WO 2002019334 A3 WO2002019334 A3 WO 2002019334A3 US 0126453 W US0126453 W US 0126453W WO 0219334 A3 WO0219334 A3 WO 0219334A3
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WIPO (PCT)
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overhead
data
user data
dedicated
blocks
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PCT/US2001/026453
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English (en)
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WO2002019334A2 (fr
Inventor
Petro Estakhri
Siamack Nemazie
Original Assignee
Lexar Media Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Lexar Media Inc filed Critical Lexar Media Inc
Priority to JP2002524147A priority Critical patent/JP4782360B2/ja
Priority to AU2001286715A priority patent/AU2001286715A1/en
Priority to EP01966179.2A priority patent/EP1323165B1/fr
Publication of WO2002019334A2 publication Critical patent/WO2002019334A2/fr
Publication of WO2002019334A3 publication Critical patent/WO2002019334A3/fr

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • G06F3/0605Improving or facilitating administration, e.g. storage management by facilitating the interaction with a user or administrator
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0616Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0631Configuration or reconfiguration of storage systems by allocating resources to storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0647Migration mechanisms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
    • G06F2212/1036Life time enhancement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21Employing a record carrier using a specific recording technology
    • G06F2212/214Solid state disk
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation
    • G06F2212/657Virtual address space management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7204Capacity control, e.g. partitioning, end-of-life degradation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7211Wear leveling
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/102External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)

Abstract

Ce système de mémoire flash sépare les données en surdébit des données utilisateur de façon que les données en surdébit puissent être adressées, programmées et effacées, indépendamment des données utilisateur. Le support de mémoire non volatile d'un système de mémoire flash est mappé en plusieurs blocs mémoire séparés, adressables séparément, programmables et effaçables de manière indépendante, notamment des blocs de surdébit dédiés et des blocs de données dédiés. Les blocs de surdébit dédiés sont mappés en fonction de plusieurs segments pouvant être adressés de manière distincte. Les données utilisateur définies par une adresse de bloc logique virtuel (VLBA) sont stockées dans un bloc de données dédié situé dans la mémoire flash. Des ensembles, produits successivement, de données en surdébit, tels qu'une référence croisée de l'adresse physique des données utilisateur, des drapeaux, et des données de correction d'erreur produites conjointement avec des données utilisateurs entrantes, sont stockés dans des segments respectifs dans les blocs de surdébit dédiés. Lorsqu'un bloc de surdébit dédié est désigné pour être effacé, tout segment de surdébit actuel est consolidé et déplacé vers un nouveau bloc de surdébit dédié, le bloc complet ou obsolète étant effacé.
PCT/US2001/026453 2000-08-25 2001-08-24 Architecture de memoire flash comprenant un stockage separe de donnees en surdebit et utilisateur WO2002019334A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002524147A JP4782360B2 (ja) 2000-08-25 2001-08-24 オーバヘッドデータとユーザデータを独立して個別に格納するフラッシュメモリアーキテクチャ
AU2001286715A AU2001286715A1 (en) 2000-08-25 2001-08-24 Flash memory architecture with separate storage of overhead and user data
EP01966179.2A EP1323165B1 (fr) 2000-08-25 2001-08-24 Architecture de memoire flash comprenant un stockage separe de donnees en surdebit et utilisateur

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/648,271 2000-08-25
US09/648,271 US7155559B1 (en) 2000-08-25 2000-08-25 Flash memory architecture with separate storage of overhead and user data

Publications (2)

Publication Number Publication Date
WO2002019334A2 WO2002019334A2 (fr) 2002-03-07
WO2002019334A3 true WO2002019334A3 (fr) 2003-03-27

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US (6) US7155559B1 (fr)
EP (2) EP1323165B1 (fr)
JP (1) JP4782360B2 (fr)
AU (1) AU2001286715A1 (fr)
WO (1) WO2002019334A2 (fr)

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US9384127B2 (en) 2016-07-05
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