US8229043B2 - Stepped gain mixer - Google Patents

Stepped gain mixer Download PDF

Info

Publication number
US8229043B2
US8229043B2 US12/053,371 US5337108A US8229043B2 US 8229043 B2 US8229043 B2 US 8229043B2 US 5337108 A US5337108 A US 5337108A US 8229043 B2 US8229043 B2 US 8229043B2
Authority
US
United States
Prior art keywords
transistor
lead
switch
drain
drain lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US12/053,371
Other languages
English (en)
Other versions
US20090238313A1 (en
Inventor
Xinwei Wang
Xiangdong Zhang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
PTAB case IPR2018-01429 filed (Final Written Decision) litigation Critical https://portal.unifiedpatents.com/ptab/case/IPR2018-01429 Petitioner: "Unified Patents PTAB Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Court of Appeals for the Federal Circuit litigation https://portal.unifiedpatents.com/litigation/Court%20of%20Appeals%20for%20the%20Federal%20Circuit/case/2020-1664 Source: Court of Appeals for the Federal Circuit Jurisdiction: Court of Appeals for the Federal Circuit "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in California Southern District Court litigation https://portal.unifiedpatents.com/litigation/California%20Southern%20District%20Court/case/3%3A17-cv-02402 Source: District Court Jurisdiction: California Southern District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
First worldwide family litigation filed litigation https://patents.darts-ip.com/?family=40736645&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US8229043(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Assigned to QUALCOMM INCORPORATED reassignment QUALCOMM INCORPORATED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: WANG, XINWEI, ZHANG, XIANGDONG
Priority to US12/053,371 priority Critical patent/US8229043B2/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Priority to PCT/US2009/037885 priority patent/WO2009117708A1/en
Priority to JP2011501002A priority patent/JP5166599B2/ja
Priority to EP09721894.5A priority patent/EP2281338B1/en
Priority to KR1020107023466A priority patent/KR101203440B1/ko
Priority to KR1020127016650A priority patent/KR101256772B1/ko
Priority to CN2009801093246A priority patent/CN101978596B/zh
Priority to EP18158675.1A priority patent/EP3355469A1/en
Priority to TW098109249A priority patent/TW201004128A/zh
Publication of US20090238313A1 publication Critical patent/US20090238313A1/en
Publication of US8229043B2 publication Critical patent/US8229043B2/en
Application granted granted Critical
Priority to JP2012231828A priority patent/JP5684215B2/ja
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1441—Balanced arrangements with transistors using field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/12—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/12—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
    • H03D7/125—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes with field effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1466—Passive mixer arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1491—Arrangements to linearise a transconductance stage of a mixer arrangement
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16—Multiple-frequency-changing
    • H03D7/165—Multiple-frequency-changing at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0001—Circuit elements of demodulators
    • H03D2200/0025—Gain control circuits

Definitions

  • the present disclosure relates generally to wireless communication devices and, more specifically, to a mixer in a receiver front end that provides stepped gain control.
  • Receivers for wireless communication systems typically require low noise amplifiers (LNAs) followed by double-balanced mixers to pre-amplify incoming signals and to down-convert those signals to an appropriate intermediate frequency (IF) or baseband frequency.
  • LNAs low noise amplifiers
  • Typical receivers have a signal-to-noise ratio (SNR) of no more than about 20 dB.
  • SNR signal-to-noise ratio
  • the signal-to-noise ratio imposes a rough limit on the data throughput that a communication system can transmit. For example, a system conforming to the IEEE 802.11g standard with a signal-to-noise ratio of about 20 dB cannot transmit much more than about 25 MB/second of data.
  • Newer wireless communications systems are being developed that are based on orthogonal frequency-division multiplexing (OFDM) and allow higher data rates to be transmitted than is achievable with existing systems that are based on Code Division Multiple Access (CDMA) or Time Division Multiple Access (TDMA).
  • OFDM orthogonal frequency-division multiplexing
  • CDMA Code Division Multiple Access
  • TDMA Time Division Multiple Access
  • OFDM achieves higher spectral efficiency by removing guard bands and by spacing carrier sub-channels closely together until they actually overlap.
  • the frequencies of the carrier sub-channels are orthogonal (perpendicular in a mathematical sense) and allow the spectrum of each sub-channel to overlap other sub-channels without interfering with them.
  • FFT Fast Fourier transform
  • quadrature amplitude modulation is typically employed to increase the data throughput even more.
  • LTE Long-Term Evolution
  • UMB Ultra Mobile Broadband
  • WiFi IEEE 802.11a/g
  • WiMax IEEE 802.16
  • DVD Digital Video Broadcasting
  • a receiver for an OFDM system should also maintain a high signal-to-noise ratio over a large gain control range. For example, it is desirable to maintain a high signal-to-noise ratio over a gain range of at least 35 dB.
  • the signal-to-noise ratio tends to zig-sag over a large gain range where the receiver has just a few large gain steps.
  • a receiver with many fine gain steps can be used to achieve a consistently high and smooth signal-to-noise ratio over a large gain range.
  • Power consumption is also an important consideration in the design of receiver front ends, especially for receivers in handheld wireless devices.
  • power consumption can be reduced by using passive mixers and avoiding series-configured low noise amplifiers (LNAs).
  • LNAs series-configured low noise amplifiers
  • a design for a receiver is sought that can achieve a smooth signal-to-noise ratio of at least 30 dB over a gain range of at least 35 dB but that maintains this signal-to-noise ratio using only passive mixers and without using series configured low noise amplifiers.
  • a receiver uses a novel amplified stepped gain mixer portion to provide a higher signal-to-noise ratio (SNR) than that achievable with conventional mixers.
  • the amplified stepped gain mixer portion includes low-noise amplifiers and stepped gain mixers.
  • the SNR of the receiver transitions smoothly as the gain of the amplified stepped gain mixer portion changes over a wide power range.
  • the amplified stepped gain mixer portion improves the SNR of the receiver by using multiple gain states to improve the linearity of the receiver over a wide dynamic range.
  • each of the stepped gain mixers operates in four gain modes. Twelve gain states are achieved by applying the four mixer gain modes to each of three amplifier gain modes. The ability to lower the mixer gain mode at each amplifier gain mode enables the receiver to prevent saturation of the receive chains and thereby prevent deterioration in the SNR.
  • the receiver performs IQ demodulation for wireless communication systems that are based on orthogonal frequency division multiplexing (OFDM).
  • the receiver is a differential system that generates an in-phase (I-phase) baseband signal and a quadrature (Q-phase) baseband signal.
  • Each of the two stepped gain mixers receives a differential signal from the low noise amplifiers in the form of a 0-degree (plus) phase and a 180-degree (minus) phase amplified radio frequency (RF) signal.
  • An I-phase local oscillator (LO) signal and a Q-phase LO signal are shifted by ninety degrees from one another.
  • Each of the I-phase LO signal and the Q-phase LO signal is generated differentially in a 0-degree (plus) phase as well as in a 180-degree (minus) phase.
  • the I-phase LO signal is provided to one of the stepped gain mixers, and the Q-phase LO signal is provided to the other stepped gain mixer.
  • One of the stepped gain mixers downconverts the amplified RF signal and generates the I-phase baseband signal, and the other stepped gain mixer downconverts the amplified RF signal and generates the Q-phase baseband signal.
  • the receiver comprises an RF transceiver integrated circuit (IC) and a digital baseband IC.
  • the RF transceiver IC contains the amplified stepped gain mixer portion and a mixer control register that controls the stepped gain mixers.
  • the digital baseband IC communicates mixer control information across an SPI serial bus, through the mixer control register, to the stepped gain mixers.
  • both the analog and the digital functions are performed on a single integrated circuit, called a system on a chip (SOC).
  • SOC system on a chip
  • the system on a chip includes the receiver front end, a receiver baseband processing block and a digital control block.
  • the digital control block controls the receiver operations, including the stepped gain mixers.
  • a stepped gain mixer portion in another embodiment, includes an amplifier, a switch and first and second transistors.
  • An oscillating signal is present on the gates of the first and second transistors.
  • the oscillating signal is generated by a frequency synthesizer.
  • the oscillating signal may also be generated by an external crystal, an external clock or an internal RC or ring oscillator.
  • the input lead of the amplifier is coupled to an antenna, and the output lead of the amplifier is coupled to the source lead of the first transistor and to the source lead of the second transistor.
  • the drain lead of the first transistor is coupled to the drain lead of the second transistor through the switch when the switch is closed.
  • the stepped gain mixer portion operates in a 1/2 mode and in a 2/2 mode.
  • the output current from stepped gain mixer portion flows only through the first transistor. Output current does not flow through the second transistor in the 1/2 mode because the switch is open.
  • output current from the stepped gain mixer portion flows through both the first and second transistors.
  • the stepped gain mixer portion is configured such that the switch is closed when a switching signal is asserted. In one aspect, the switching signal is asserted when a digital one is written into a bit of a mixer control register.
  • a stepped gain mixer operates in a first mode and in a second mode.
  • the stepped gain mixer has eight transistors and three switches. In the first mode, the first and second switches are closed, and the third switch is open. In the second mode, the first and second switches are open, and the third switch is closed.
  • a plus phase of a differential radio frequency input signal is present on each of the source leads of the first, second, third and fourth transistors.
  • a minus phase of the differential radio frequency input signal is present on each of the source leads of the fifth, sixth, seventh and eighth transistors.
  • a minus-phase of an oscillator signal is present on the gate leads of the first, second, fifth and sixth transistors, and a plus-phase of the oscillator signal is present on the gate leads of the third, fourth, seventh and eighth transistors.
  • a plus phase of a differential baseband output current is present on the drain lead of the first transistor, and a minus phase of the differential baseband output current is present on the drain lead of the fifth transistor.
  • the magnitude of the differential baseband output current in the first mode is greater than the magnitude of the differential baseband output current in the second mode.
  • the drain lead of the third transistor is coupled to the drain lead of the sixth transistor; the drain lead of the fourth transistor is coupled to the drain lead of the fifth transistor; the drain lead of the seventh transistor is coupled to the drain lead of the second transistor; and the drain lead of the eighth transistor is coupled to the drain lead of the first transistor.
  • the first switch is coupled to the drain lead of the second transistor.
  • the drain lead of the second transistor is coupled to the drain lead of the first transistor through the first switch when the first switch is closed in the first mode.
  • the second switch coupled to the drain lead of the sixth transistor.
  • the drain lead of the sixth transistor is coupled to the drain lead of the fifth transistor through the second switch when the second switch is closed in the first mode.
  • the drain lead of the second transistor is coupled through the third switch to the drain lead of the sixth transistor when the third switch is closed in the second mode. In the second mode, current loops from the drain lead of the second transistor, through the third switch, and to the drain lead of the sixth transistor.
  • a radio frequency input signal is received onto the source leads of a first transistor and a second transistor.
  • An oscillator signal is received onto the gate leads of the first transistor and the second transistor. Neither the first transistor nor the second transistor receives a biasing current.
  • a baseband signal is output from the drain lead of the first transistor. The magnitude of the current of the baseband signal is increased by coupling the drain lead of the first transistor to the drain lead of the second transistor.
  • the drain lead of the first transistor is coupled to the drain lead of the second transistor by closing a switch that is coupled to both the drain lead of the first transistor and the drain lead of the second transistor. The switch is closed when a bit of a mixer control register is written to and a switching signal is asserted.
  • a circuit in yet another embodiment, includes two transistors. Neither of the two transistors receives a biasing current.
  • An amplified radio frequency signal is present on a first lead of the first transistor and on a first lead of the second transistor.
  • An oscillating signal is present on the gate leads of the first transistor and the second transistor.
  • a baseband signal is present on a second lead of the first transistor.
  • the circuit also includes a means for controlling the magnitude of the current of the baseband signal by coupling the second lead of the first transistor to a second lead of the second transistor.
  • the magnitude of the current of the baseband signal increases when the second lead of the first transistor is coupled to the second lead of the second transistor by closing a switch included in the means.
  • the magnitude of the current of the baseband signal increases in response to writing to a bit of a register included in the means.
  • FIG. 1 is a simplified schematic block diagram of a receiver that uses an amplified stepped gain mixer portion to provide larger gain control range and a higher signal-to-noise ratio than that achievable with conventional mixers;
  • FIG. 2 is a simplified schematic block diagram of another embodiment of the amplified stepped gain mixer portion of FIG. 1 that operates in six gain states;
  • FIG. 3 is a simplified schematic block diagram of another embodiment of the amplified stepped gain mixer portion of FIG. 1 that operates in twelve gain states;
  • FIG. 4 is a diagram showing a differential, double-balanced mixer that is equivalent to the four-quarter (4/4) mode of the amplified stepped gain mixer portion of FIG. 3 ;
  • FIG. 5 is another type of simplified block diagram showing circuit configuration that is similar to the amplified stepped gain mixer portion of FIG. 3 ;
  • FIG. 6 is a table showing the twelve gain states achieved by the amplified stepped gain mixer portion of FIG. 3 ;
  • FIG. 7 is a diagram plotting the front-end gain of the amplified stepped gain mixer portion of FIG. 3 at each of the twelve gain states of FIG. 6 ;
  • FIG. 8 is a diagram plotting the front-end noise figure of the amplified stepped gain mixer portion of FIG. 3 at each of the twelve gain states of FIG. 6 ;
  • FIG. 9 is a diagram plotting the input third-order intercept point (input IP 3 ) of the amplified stepped gain mixer portion of FIG. 3 at each of the twelve gain states of FIG. 6 ;
  • FIG. 10 is a table listing various performance indicators at gain state one over process corners of the amplified stepped gain mixer portion of FIG. 3 ;
  • FIG. 11 is a flowchart of a method in accordance with one novel aspect.
  • FIG. 1 is a simplified block diagram of a receiver 10 that performs IQ demodulation for a wireless communication system based on orthogonal frequency division multiplexing (OFDM).
  • the functions of receiver 10 are performed by a radio frequency (RF) transceiver integrated circuit (IC) 11 and a digital baseband IC 12 .
  • RF transceiver IC 11 is called a “transceiver” because it includes a transmitter as well as a receiver.
  • the circuitry that performs the transmitting functions of RF transceiver IC 11 is not shown in FIG. 1 .
  • Receiver 10 uses an amplified stepped gain mixer portion 15 to provide a higher signal-to-noise ratio than that achievable with conventional mixers.
  • the higher signal-to-noise ratio is achieved in part by providing a larger gain control range.
  • the signal-to-noise ratio of receiver 10 transitions smoothly as the gain of amplified stepped gain mixer portion 15 increases over a wide power range.
  • amplified stepped gain mixer portion 15 provides receiver 10 with fine gain steps and a large gain control range (GCR).
  • both the analog and the digital functions of receiver 10 are performed on a single integrated circuit, called a system on a chip (SOC).
  • the system on a chip includes amplified stepped gain mixer portion 15 , a receiver baseband processing block and a digital control block.
  • the digital control block controls the receiver operations, including the amplifiers and mixers of amplified stepped gain mixer portion 15 .
  • Receiver 10 includes an antenna 16 , three low noise amplifiers (LNAs) 17 - 19 , stepped gain mixers 20 - 21 , a frequency synthesizer 22 , band pass filters 23 - 24 , analog-to-digital converters 25 - 26 and a Fast Fourier transform (FFT) block 27 .
  • receiver 10 includes a serial peripheral interface (SPI) bus 28 over which RF transceiver IC 11 and a digital baseband IC 12 communicate.
  • RF transceiver IC 11 includes a mixer control register 29 that controls stepped gain mixers 20 - 21 .
  • Mixer control register 29 can be written to from SPI serial bus 28 .
  • Digital baseband IC 12 tunes receiver 10 by controlling the frequency of local oscillator (LO) signals 30 and 31 supplied by frequency synthesizer 22 to stepped gain mixers 20 and 21 , respectively.
  • Digital baseband IC 12 communicates mixer control information across SPI serial bus 28 , through mixer control register 29 , to stepped gain mixers 20 - 21 .
  • LO local oscillator
  • Receiver 10 When receiver 10 is receiving, an RF signal 32 is received onto antenna 16 and then is either amplified or attenuated by low noise amplifiers 17 - 19 .
  • Receiver 10 is designed to demodulate an RF signal having a carrier frequency between 700 MHz and 5.5 GHz. As the carrier frequency increases from 700 MHz to 5.5 GHz, the gain of amplified stepped gain mixer portion 15 decreases. Where the loss in gain over this frequency variation is not compensated, the gain may even decrease by as much as 50% for an RF signal of constant strength.
  • the loss in gain is mainly due to the parasitic capacitance of the metal-oxide-semiconductor field-effect transistors (MOSFETs) in stepped gain mixers 20 - 21 .
  • MOSFETs metal-oxide-semiconductor field-effect transistors
  • the carrier frequency of RF signal 32 is centered at 5.1 GHz and has a bandwidth of 20 MHz.
  • the frequency of the carrier signal ranges from 5.099 GHz to 5.101 GHz.
  • a local oscillator frequency is then used to demodulate the carrier signal and to downconvert RF signal 32 to baseband signals 33 - 34 .
  • frequency synthesizer 22 generates a local oscillator frequency of 5.1 GHz
  • stepped gain mixers 20 - 21 generate a baseband signal with a bandwidth of 10 MHz.
  • Receiver 10 is a differential, quadrature-based system that generates an in-phase (I-phase) baseband signal 33 and a quadrature (Q-phase) baseband signal 34 .
  • the I-phase LO signal 30 provided to mixer 20 and the Q-phase LO signal 31 provided to mixer 21 are shifted by ninety degrees from one another.
  • each of I-phase LO signal 30 and Q-phase LO signal 31 is generated differentially in a 0-degree (plus) phase as well as a 180-degree (minus) phase.
  • Low noise amplifiers 17 - 19 provide an amplified or attenuated (depending on the gain state) differential RF signal 32 equally to both mixers 20 - 21 such that in-phase and quadrature phase baseband signals 33 - 34 are treated consistently.
  • Each of the two stepped gain mixers 20 - 21 receives the differential signal from low noise amplifiers 17 - 19 in the form of a plus-phase and a minus-phase amplified RF signal.
  • Stepped gain mixer 20 downconverts an amplified RF signal and generates I-phase baseband signal 33 , which is then filtered by band pass filter 23 .
  • stepped gain mixer 21 downconverts an amplified RF signal and generates the Q-phase baseband signal 34 , which is then filtered by band pass filter 24 .
  • This configuration of two mixers driven from the same RF input signal and driven by local oscillator signals ninety degrees out-of-phase is referred to as a quadrature demodulator.
  • the I and Q phases 33 - 34 of the filtered baseband signal are then passed to digital baseband IC 12 .
  • Analog-to-digital converters 25 - 26 then digitize baseband signals 33 - 34 into one or more digital streams for baseband processing in digital baseband IC 12 .
  • One of the steps of baseband processing involves FFT block 27 converting the digital streams into symbols for subsequent digital signal processing.
  • receiver 10 is not a differential system but is rather single-ended.
  • the single-ended receiver system does not employ plus and minus phase signals.
  • Increasing the signal-to-noise ratio (SNR) of a receiver by reducing the thermal noise generated by the receiver is effective only to a certain extent. Even where the SNR has been increased by reducing the thermal noise, the SNR deteriorates rapidly when a receive chain saturates, and the response of the receiver becomes non-linear. Therefore, besides reducing thermal noise, the overall SNR of a receiver can be improved by reducing the non-linearity of the receiver front end.
  • Amplified stepped gain mixer portion 15 improves the SNR of receiver 10 by improving the linearity using multiple gain states. Twelve gain states are achieved by providing four mixer gain modes for each of three amplifier gain modes of low noise amplifiers 17 - 19 .
  • Low noise amplifiers 17 - 19 have the ability to reduce the RF signal strength so that the receive chains do not saturate at even very large input signal strengths. The fine gain steps prevent deterioration in the SNR at the highest mixer gain mode of each amplifier gain mode.
  • Low noise amplifiers 17 - 19 are connected in parallel. Only one of the low noise amplifiers is operational at any given time. Each low noise amplifier corresponds to one of the three amplifier gain modes. Each low noise amplifier is turned on or off by turning on or off the biasing current to that low noise amplifier. The biasing current is controlled by a register in RF transceiver IC 11 (not shown in FIG. 1 ) that is written to by digital baseband IC 12 using SPI serial bus 28 . By operating only one low noise amplifier at a time, parasitic coupling between low noise amplifiers is avoided. Non-linearity in the response of a second stage, series-connected low noise amplifier caused by the second stage easily saturating is also avoided. In addition, difficulties associated with matching the impedance between the first and second stages of series-connected low noise amplifiers are avoided. Current consumption is also reduced by not connecting the low noise amplifiers in series.
  • the three low noise amplifiers 17 - 19 have transconductance gains of about ⁇ 22 dBS, ⁇ 44 dBS and ⁇ 58 dBS, respectively.
  • the three low noise amplifiers 17 - 19 by themselves provide a gain control range of about 36 dB ( ⁇ 22 dBS through ⁇ 58 dBS).
  • the conversion loss of each stepped gain mixer 20 - 21 is about ⁇ 7 dB. So the corresponding transconductance gain of first LNA 17 plus either in-phase stepped gain mixer 20 or quadrature-phase stepped gain mixer 21 is about ⁇ 29 dBS.
  • the gain control range of amplified stepped gain mixer portion 15 resulting from the three low noise amplifiers 17 - 19 is therefore between about ⁇ 29 dBS and ⁇ 65 dBS, for a total range of about 36 dB.
  • Each of stepped gain mixers 20 - 21 operates in four gain modes.
  • each stepped gain mixer provides an additional transconductance gain of about ⁇ 12 dBS.
  • the transconductance gain corresponding to the third amplifier gain mode of LNA 19 plus the highest attenuating mixer gain mode of either in-phase stepped gain mixer 20 or quadrature-phase stepped gain mixer 21 is about ⁇ 77 dBS.
  • the total gain control range of amplified stepped gain mixer portion 15 from the first amplifier gain mode with the lowest attenuating mixer gain mode ( ⁇ 29 dBS) to the third amplifier gain mode with the highest attenuating mixer gain mode ( ⁇ 77 dBS) is therefore about ⁇ 48 dBS.
  • FIG. 2 shows simplified embodiment 35 of an amplified stepped gain mixer portion coupled to antenna 16 , a local oscillator 36 and a baseband filter 37 .
  • Simplified embodiment 35 includes the three low noise amplifiers 17 - 19 coupled to a stepped gain mixer 38 .
  • Stepped gain mixer 38 has two MOSFET transistors 39 - 40 and two switches 41 - 42 , which are also MOSFET transistors in this embodiment.
  • stepped gain mixer 38 can operate in either a 1/2 mode or a 2/2 mode.
  • output current from stepped gain mixer 38 to baseband filter 37 flows only through n-channel field effect transistor 39 .
  • Output current does not flow through n-channel field effect transistor 40 in the 1/2 mode because switch 41 is open and switch 42 is closed.
  • output current from stepped gain mixer 38 flows through both FET 39 and FET 40 .
  • Stepped gain mixer 38 is configured such that switch 41 is closed and switch 42 is open when a switching signal 43 is asserted. In one embodiment, switching signal 43 is asserted when a digital one is written into the eighth bit of mixer control register 29 .
  • the front-end gain of simplified embodiment 35 can be reduced in each of the three amplifier gain modes.
  • the ability to operate in the 1/2 mixer gain mode doubles the number of gain states of simplified embodiment 35 .
  • the additional mixer gain states of simplified embodiment 35 are achieved using a passive mixer configuration with no biasing current supplied to transistors 39 - 40 . Additional mixer gain states are achieved with the passive mixer configuration without significantly increasing current consumption.
  • the switches 41 - 42 used to provide the additional mixer gain states do not significantly degrade performance by adding parasitic capacitance at baseband.
  • the switches 41 - 42 do not significantly increase the effects of parasitic capacitance of stepped gain mixer 38 because they are placed on the baseband side of mixer transistors 39 - 40 , as opposed to on RF port 44 or local oscillator port 45 of stepped gain mixer 38 .
  • the impedance on RF port 44 and local oscillator port 45 remains constant while switching between mixer gain states. Adding parasitic capacitance to the high frequency environments on RF port 44 or local oscillator port 45 would result in a low impedance that would attenuate RF signal 32 significantly.
  • an added parasitic capacitance of one picofarad that results in an impedance of only about twenty ohms in the high frequency environment of RF port 44 would result in a much higher two kilo-ohm impedance on the lower frequency baseband side of stepped gain mixer 38 .
  • the higher two kilo-ohm impedance does not significantly affect the baseband signal.
  • FIG. 3 shows another embodiment of stepped gain mixer 20 of amplified stepped gain mixer portion 15 .
  • an amplified differential RF input signal 32 drives double-balanced stepped gain mixer 20 operating in response to a differential local oscillator signal output by frequency synthesizer 22 .
  • Low noise amplifiers 17 - 19 output both a 0-degree (plus) phase 46 and a 180-degree (minus) phase 47 of differential RF input current.
  • the output of stepped gain mixer 20 is the differential I-phase baseband signal 33 representative of the differential RF input signal 32 down-converted at the local oscillator frequency.
  • Stepped gain mixer 20 receives the I-phase LO signal 30 provided by frequency synthesizer 22 .
  • Stepped gain mixer 20 outputs both a plus-phase 48 and a minus-phase 49 of the output current of I-phase baseband signal 33 .
  • stepped gain mixer 21 also receives both the plus-phase 46 and minus-phase 47 of amplified differential RF input current.
  • Stepped gain mixer 21 receives the differential Q-phase LO signal 31 that is shifted by 90 degrees from I-phase LO signal 30 .
  • Stepped gain mixer 21 outputs both a plus-phase and a minus-phase of Q-phase baseband signal 34 .
  • the plus-phase and minus-phase sides of stepped gain mixer 20 are combined with shunt switches 50 - 53 and series switches 54 - 61 to form a differential, double-balanced stepped gain mixer.
  • Receiver 10 operates as a differential receiver because low noise amplifiers 17 - 19 and stepped gain mixers 20 - 21 operate differentially.
  • Stepped gain mixer 20 is “double-balanced” because both the RF side and the baseband side operate differentially.
  • Each of the plus-phase and minus-phase sides of stepped gain mixer 20 is comprised of eight n-channel field effect transistors.
  • the plus-phase side of stepped gain mixer 20 includes transistors 62 - 69
  • the minus-phase side of stepped gain mixer 20 includes transistors 70 - 77 .
  • the gates of four ( 66 - 69 , 74 - 77 ) of the eight FETs of each of the plus-phase and minus-phase sides of stepped gain mixer 20 are coupled to the plus phase of the I-phase of LO signal 30 .
  • the gates of the other four ( 62 - 65 , 70 - 73 ) of the eight FETs of each of the plus-phase and minus-phase sides of stepped gain mixer 20 are coupled to the minus phase of the I-phase of LO signal 30 .
  • Switches 50 - 61 are configured such that symmetry is maintained between the plus-phase and minus-phase sides of stepped gain mixer 20 .
  • stepped gain mixer 20 can be controlled to operate in four mixer gain modes (4/4, 3/4, 2/4 and 1/4).
  • In the 1/4 mode current flows through four of the sixteen transistors 62 - 77 .
  • In the 4/4 mode current flows through all sixteen of the transistors 62 - 77 .
  • In the four mixer gain modes either one, two, three or four of the switches in all three of the switch group ( 50 - 53 , 54 - 57 and 58 - 61 ) is closed.
  • stepped gain mixer 21 operates analogously to mixer 20 , the same four bits can be used to control both stepped gain mixers 20 - 21 .
  • each of the sixteen transistors 62 - 77 are not of equal size.
  • the relative transistor size of the four transistor groups ( 62 , 70 , 69 , 77 ; 63 , 71 , 68 , 76 ; 64 , 72 , 67 , 75 ; and 65 , 73 , 66 , 74 ) can be chosen such that the amplification of the four modes (4/4, 3/4, 2/4, 1/4) results in linear steps in dB.
  • the relative amplification of the four modes (4/4, 3/4, 2/4, 1/4) for example, could be 0 dB, ⁇ 2 dB, ⁇ 4 dB and ⁇ 6 dB.
  • the four-quarter (4/4) mode of stepped gain mixer 20 corresponds to the highest gain mode when RF input current flows through all sixteen transistors 62 - 77 .
  • all four shunt switches 50 - 53 are open, and all eight series switches 54 - 61 are closed.
  • FIG. 4 shows a differential, double-balanced mixer 78 that is equivalent to the four-quarter (4/4) mode of differential, double-balanced stepped gain mixer 20 .
  • the magnitude of the plus phase 46 of RF input current flowing through a transistor 79 of mixer 78 is equivalent to the magnitude of plus phase 46 of the RF input current flowing through the four transistors 62 - 65 of stepped gain mixer 20 in FIG. 3 .
  • the one-quarter (1/4) mode has about a ⁇ 12 dB attenuation compared to the four-quarter (4/4) mode.
  • FIG. 5 shows another type of simplified block diagram of the embodiment of FIG. 3 .
  • Both FIG. 3 and FIG. 5 represent a similar circuit configuration of stepped gain mixer 20 .
  • FIG. 5 uses the crossed circle notation for a mixer.
  • the reference numerals in the crossed circles of FIG. 5 correspond to the numbered transistors in FIG. 3 .
  • the block diagram of FIG. 5 also designates the physical implementation of the transistors in the stepped gain mixer 20 .
  • FIG. 5 indicates that the transistors of stepped gain mixer 20 are grouped as four separate mixers.
  • FIG. 6 shows the twelve gain states achieved by combining the four mixer gain modes of mixer 20 or mixer 21 with the three amplifier gain modes of low noise amplifiers 17 - 19 .
  • Gain state one has the highest gain
  • gain state twelve has the lowest gain (or the largest attenuation).
  • FIG. 7 is a graph of the front-end gain of amplified stepped gain mixer portion 15 at each of the twelve gain states of FIG. 6 .
  • the front-end gain in dBS is a measure of the transconductance gain of the low noise amplifier that is being used in the corresponding gain state plus the gain of the mixer transistors that are being used.
  • the transconductance gain compares the input voltage into one of the low noise amplifiers 17 - 19 to the baseband output current exiting stepped gain mixers 20 - 21 .
  • the front-end gain in FIG. 7 was simulated at a frequency of RF signal 32 that was centered on 5.5 GHz.
  • the average dc current consumption of amplified stepped gain mixer portion 15 over the gain control range in FIG. 7 was 12.7 mA.
  • gain control range 7 shows that the gain control range is extended from ⁇ 65 dBS at gain state nine to ⁇ 77 dBS at gain state twelve by using the additional three mixer gain modes (3/4, 2/4 and 1/4).
  • An overall gain control range of about 50 dB is achieved from about ⁇ 28.6 dBS at gain state one to about ⁇ 77 dBS at gain state twelve.
  • FIG. 8 is a graph of the front-end noise figure of amplified stepped gain mixer portion 15 at each of the twelve gain states of FIG. 6 .
  • the front-end noise figure compares the noise added by the amplifiers and mixers to the input thermal noise to amplified stepped gain mixer portion 15 .
  • amplified stepped gain mixer portion 15 adds 35 dB of noise to the thermal noise received by amplified stepped gain mixer portion 15 .
  • amplified stepped gain mixer portion 15 adds only 1.6 dB of noise.
  • the added noise indicated in FIG. 8 does not include nonlinearity noise added.
  • FIG. 9 is a graph of the input third-order intercept point (input IP 3 ) of amplified stepped gain mixer portion 15 at each of the twelve gain states of FIG. 6 .
  • the IIP 3 figure is a power measurement in dB relative to one milliwatt (dBm) and is an indication of the linearity of amplified stepped gain mixer portion 15 .
  • FIG. 9 indicates that the IIP 3 of amplified stepped gain mixer portion 15 is about 14 dBm at gain state five. Thus, at gain state five amplified stepped gain mixer portion 15 can tolerate an input RF signal having a power of about 0 dBm without saturating the receive chains.
  • the linearity of amplified stepped gain mixer portion 15 is poor at the gain states one through four.
  • Performance is not harmed by the poor linearity at high gain states, however, because when the magnitude of input RF signal 32 is low and the gain is high, a small RF signal 32 will not saturate the receive chains.
  • the linearity of amplified stepped gain mixer portion 15 is good.
  • the input linearity is about 24 dBm at gain state ten, and amplified stepped gain mixer portion 15 can tolerate a larger input signal.
  • An input RF signal 32 with about 10 dBm of input power can be demodulated at gain state ten without saturating the receive chains.
  • FIG. 10 is a table listing various performance indicators at gain state one over process corners of amplified stepped gain mixer portion 15 .
  • the performance indicators are simulated for gain state one over an RF frequency ranging from 5.1 GHz to 5.9 GHz, over a power supply voltage varying by ⁇ 5%, over a temperature range from ⁇ 30 to 85 degrees Celsius, and over various silicon process corners.
  • the gain values of FIG. 10 correspond to the front-end gain values of FIG. 7 for the listed gain states.
  • the noise figure values correspond to the front-end noise figure values of FIG. 8 .
  • the IIP 3 values correspond to the input IP 3 values of FIG. 9 .
  • FIG. 10 also includes S 11 values indicating the input return loss for the listed gain states.
  • FIG. 11 is a flowchart of a novel method 80 in accordance with one novel aspect.
  • a radio frequency input signal is received onto the source leads of a first transistor and a second transistor.
  • the source leads of the transistors are the source lead of first transistor 39 and the source lead of second transistor 40 of FIG. 2 .
  • Radio frequency input signal 32 is amplified by LNAs 17 - 19 and then received onto the source leads of transistors 39 - 40 .
  • an oscillator signal is received onto a gate lead of the first transistor and onto a gate lead of the second transistor.
  • an oscillator signal generated by local oscillator 36 within RF transceiver IC 11 is received onto the gate leads of transistors 39 - 40 .
  • a baseband signal is output from a drain lead of the first transistor.
  • a baseband signal current 84 is output from the drain lead first transistor 39 in FIG. 2 .
  • the baseband signal has a current with a magnitude.
  • the magnitude of the current of the baseband signal is increased by coupling the drain lead of the first transistor to a drain lead of the second transistor.
  • the drain lead of first transistor 39 is coupled to the drain lead of transistor 40 by closing switch 41 .
  • switch 41 is coupled both to the drain lead of first transistor 39 and to the drain lead second transistor 40 . Switch 41 is closed and switch 42 is opened when switching signal 43 is asserted.
  • the functions described may be implemented in hardware, software, firmware, or any combination thereof.
  • mixer and amplifier control may be performed by software running in digital baseband IC 12 .
  • the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
  • Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
  • a storage media may be any available media that can be accessed by a computer.
  • such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
  • any connection is properly termed a computer-readable medium.
  • the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave
  • DSL digital subscriber line
  • wireless technologies such as infrared, radio, and microwave
  • Disk and disc includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
  • amplified stepped gain mixer portion 15 is described as part of receiver 10 of a handheld wireless device. Amplified stepped gain mixer portion 15 , however, can also be used in the receiver in a base station of an OFDM communication system. In addition, amplified stepped gain mixer portion 15 can be used in a transmitter, such as in a wireless device or in a base station of an OFDM communication system. For example, stepped gain mixer 20 can be used to modulate baseband data onto an RF signal transmitted from the wireless device or base station. The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use a stepped gain mixer.
  • stepped gain mixer is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Circuits Of Receivers In General (AREA)
  • Amplifiers (AREA)
  • Superheterodyne Receivers (AREA)
  • Transceivers (AREA)
  • Control Of Amplification And Gain Control (AREA)
US12/053,371 2008-03-21 2008-03-21 Stepped gain mixer Active 2030-03-24 US8229043B2 (en)

Priority Applications (10)

Application Number Priority Date Filing Date Title
US12/053,371 US8229043B2 (en) 2008-03-21 2008-03-21 Stepped gain mixer
JP2011501002A JP5166599B2 (ja) 2008-03-21 2009-03-20 段階的利得ミキサ
CN2009801093246A CN101978596B (zh) 2008-03-21 2009-03-20 步进式增益混频器
PCT/US2009/037885 WO2009117708A1 (en) 2008-03-21 2009-03-20 Stepped gain mixer
EP18158675.1A EP3355469A1 (en) 2008-03-21 2009-03-20 Stepped gain mixer
TW098109249A TW201004128A (en) 2008-03-21 2009-03-20 Stepped gain mixer
KR1020127016650A KR101256772B1 (ko) 2008-03-21 2009-03-20 계단형 이득 믹서
EP09721894.5A EP2281338B1 (en) 2008-03-21 2009-03-20 Stepped gain mixer
KR1020107023466A KR101203440B1 (ko) 2008-03-21 2009-03-20 계단형 이득 믹서
JP2012231828A JP5684215B2 (ja) 2008-03-21 2012-10-19 段階的利得ミキサ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/053,371 US8229043B2 (en) 2008-03-21 2008-03-21 Stepped gain mixer

Publications (2)

Publication Number Publication Date
US20090238313A1 US20090238313A1 (en) 2009-09-24
US8229043B2 true US8229043B2 (en) 2012-07-24

Family

ID=40736645

Family Applications (1)

Application Number Title Priority Date Filing Date
US12/053,371 Active 2030-03-24 US8229043B2 (en) 2008-03-21 2008-03-21 Stepped gain mixer

Country Status (7)

Country Link
US (1) US8229043B2 (zh)
EP (2) EP3355469A1 (zh)
JP (2) JP5166599B2 (zh)
KR (2) KR101256772B1 (zh)
CN (1) CN101978596B (zh)
TW (1) TW201004128A (zh)
WO (1) WO2009117708A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9780734B2 (en) 2015-10-06 2017-10-03 Qualcomm Incorporated Noise cancelling baseband amplifier

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8385465B2 (en) * 2008-03-29 2013-02-26 Qualcomm Incorporated Transmitter chain timing and transmit power control
US8620254B2 (en) 2010-02-04 2013-12-31 Cornell University Wireless communication device and system
US8791772B2 (en) * 2010-09-07 2014-07-29 Mks Instruments, Inc. LCL high power combiner
US9431961B2 (en) * 2014-10-29 2016-08-30 Qualcomm Incorporated Phase shifting mixer
IT202000010834A1 (it) * 2020-05-13 2021-11-13 St Microelectronics Srl Circuito di controllo automatico del guadagno, ricevitore, trasmettitore e procedimento corrispondenti

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001094460A (ja) 1999-09-27 2001-04-06 Toshiba Corp 無線装置
GB2360155A (en) 2000-03-07 2001-09-12 Lucent Technologies Inc Switched current sources
US20050124300A1 (en) * 2003-12-04 2005-06-09 Shahla Khorram Low loss diversity antenna T/R switch
US7171184B2 (en) 2004-04-29 2007-01-30 Atheros Communications, Inc. Method and apparatus for a gain controlled mixer
US7177616B2 (en) 2004-08-13 2007-02-13 Freescale Semiconductor, Inc. High linearity and low noise CMOS mixer and signal mixing method
JP2007514349A (ja) 2003-12-10 2007-05-31 テレフオンアクチーボラゲット エル エム エリクソン（パブル） 混合回路の構成
JP2007259416A (ja) 2006-03-22 2007-10-04 Samsung Electro-Mechanics Co Ltd サブハーモニック方式の周波数変換装置
JP2007258861A (ja) 2006-03-22 2007-10-04 Niigata Seimitsu Kk 周波数変換回路
WO2007142341A1 (ja) 2006-06-08 2007-12-13 Panasonic Corporation 離散フィルタ、サンプリングミキサおよび無線装置
US20080211010A1 (en) * 2003-12-03 2008-09-04 Renesas Technology Corp. Semiconductor device

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1220190B (it) * 1987-12-22 1990-06-06 Sgs Thomson Microelectronics Circuito analogico integrato con topologia e caratteristiche intrinseche selezionabili via comando digitale
JP3791115B2 (ja) * 1997-05-09 2006-06-28 ソニー株式会社 高周波増幅回路、送信回路及び受信回路
JP3425426B2 (ja) * 2000-01-31 2003-07-14 松下電器産業株式会社 トランスコンダクタおよびフィルタ回路
US6424222B1 (en) * 2001-03-29 2002-07-23 Gct Semiconductor, Inc. Variable gain low noise amplifier for a wireless terminal
JP3721144B2 (ja) * 2001-05-11 2005-11-30 株式会社東芝 周波数変換器、直交復調器及び直交変調器
JP2003298441A (ja) * 2002-04-01 2003-10-17 Hitachi Ltd 低消費電力受信装置
JP2004165961A (ja) * 2002-11-13 2004-06-10 Matsushita Electric Ind Co Ltd ミキサ回路
JP2007221402A (ja) * 2006-02-16 2007-08-30 Fujitsu Ltd 可変利得増幅器及びその半導体集積装置
WO2007105282A1 (ja) * 2006-03-10 2007-09-20 Fujitsu Limited ゲイン可変増幅器
JP4719044B2 (ja) * 2006-03-22 2011-07-06 株式会社東芝 増幅回路

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001094460A (ja) 1999-09-27 2001-04-06 Toshiba Corp 無線装置
GB2360155A (en) 2000-03-07 2001-09-12 Lucent Technologies Inc Switched current sources
US20080211010A1 (en) * 2003-12-03 2008-09-04 Renesas Technology Corp. Semiconductor device
US20050124300A1 (en) * 2003-12-04 2005-06-09 Shahla Khorram Low loss diversity antenna T/R switch
JP2007514349A (ja) 2003-12-10 2007-05-31 テレフオンアクチーボラゲット エル エム エリクソン（パブル） 混合回路の構成
US7171184B2 (en) 2004-04-29 2007-01-30 Atheros Communications, Inc. Method and apparatus for a gain controlled mixer
US7177616B2 (en) 2004-08-13 2007-02-13 Freescale Semiconductor, Inc. High linearity and low noise CMOS mixer and signal mixing method
JP2007259416A (ja) 2006-03-22 2007-10-04 Samsung Electro-Mechanics Co Ltd サブハーモニック方式の周波数変換装置
JP2007258861A (ja) 2006-03-22 2007-10-04 Niigata Seimitsu Kk 周波数変換回路
WO2007142341A1 (ja) 2006-06-08 2007-12-13 Panasonic Corporation 離散フィルタ、サンプリングミキサおよび無線装置
EP2031756A1 (en) 2006-06-08 2009-03-04 Panasonic Corporation Discrete filter, sampling mixer, and radio device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
International Search Report and Written Opinion-PCT/US2009/037885, International Searching Authority-European Patent Office, Jul. 10, 2009.
International Search Report and Written Opinion—PCT/US2009/037885, International Searching Authority—European Patent Office, Jul. 10, 2009.

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9780734B2 (en) 2015-10-06 2017-10-03 Qualcomm Incorporated Noise cancelling baseband amplifier
US10305431B2 (en) 2015-10-06 2019-05-28 Qualcomm Incorporated Noise cancelling baseband amplifier

Also Published As

Publication number Publication date
CN101978596A (zh) 2011-02-16
JP5166599B2 (ja) 2013-03-21
KR101203440B1 (ko) 2012-11-21
EP2281338B1 (en) 2019-08-07
KR101256772B1 (ko) 2013-04-25
JP2013048467A (ja) 2013-03-07
EP3355469A1 (en) 2018-08-01
TW201004128A (en) 2010-01-16
CN101978596B (zh) 2013-09-18
KR20120089761A (ko) 2012-08-13
EP2281338A1 (en) 2011-02-09
WO2009117708A1 (en) 2009-09-24
KR20100136515A (ko) 2010-12-28
US20090238313A1 (en) 2009-09-24
JP5684215B2 (ja) 2015-03-11
JP2011517527A (ja) 2011-06-09

Similar Documents

Publication Publication Date Title
US8149955B2 (en) Single ended multiband feedback linearized RF amplifier and mixer with DC-offset and IM2 suppression feedback loop
US9209910B2 (en) Blocker filtering for noise-cancelling receiver
TWI360941B (en) Adaptive-biased mixer
US8095103B2 (en) Upconverter and downconverter with switched transconductance and LO masking
US8041327B2 (en) Wideband resistive input mixer with noise-cancelled impedance
US7263344B2 (en) Method for reducing IM2 noise in a down conversion circuit
US8229043B2 (en) Stepped gain mixer
US9344124B2 (en) Jammer resistant noise cancelling receiver front end
US6847808B2 (en) Ultra-high linearity RF passive mixer
US8761703B2 (en) Variable-gain mixer for a wireless receiver with current compensation
CN104467686A (zh) 一种低功耗、低噪声的混频器
US10008987B1 (en) Switch and matching noise cancelling for switch low noise amplifier
US10305517B1 (en) Current-mode filtering with switching
GB2438082A (en) Active and passive dual local oscillator mixers comprising triple gate mixer circuits or exclusive NOR switch (XNOR-SW) circuits.
US20180183636A1 (en) Methods and apparatus for efficient low-if receivers
Lolis et al. A discrete-time double-quadrature low-IF receiver for multi-standard and multi-carrier applications
Yoon Multi-standard receiver for bluetooth and WLAN applications
Kampe et al. A DVB-H receiver architecture
Vidojkovic et al. Front-end architecture selection
Alink et al. CMOS RF Transceiver Considerations for DSA
Newman et al. A WiMax Double Downconversion IF Sampling Receiver Design
Chen et al. TRANSCEIVER ARCHITECTURE DESIGN
Saari et al. Overview of Analog Baseband Filters in Radio Receivers

Legal Events

Date Code Title Description
AS Assignment

Owner name: QUALCOMM INCORPORATED, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WANG, XINWEI;ZHANG, XIANGDONG;REEL/FRAME:020686/0210

Effective date: 20080307

STCF Information on status: patent grant

Free format text: PATENTED CASE

FPAY Fee payment

Year of fee payment: 4

IPR Aia trial proceeding filed before the patent and appeal board: inter partes review

Free format text: TRIAL NO: IPR2018-01429

Opponent name: INTEL CORPORATION AND APPLE INC.

Effective date: 20180727

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 8

STCV Information on status: appeal procedure

Free format text: APPLICATION INVOLVED IN COURT PROCEEDINGS

IPRC Trial and appeal board: inter partes review certificate

Kind code of ref document: K1

Free format text: INTER PARTES REVIEW CERTIFICATE; TRIAL NO. IPR2018-01429, JUL. 27, 2018 INTER PARTES REVIEW CERTIFICATE FOR PATENT 8,229,043, ISSUED JUL. 24, 2012, APPL. NO. 12/053,371, MAR. 21, 2008 INTER PARTES REVIEW CERTIFICATE ISSUED SEP. 29, 2022

Effective date: 20220929

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 12TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1553); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 12