IT1220190B - Circuito analogico integrato con topologia e caratteristiche intrinseche selezionabili via comando digitale - Google Patents

Circuito analogico integrato con topologia e caratteristiche intrinseche selezionabili via comando digitale

Info

Publication number
IT1220190B
IT1220190B IT83684/87A IT8368487A IT1220190B IT 1220190 B IT1220190 B IT 1220190B IT 83684/87 A IT83684/87 A IT 83684/87A IT 8368487 A IT8368487 A IT 8368487A IT 1220190 B IT1220190 B IT 1220190B
Authority
IT
Italy
Prior art keywords
topology
digital control
analog circuit
via digital
intrinsic characteristics
Prior art date
Application number
IT83684/87A
Other languages
English (en)
Other versions
IT8783684A0 (it
Inventor
Vincenzo Daniele
Marco Maria Monti
Michele Taliercio
Piero Capocelli
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT83684/87A priority Critical patent/IT1220190B/it
Publication of IT8783684A0 publication Critical patent/IT8783684A0/it
Priority to EP88830554A priority patent/EP0322382B1/en
Priority to US07/287,299 priority patent/US4875020A/en
Priority to DE3851423T priority patent/DE3851423T2/de
Priority to JP63324698A priority patent/JPH024001A/ja
Application granted granted Critical
Publication of IT1220190B publication Critical patent/IT1220190B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06J—HYBRID COMPUTING ARRANGEMENTS
    • G06J1/00—Hybrid computing arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Automation & Control Theory (AREA)
  • Evolutionary Computation (AREA)
  • Fuzzy Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Control Of Amplification And Gain Control (AREA)
IT83684/87A 1987-12-22 1987-12-22 Circuito analogico integrato con topologia e caratteristiche intrinseche selezionabili via comando digitale IT1220190B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT83684/87A IT1220190B (it) 1987-12-22 1987-12-22 Circuito analogico integrato con topologia e caratteristiche intrinseche selezionabili via comando digitale
EP88830554A EP0322382B1 (en) 1987-12-22 1988-12-21 Analog integrated circuit having intrinsic topologies and characteristics selectable by a digital control
US07/287,299 US4875020A (en) 1987-12-22 1988-12-21 Analog integrated circuit having intrinsic topologies and characteristics selectable by a digital control
DE3851423T DE3851423T2 (de) 1987-12-22 1988-12-21 Analog integrierte Schaltung mit durch digitale Steuerung auswählbaren Eigentopologien und Kennzeichen.
JP63324698A JPH024001A (ja) 1987-12-22 1988-12-22 デジタルコントロールにより選択可能な固有のトポロジと特性を有するアナログ集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT83684/87A IT1220190B (it) 1987-12-22 1987-12-22 Circuito analogico integrato con topologia e caratteristiche intrinseche selezionabili via comando digitale

Publications (2)

Publication Number Publication Date
IT8783684A0 IT8783684A0 (it) 1987-12-22
IT1220190B true IT1220190B (it) 1990-06-06

Family

ID=11323801

Family Applications (1)

Application Number Title Priority Date Filing Date
IT83684/87A IT1220190B (it) 1987-12-22 1987-12-22 Circuito analogico integrato con topologia e caratteristiche intrinseche selezionabili via comando digitale

Country Status (5)

Country Link
US (1) US4875020A (it)
EP (1) EP0322382B1 (it)
JP (1) JPH024001A (it)
DE (1) DE3851423T2 (it)
IT (1) IT1220190B (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5202687A (en) * 1991-06-12 1993-04-13 Intellectual Property Development Associates Of Connecticut Analog to digital converter
EP0705465B1 (de) * 1993-06-25 1996-10-30 Fraunhofer-Gesellschaft Zur Förderung Der Angewandten Forschung E.V. Konfigurierbares, analoges und digitales array
WO1995032481A1 (en) * 1994-05-24 1995-11-30 Imp, Inc. Integrated circuit having programmable analog modules with configurable interconnects between them
USRE42250E1 (en) 1994-12-29 2011-03-29 Stmicroelectronics, Inc. Delay circuit and method
US5936451A (en) * 1994-12-29 1999-08-10 Stmicroeletronics, Inc. Delay circuit and method
US5813993A (en) * 1996-04-05 1998-09-29 Consolidated Research Of Richmond, Inc. Alertness and drowsiness detection and tracking system
US6144327A (en) 1996-08-15 2000-11-07 Intellectual Property Development Associates Of Connecticut, Inc. Programmably interconnected programmable devices
US5875250A (en) * 1998-02-02 1999-02-23 Kuo; Mark Single package three channel audio signal amplifier
US6020785A (en) * 1998-10-23 2000-02-01 Maxim Integrated Products, Inc. Fixed gain operational amplifiers
US6701340B1 (en) 1999-09-22 2004-03-02 Lattice Semiconductor Corp. Double differential comparator and programmable analog block architecture using same
US6362684B1 (en) 2000-02-17 2002-03-26 Lattice Semiconductor Corporation Amplifier having an adjust resistor network
US6424209B1 (en) 2000-02-18 2002-07-23 Lattice Semiconductor Corporation Integrated programmable continuous time filter with programmable capacitor arrays
US6583652B1 (en) 2001-06-01 2003-06-24 Lattice Semiconductor Corporation Highly linear programmable transconductor with large input-signal range
US6717451B1 (en) 2001-06-01 2004-04-06 Lattice Semiconductor Corporation Precision analog level shifter with programmable options
US6806771B1 (en) 2001-06-01 2004-10-19 Lattice Semiconductor Corp. Multimode output stage converting differential to single-ended signals using current-mode input signals
WO2007087669A1 (en) * 2006-01-31 2007-08-09 Christopher Thomas Programmable analog circuit with control logic and microprocessor
US8929840B2 (en) 2007-09-14 2015-01-06 Qualcomm Incorporated Local oscillator buffer and mixer having adjustable size
US8019310B2 (en) * 2007-10-30 2011-09-13 Qualcomm Incorporated Local oscillator buffer and mixer having adjustable size
US8229043B2 (en) * 2008-03-21 2012-07-24 Qualcomm Incorporated Stepped gain mixer
CN102210988B (zh) * 2010-12-29 2013-04-24 厦门松霖科技有限公司 一种起泡器

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3634659A (en) * 1965-10-23 1972-01-11 Adage Inc Hybrid computer using a digitally controlled attenuator
US3870967A (en) * 1972-05-22 1975-03-11 Motorola Inc Method and apparatus for adjustment of offset voltage of a differential amplifier
US4209753A (en) * 1978-10-27 1980-06-24 Kepco, Inc. Amplifier programmable in gain and output polarity
US4551685A (en) * 1982-10-25 1985-11-05 Kerns Jr David V Programmable gain feedback amplifier
US4641108A (en) * 1985-10-16 1987-02-03 Raytheon Company Configurable analog integrated circuit

Also Published As

Publication number Publication date
EP0322382B1 (en) 1994-09-07
DE3851423D1 (de) 1994-10-13
IT8783684A0 (it) 1987-12-22
EP0322382A2 (en) 1989-06-28
US4875020A (en) 1989-10-17
DE3851423T2 (de) 1995-01-19
EP0322382A3 (en) 1991-05-29
JPH024001A (ja) 1990-01-09

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227