US20090011608A1 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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US20090011608A1
US20090011608A1 US12/116,940 US11694008A US2009011608A1 US 20090011608 A1 US20090011608 A1 US 20090011608A1 US 11694008 A US11694008 A US 11694008A US 2009011608 A1 US2009011608 A1 US 2009011608A1
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layer
oxygen
oxide
high dielectric
forming
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Toshihide Nabatame
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Renesas Technology Corp
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Renesas Technology Corp
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Assigned to RENESAS TECHNOLOGY CORP. reassignment RENESAS TECHNOLOGY CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NABATAME, TOSHIHIDE
Publication of US20090011608A1 publication Critical patent/US20090011608A1/en
Priority to US12/752,828 priority Critical patent/US8168547B2/en
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Definitions

  • the present invention relates to a technology for manufacturing a semiconductor device. More particularly, it relates to a technology effectively applied to the manufacture of a semiconductor device provided with a MIS (Metal Insulator Semiconductor) transistor having a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide (SiO 2 ).
  • MIS Metal Insulator Semiconductor
  • oxides typified by hafnium-based oxides such as Hf—O, Hf—Si—O, Hf—Si—O—N, Hf—Al—O, and Hf—Al—O—N have been studied.
  • Patent Document 1 Japanese Patent Application Laid-Open Publication No. 2006-080133
  • Patent Document 2 Japanese Patent Application Laid-Open Publication No. 2006-310801
  • Patent Document 1 The main subject of Japanese Patent Application Laid-Open Publication No. 2006-080133 (Patent Document 1) is to form a gate insulating film by using hafnium oxide which is a high dielectric material and form gate electrodes of an n channel MIS transistor and a p channel MIS transistor by using gate electrode materials suitable for the respective work functions as a whole, and metal materials are used therein for achieving the main subject.
  • the Patent Document 1 does not describe the aspect of capping the high dielectric film forming the gate insulating film.
  • Patent Document 2 The main subject of Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2) is to solve a problem of trapping which occurs at an interface between a high dielectric film and a polysilicon film forming a gate electrode as a whole, and the gate insulating film is capped by an intermediate layer (so-called buffer layer) before forming the gate electrode for achieving the main subject.
  • a gate insulating film made of oxide such as hafnium-based oxide as a high dielectric material is deposited on a semiconductor substrate by Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), or sputtering.
  • ALD Atomic Layer Deposition
  • CVD Chemical Vapor Deposition
  • sputtering since impurities such as carbon generated from a raw material and impurities such as OH generated from H 2 O oxidant remain in a film deposited in this manner, a density of the film becomes relatively low, so that a dielectric constant thereof is lowered.
  • an oxide film formed by the rapid heat treatment in the non-oxidation atmosphere has sufficient densification, such an oxide film has oxygen deficiency which can be one of the defect sites to cause the deterioration of transistor characteristics such as mobility.
  • an oxide film formed by the heat treatment in the oxygen atmosphere can suppress the oxygen deficiency in the heat treatment, oxygen diffuses in the oxide to reach a silicon substrate and form an interface silicon oxide layer, and as a result, the capacitance of an equivalent silicon oxide thickness is increased.
  • An object of the present invention is to provide a technology capable of improving the transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide.
  • Another object of the present invention is to provide a technology capable of achieving the high dielectric constant of an oxide film, the reduction of oxygen deficiency in the oxide film, and the suppression of the interface silicon oxide growth.
  • a high dielectric layer made of oxide whose relative dielectric constant is higher than that of silicon oxide is formed on a main surface of a semiconductor substrate.
  • the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere.
  • an oxygen supplying layer made of oxide having an oxygen proportion higher than that in the high dielectric layer just after the step (b) is formed on the high dielectric layer.
  • a cap layer made of metal which suppresses diffusion of oxygen is formed on the oxygen supplying layer.
  • the main surface of the semiconductor substrate is heat-treated.
  • the high dielectric layer is densified by the heat treatment at the step (b), the high dielectric layer with a high relative dielectric constant can be obtained. Also, since oxygen in the oxygen supplying layer is supplied to the high dielectric layer by the heat treatment at the step (e), the high dielectric layer in which the oxygen deficiency is reduced can be obtained. In other words, it is possible to obtain the oxide in which the high dielectric constant of an oxide film, the reduction of oxygen deficiency in the oxide film, and the suppression of the interface silicon oxide growth can be achieved.
  • Patent Document 1 Japanese Patent Application Laid-Open Publication No. 2006-080133 (Patent Document 1) and Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2) do not describe the formation of the oxygen supplying layer for supplying oxygen to the high dielectric layer.
  • the cap layer is not used as an intermediate layer (so-called buffer layer) for preventing the trapping which occurs at an interface between a gate insulating film and a gate electrode, but it is used for preventing oxygen in the oxygen supplying layer from diffusing into the atmosphere opposite to the high dielectric layer. Since oxygen does not diffuse into the atmosphere owing to the cap layer, oxygen in the oxygen supplying layer is supplied to the high dielectric layer.
  • the embodiment it is possible to improve the transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide.
  • FIG. 1 is a cross-sectional view showing a semiconductor device in a manufacturing process according to a first embodiment of the present invention
  • FIG. 2 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 1 ;
  • FIG. 3 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 2 ;
  • FIG. 4 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 3 ;
  • FIG. 5 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 4 ;
  • FIG. 6 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 5 ;
  • FIG. 7 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 6 ;
  • FIG. 8 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 7 ;
  • FIG. 9 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 8 ;
  • FIG. 10 is a graph showing the content of residual OH group relative to a thickness of a hafnium oxide film deposited by ALD;
  • FIG. 11 is a table showing the comparison between the transistor characteristics of an n channel MIS transistor (Qn) according to the first embodiment and the transistor characteristics of an n channel MIS transistor (Q′n) studied by the inventor of the present invention.
  • FIG. 12 is a graph showing the content of OH group contained in various oxides deposited by ALD in a second embodiment of the present invention.
  • FIG. 1 to FIG. 9 are cross-sectional views schematically showing a semiconductor device in a manufacturing process, in which FIG. 2 to FIG. 6 show a principal part of the semiconductor device in an enlarged manner.
  • a p channel MIS transistor has an opposite polarity to that of an n channel MIS transistor, and the present invention can also be applied to a manufacturing method of a p channel MIS transistor.
  • element isolation trenches ID are first formed in a main surface (element formation surface) of a semiconductor substrate (hereinafter, referred to as substrate) SUB made of, for example, p type single crystal silicon by the well-known STI (Shallow Trench Isolation) technique.
  • substrate semiconductor substrate
  • STI Shallow Trench Isolation
  • boron is ion-implanted in an n channel MIS transistor formation region of the substrate SUB
  • an impurity for adjusting a threshold voltage of the MIS transistor is ion-implanted.
  • the impurity is diffused in the substrate SUB, thereby forming a p well PW in the main surface of the substrate SUB.
  • wet etching solution such as hydrofluoric acid
  • a high dielectric layer HK 1 made of oxide whose relative dielectric constant is higher than that of silicon oxide is formed on the interface layer IL.
  • the high dielectric layer HK 1 forms a gate insulating film of an n channel MIS transistor, and it is made of, for example, hafnium oxide (HfO 2 ).
  • the interface layer IL is provided for reducing the defect generated when the high dielectric layer HK 1 (hafnium oxide) is directly formed on the substrate SUB (single crystal silicon). Also, since the interface layer IL is included in the gate insulating film, it is preferable to reduce the film thickness of the interface layer IL as far as possible in order to obtain a gate insulating film with a high relative dielectric constant.
  • the silicon oxide (SiO 2 ) forming the interface layer IL is formed by performing the high temperature thermal oxidation to the main surface of the substrate SUB at 950° C. or higher, and a film thickness of the silicon oxide is, for example, 0.3 nm.
  • hafnium oxide (HfO 2 ) forming the high dielectric film HK 1 is deposited by Atomic Layer Deposition (ALD) using, for example, an O (oxygen) material of H 2 O (water) and an Hf (hafnium) material of TDMAH (Tetrakis-Dimethylamido-Hafnium: Hf(NMe 2 ) 4 ), and a film thickness thereof is, for example, 2.4 nm.
  • ALD Atomic Layer Deposition
  • oxides such as Hf—Si—O, Hf—Si—O—N, Hf—Al—O, Hf—Al—O—N, Hf—Ta—O, Hf—Ti—O, Hf—La—O, Hf—Y—O, Hf—Ta—Si—O, Hf—Ti—Si—O, Hf—La—Si—O and Hf—Y—Si—O can be applied as the high dielectric layer HK 1 other than hafnium oxide (Hf—O).
  • a material containing oxygen (O) and hafnium (Hf) and having relative dielectric constant higher than that of silicon oxide (SiO 2 ) is referred to as “hafnium-based oxide”.
  • TDMAS Trisdimethlaminosilane: HSi(NMe 2 ) 3
  • Si silicon
  • TMA Trimethylaluminum: AlMe 3
  • TAIDEAT tertiaryamylimidotris (dimethlamido) tantalum: EtMe 2 CNTa(NMe 2 ) 3
  • Ta tantalum
  • TDMAT Tetrakisdimethylaminotitanium: Ti(NMe 2 ) 3
  • Ti(NMe 2 ) 3 Ti (titanium) material.
  • Trisethylcyclopentadienylyttrium Y(EtCp) 3 is used as a Y (yttrium) material.
  • Trisethylcyclopentadienyllanthanum La(EtCp) 3 is used as an La (lanthanum) material.
  • the nitridation of Hf—Si—O—N and Hf—Al—O—N is fabricated by the nitridation by the plasma nitrogen and the nitridation by the heat treatment using ammonia gas after depositing an Hf—Si—O film or an Hf—Al—O film by the ALD.
  • the ALD is used for the formation of the high dielectric layer HK 1 , but the formation method of the high dielectric layer HK 1 is not limited to this and the high dielectric layer HK 1 can be formed by sputtering and CVD. Note that the oxygen supplying layer is formed at a later step by depositing the hafnium-based oxide, and the hafnium-based oxide is deposited by the ALD, not by the sputtering or CVD.
  • the main surface of the substrate SUB is heat-treated in a non-oxidation atmosphere (for example, nitrogen, hydrogen, argon or the like) where an oxygen concentration is ppm (parts per million) or less in a temperature range of 600° C. to 1000° C.
  • a non-oxidation atmosphere for example, nitrogen, hydrogen, argon or the like
  • an oxygen concentration is ppm (parts per million) or less in a temperature range of 600° C. to 1000° C.
  • the high dielectric layer HK 1 is densified at this step.
  • the heat treatment for densifying the high dielectric layer HK 1 is referred to as “densification annealing” in the present invention.
  • the formation of Si—O bonding at the interface of a substrate SUB can be prevented.
  • the densification annealing is performed in an atmosphere containing oxygen (O)
  • external oxygen diffuses in the high dielectric layer HK 1 made of hafnium oxide and reaches the substrate SUB made of single crystal silicon, thereby forming Si—O bonding at an interface between the high dielectric layer HK 1 and the substrate SUB made of single crystal silicon.
  • a part of the gate insulating film changes to a silicon oxide film.
  • the interface layer IL made of silicon oxide becomes thick, so that the dielectric constant of the gate insulating film lowers. Therefore, by performing the densification annealing in the non-oxidation atmosphere, the formation of Si—O bonding at an interface can be prevented.
  • the high dielectric layer HK 1 can be densified without increasing the film thickness of the interface layer IL made of silicon oxide.
  • FIG. 3 shows the case where the lost oxygen is discharged in the atmosphere, and oxygen deficient portions DP are generated in the high dielectric layer HK 1 . Note that the process for reducing the oxygen deficient portions DP is performed at a step (oxygen supplying annealing step) described later.
  • an oxygen supplying layer HK 2 made of oxide having an oxygen proportion higher than that in the high dielectric layer HK 1 just after the densification annealing is formed.
  • a hafnium-based oxide film deposited by the ALD using an O (oxygen) material of H 2 O and an Hf (hafnium) material of TDMAH (Hf(NMe 2 ) 4 ) may be applied.
  • an atomic layer is deposited one by one on the substrate SUB placed in a chamber by repeating a cycle comprising the absorption of molecules of raw material compound by each monolayer, the film formation by the reaction thereof, the removal of excessive molecules by purge, the film formation by the reaction with H 2 O oxidant, and the removal of excessive molecules by purge. Therefore, a film thickness of the oxygen supplying layer HK 2 made of a hafnium-based oxide film can be controlled by the number of cycles.
  • the hafnium-based oxide film deposited by the ALD quantitatively contains residual OH group. Therefore, a proportion of oxygen in the hafnium-based oxide film (oxygen supplying layer HK 2 ) is higher than that in the hafnium-based oxide film (high dielectric layer HK 1 ) just after the densification annealing in which oxygen deficiency has occurred.
  • the residual oxygen functions to supplement (supply) the oxygen lost in the high dielectric layer HK 1 at a step described later.
  • the oxygen supplying layer HK 2 functions as an oxygen supplying source, and an absolute supplying amount of oxygen can be adjusted by the film thickness of the oxygen supplying layer HK 2 . Therefore, the ALD which can control the film thickness in an atomic level is effective for the formation of the oxygen supplying layer HK 2 .
  • the hafnium oxide film deposited by the ALD contains residual OH group of about 0.5%.
  • FIG. 10 shows the content of residual OH group relative to a thickness of a hafnium oxide film deposited by the ALD.
  • the absolute supplying amount is adjusted by the film thickness of the oxygen supplying layer HK 2 made of hafnium oxide deposited by the ALD so that oxygen can be sufficiently supplied to the high dielectric layer HK 1 in which the oxygen deficiency has occurred due to the densification annealing.
  • the film thickness of the oxygen supplying layer HK 2 made of a hafnium oxide film deposited by the ALD is adjusted to, for example, 4 ⁇ .
  • the sputtering and the CVD are known in addition to the ALD.
  • oxygen in the deposited film does not become excessive, so that the oxygen supplying layer HK 2 having an oxygen proportion higher than that in the high dielectric layer HK 1 just after the densification annealing in which oxygen deficiency has occurred cannot be formed. Therefore, the ALD using H 2 O as a material is used.
  • a cap layer CL made of metal for preventing oxygen from diffusing is formed on the oxygen supplying layer HK 2 .
  • the oxygen supplying layer HK 2 is capped by the cap layer CL.
  • the cap layer CL is made of a metal film (barrier metal film) provided for preventing oxygen from being discharged into atmosphere (forming a barrier) during heat treatment when the main surface of the substrate SUB is heat-treated at a later step (oxygen supplying annealing step).
  • the cap layer CL is made of, for example, tantalum nitride (TaN) formed by sputtering, and a film thickness thereof is, for example, 20 nm.
  • the main surface of the substrate SUB is heat-treated in a temperature range of 950° C. to 1150° C., for example, in nitrogen (N 2 ) atmosphere.
  • nitrogen (N 2 ) atmosphere oxygen remaining in the oxygen supplying layer HK 2 is supplied to the high dielectric layer HK 1 to supplement the oxygen lost from the high dielectric HK 1 .
  • the oxygen deficient portions DP which have occurred due to the densification annealing described with reference to FIG. 3 are reduced.
  • the heat treatment for supplying oxygen to the high dielectric layer HK 1 is referred to as “oxygen supplying annealing”.
  • the high dielectric layer HK 1 supplemented with oxygen in this manner forms the gate insulating film GI together with the interface layer IL and the oxygen supplying layer HK 2 .
  • the hafnium-based oxide is used as a material of the oxygen supplying layer HK 2 , but any oxide can be used as long as it has an oxygen proportion higher than that in the high dielectric layer HK 1 just after the densification annealing.
  • the high dielectric layer HK 1 can be densified by the densification annealing, since oxygen is lost from the high dielectric layer HK 1 , the oxygen density of the film is lowered.
  • the higher gate-leakage current flows as compared with the case where a film having a high oxygen density is applied. Therefore, by performing the oxygen supplying annealing to supplement the oxygen lost from the high dielectric layer HK 1 , a film with a high oxygen density can be formed, so that it is possible to suppress the flow of the gate-leakage current.
  • a film thickness of the oxygen supplying layer HK 2 that is, an oxygen supplying amount can be adjusted in the oxygen supplying annealing, oxygen does not reach the interface of the substrate SUB (single crystal silicon), and it is also possible not to increase the thickness of the interface layer IL.
  • both the high dielectric constant and the reduction of the oxygen deficiency of the high dielectric layer HK 1 forming the gate insulating film GI can be achieved.
  • a barrier metal film forming the cap layer CL is patterned to form a gate electrode GE made of the burrier metal film, and the gate insulating film GI other than that under the gate electrode GE is removed. Note that, in the first embodiment, the patterning for forming the gate electrode GE is performed after the oxygen supplying annealing, but it does not matter if the order is reversed.
  • the gate electrode GE is formed by patterning the barrier metal film forming the cap layer CL. Therefore, any barrier metal can be used for the cap layer CL as long as it functions to suppress the diffusion of oxygen and is suitable for the work function of the gate electrode GE.
  • the material of the cap layer CL of the n channel MIS transistor aluminum (Al), titanium (Ti), tantalum (Ta), and the like can be used other than the tantalum nitride.
  • ruthenium (Ru), platinum (Pt), nickel (Ni), and the like can be used as the material of the cap layer CL of the p channel MIS transistor.
  • both the cap layer CL and the gate electrode GE are made of tantalum nitride, but the process is also available in which, after the oxygen supplying annealing is performed using tantalum nitride as the material of the cap layer CL, the tantalum nitride is removed and then the gate electrode GE is formed from a metal material having an optimal work function.
  • n ⁇ semiconductor regions SA 1 are formed to form an LDD (Lightly Doped Drain) structure of the n channel MIS transistor.
  • sidewall spacers SS are formed on the sidewalls of the gate electrode GE.
  • the sidewall spacers SS are formed by depositing a silicon oxide film on the substrate SUB by CVD and then anisotropically etching the silicon oxide film.
  • the heat treatment is performed to the main surface of the substrate SUB to diffuse the impurity, thereby forming n + semiconductor regions (source, drain) SA 2 in the p well PW.
  • the heat treatment FGA: Forming Gas Annealing
  • FGA Forming Gas Annealing
  • FIG. 11 is a table showing the comparison between the transistor characteristics of the n channel MIS transistor according to the first embodiment (Qn in the description in FIG. 11 ) and the transistor characteristics of the n channel MIS transistor which has been studied by the inventor of the present invention (Q′n). Note that the transistor Q′n is manufactured in the same manufacturing process as that of the transistor Qn except that the step of forming the oxygen supplying layer HK 2 (hafnium oxide film with a film thickness of 4 ⁇ deposited by the ALD) is omitted.
  • the oxygen supplying layer HK 2 hafnium oxide film with a film thickness of 4 ⁇ deposited by the ALD
  • the equivalent oxide thicknesses (EOT) of the gate insulating films GI of the transistor Qn and the transistor Q′n are about 1.1 nm and about 1.0 nm, respectively. Therefore, the transistor characteristics of the transistor Qn and the transistor Q′n can be compared.
  • the gate-leakage current (Jg) and the electron mobility ( ⁇ ) between the transistor Qn and the transistor Q′n as the transistor characteristics the gate-leakage current of the transistor Qn is lower by about three orders of magnitude than that of the transistor Q′n, and the electron mobility of the transistor Qn is about two times higher than that of the transistor Q′n.
  • the MIS transistor according to the first embodiment can achieve both the high dielectric constant and the reduction of the oxygen deficiency of the high dielectric layer HK 1 forming the gate insulating film GI by the process including the densification annealing and the oxygen supplying annealing. Also, by forming the MIS transistor having the gate insulating film GI in which the oxygen deficiency has been suppressed, the transistor characteristics can be improved. Further, since the growth of the interface layer IL can be suppressed in the oxygen supplying annealing, a MIS transistor having a gate insulating film GI with the EOT of 1 nm or less can be formed.
  • hafnium-based oxide deposited by the ALD is used in the step of forming the oxygen supplying layer
  • aluminum oxide (Al 2 O 3 ) deposited by the ALD or tantalum oxide (Ta 2 O 5 ) deposited by the ALD is applied to form the oxygen supplying layer
  • the other steps in the second embodiment are similar to those in the first embodiment.
  • the oxygen supplying layer HK 2 functions to supply oxygen to the high dielectric layer HK 1 in the oxygen supplying annealing in order to supplement oxygen lost in the high dielectric layer HK 1 . Therefore, an oxygen supplying layer which has an oxygen concentration (oxygen proportion) higher than that in the high dielectric layer HK 1 just after the densification annealing in which the oxygen deficiency has occurred can be used as the oxygen supplying layer HK 2 . Accordingly, the oxygen supplying layer HK 2 is formed by depositing aluminum oxide (Al 2 O 3 ) or tantalum oxide (Ta 2 O 5 ) by the ALD using an H 2 O as a material.
  • Al 2 O 3 aluminum oxide
  • Ta 2 O 5 tantalum oxide
  • aluminum oxide (Al 2 O 3 ) is deposited by the ALD using, for example, an O (oxygen) material of H 2 O and TMA (Trimethylaluminum: AlMe 3 ) as an Al (aluminum) material.
  • tantalum oxide (Ta 2 O 5 ) is deposited by the ALD using, for example, an O (oxygen) material of H 2 O and TAIDEAT (Tertiaryamylimidotris (dimethlamido) tantalum: EtMe 2 CNTa(NMe 2 ) 3 ) as a Ta (tantalum) material.
  • FIG. 12 is a graph showing the content of OH group contained in aluminum oxide (Al 2 O 3 ) and tantalum oxide (Ta 2 O 5 ) deposited by the ALD.
  • FIG. 12 also shows the content of OH group contained in hafnium oxide (HfO 2 ) used as the oxygen supplying layer HK 2 in the first embodiment.
  • OH group acts as an oxygen supplying source, so that an absolute supplying amount relative to a certain amount of oxygen deficiency in the high dielectric layer HK 1 just after the densification annealing can be adjusted by the film thickness.
  • the film thickness of Ta 2 O 5 containing about 1% of OH group may be about half the thickness of HfO 2 containing about 0.5% of OH group.
  • the high dielectric layer HK 1 can be densified by the densification annealing, since oxygen is lost from the high dielectric layer HK 1 , the oxygen density of the film is lowered. Therefore, by performing the oxygen supplying annealing to supplement the oxygen lost from the high dielectric layer HK 1 , a film with a high oxygen density can be formed, so that it is possible to suppress the flow of the gate-leakage current. In other words, by forming the gate insulating film GI in which the oxygen deficiency has been suppressed, the transistor characteristics can be improved.
  • the hafnium-based oxide has been shown as the material of the high dielectric layer.
  • the high dielectric layer made of aluminum oxide (Al 2 O 3 ), tantalum oxide (Ta 2 OS), titanium oxide (TiO 2 ), lanthanum oxide (La 2 O 3 ), or zirconium oxide (ZrO 2 ) is also available.
  • the oxygen deficiency occurs due to the heat treatment in the high dielectric layer made of aluminum oxide, tantalum oxide, titanium oxide, lanthanum oxide, or zirconium oxide.
  • oxygen in the oxygen supplying layer is supplied to aluminum oxide, tantalum oxide, titanium oxide, lanthanum oxide, and zirconium oxide forming the high dielectric layer, so that both the high dielectric constant of the high dielectric layer and the reduction of the oxygen deficiency in the high dielectric layer can be achieved.
  • the present invention is widely utilized in a manufacture of semiconductor devices. In particular, it is utilized for manufacturing semiconductor devices having excellent transistor characteristics in the 32-nm technology and beyond.

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