TWI732900B - 實現具有延伸出單元邊界的金屬層節段的標準單元的積體電路 - Google Patents

實現具有延伸出單元邊界的金屬層節段的標準單元的積體電路 Download PDF

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Publication number
TWI732900B
TWI732900B TW106123326A TW106123326A TWI732900B TW I732900 B TWI732900 B TW I732900B TW 106123326 A TW106123326 A TW 106123326A TW 106123326 A TW106123326 A TW 106123326A TW I732900 B TWI732900 B TW I732900B
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Taiwan
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metal
edge
unit
cell
boundary
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TW106123326A
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Chinese (zh)
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TW201813050A (zh
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歐密德 羅哈尼
歐恩 柯爾德斯
凱瑞 哈邁爾
羅納德 卡拉
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加拿大商Ａｔｉ科技Ｕｌｃ公司
美商高級微裝置公司
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/20—Configuration CAD, e.g. designing by assembling or positioning modules selected from libraries of predesigned modules
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/968—Macro-architecture
    • H10D84/974—Layout specifications, i.e. inner core regions
    • H10D84/975—Wiring regions or routing

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Physics & Mathematics (AREA)
  • Architecture (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW106123326A 2016-07-12 2017-07-12 實現具有延伸出單元邊界的金屬層節段的標準單元的積體電路 TWI732900B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/207,691 2016-07-12
US15/207,691 US9977854B2 (en) 2016-07-12 2016-07-12 Integrated circuit implementing standard cells with metal layer segments extending out of cell boundary

Publications (2)

Publication Number Publication Date
TW201813050A TW201813050A (zh) 2018-04-01
TWI732900B true TWI732900B (zh) 2021-07-11

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TW106123326A TWI732900B (zh) 2016-07-12 2017-07-12 實現具有延伸出單元邊界的金屬層節段的標準單元的積體電路

Country Status (7)

Country Link
US (1) US9977854B2 (enExample)
EP (1) EP3270414A1 (enExample)
JP (1) JP7015824B2 (enExample)
KR (1) KR102294210B1 (enExample)
CN (1) CN109791930B (enExample)
TW (1) TWI732900B (enExample)
WO (1) WO2018013472A1 (enExample)

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US10691849B2 (en) * 2017-09-28 2020-06-23 Taiwan Semiconductor Manufacturing Co., Ltd. Metal cut optimization for standard cells
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US10784869B2 (en) * 2018-07-16 2020-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit and method of manufacturing the same
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US10997348B2 (en) 2018-09-28 2021-05-04 Taiwan Semiconductor Manufacturing Company Ltd. Metal cut region location method and system
US10769342B2 (en) * 2018-10-31 2020-09-08 Taiwan Semiconductor Manufacturing Company Ltd. Pin access hybrid cell height design
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US11011417B2 (en) 2019-05-31 2021-05-18 International Business Machines Corporation Method and structure of metal cut
US10909297B1 (en) * 2019-08-15 2021-02-02 Taiwan Semiconductor Manufacturing Company Limited Deterministic system for device layout optimization
EP4073677A1 (en) * 2019-12-09 2022-10-19 Synopsys, Inc. Electrical circuit design using cells with metal lines
CN111931450B (zh) * 2020-08-11 2024-09-20 上海华力微电子有限公司 一种集成电路数字后端设计的方法和系统
US11290109B1 (en) * 2020-09-23 2022-03-29 Qualcomm Incorporated Multibit multi-height cell to improve pin accessibility
CN115117052A (zh) 2021-03-18 2022-09-27 三星电子株式会社 提供增加的引脚接入点的集成电路及其设计方法
CN118551721B (zh) * 2024-07-30 2024-10-18 上海聪链信息科技有限公司 N12设计中的防违例绕线方法、装置、设备及存储介质

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Also Published As

Publication number Publication date
KR102294210B1 (ko) 2021-08-27
JP7015824B2 (ja) 2022-02-03
TW201813050A (zh) 2018-04-01
US20180018419A1 (en) 2018-01-18
CN109791930B (zh) 2021-08-27
EP3270414A1 (en) 2018-01-17
JP2019526170A (ja) 2019-09-12
US9977854B2 (en) 2018-05-22
KR20190018542A (ko) 2019-02-22
CN109791930A (zh) 2019-05-21
WO2018013472A1 (en) 2018-01-18

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