KR102294210B1 - 전지 경계로부터 연장되는 금속층 부분을 가진 표준 전지를 구현하는 집적 회로 - Google Patents

전지 경계로부터 연장되는 금속층 부분을 가진 표준 전지를 구현하는 집적 회로 Download PDF

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KR102294210B1
KR102294210B1 KR1020197003688A KR20197003688A KR102294210B1 KR 102294210 B1 KR102294210 B1 KR 102294210B1 KR 1020197003688 A KR1020197003688 A KR 1020197003688A KR 20197003688 A KR20197003688 A KR 20197003688A KR 102294210 B1 KR102294210 B1 KR 102294210B1
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cell
metal
edge
boundary
distance
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KR20190018542A (ko
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오미드 로우하니
이오안 코도스
케리 하멜
도날드 클레이
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에이티아이 테크놀로지스 유엘씨
어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • H01L27/0611—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • H01L27/0207—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/20—Configuration CAD, e.g. designing by assembling or positioning modules selected from libraries of predesigned modules
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/968—Macro-architecture
    • H10D84/974—Layout specifications, i.e. inner core regions
    • H10D84/975—Wiring regions or routing

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1020197003688A 2016-07-12 2017-07-10 전지 경계로부터 연장되는 금속층 부분을 가진 표준 전지를 구현하는 집적 회로 Active KR102294210B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US15/207,691 US9977854B2 (en) 2016-07-12 2016-07-12 Integrated circuit implementing standard cells with metal layer segments extending out of cell boundary
US15/207,691 2016-07-12
EP16205250.0A EP3270414A1 (en) 2016-07-12 2016-12-20 Integrated circuit implementing standard cells with metal layer segments extending out of cell boundary
EP16205250.0 2016-12-20
PCT/US2017/041349 WO2018013472A1 (en) 2016-07-12 2017-07-10 Integrated circuit implementing standard cells with metal layer segments extending out of cell boundary

Publications (2)

Publication Number Publication Date
KR20190018542A KR20190018542A (ko) 2019-02-22
KR102294210B1 true KR102294210B1 (ko) 2021-08-27

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Country Status (7)

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US (1) US9977854B2 (enExample)
EP (1) EP3270414A1 (enExample)
JP (1) JP7015824B2 (enExample)
KR (1) KR102294210B1 (enExample)
CN (1) CN109791930B (enExample)
TW (1) TWI732900B (enExample)
WO (1) WO2018013472A1 (enExample)

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US10691849B2 (en) * 2017-09-28 2020-06-23 Taiwan Semiconductor Manufacturing Co., Ltd. Metal cut optimization for standard cells
US10559558B2 (en) * 2017-09-29 2020-02-11 Taiwan Semiconductor Manufacturing Co., Ltd. Pin modification for standard cells
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TWI681309B (zh) * 2018-05-10 2020-01-01 瑞昱半導體股份有限公司 電子裝置測試資料庫產生方法
US10784869B2 (en) * 2018-07-16 2020-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit and method of manufacturing the same
US10997348B2 (en) * 2018-09-28 2021-05-04 Taiwan Semiconductor Manufacturing Company Ltd. Metal cut region location method and system
DE102019125900B4 (de) 2018-09-28 2022-03-24 Taiwan Semiconductor Manufacturing Co., Ltd. Metallschnittgebiet-positionierungsverfahren und system
US10769342B2 (en) * 2018-10-31 2020-09-08 Taiwan Semiconductor Manufacturing Company Ltd. Pin access hybrid cell height design
KR102539066B1 (ko) * 2018-11-09 2023-06-01 삼성전자주식회사 서로 다른 타입의 셀들을 포함하는 집적 회로, 그 설계 방법 및 설계 시스템
US11011417B2 (en) 2019-05-31 2021-05-18 International Business Machines Corporation Method and structure of metal cut
US10909297B1 (en) * 2019-08-15 2021-02-02 Taiwan Semiconductor Manufacturing Company Limited Deterministic system for device layout optimization
EP4073677A1 (en) * 2019-12-09 2022-10-19 Synopsys, Inc. Electrical circuit design using cells with metal lines
CN111931450B (zh) * 2020-08-11 2024-09-20 上海华力微电子有限公司 一种集成电路数字后端设计的方法和系统
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CN115117052A (zh) 2021-03-18 2022-09-27 三星电子株式会社 提供增加的引脚接入点的集成电路及其设计方法
CN118551721B (zh) * 2024-07-30 2024-10-18 上海聪链信息科技有限公司 N12设计中的防违例绕线方法、装置、设备及存储介质

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CN109791930B (zh) 2021-08-27
TWI732900B (zh) 2021-07-11
EP3270414A1 (en) 2018-01-17
WO2018013472A1 (en) 2018-01-18
TW201813050A (zh) 2018-04-01
JP2019526170A (ja) 2019-09-12
CN109791930A (zh) 2019-05-21
JP7015824B2 (ja) 2022-02-03
US20180018419A1 (en) 2018-01-18
US9977854B2 (en) 2018-05-22
KR20190018542A (ko) 2019-02-22

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