TWI703645B - 焊接接頭、及焊接接頭的形成方法 - Google Patents

焊接接頭、及焊接接頭的形成方法 Download PDF

Info

Publication number
TWI703645B
TWI703645B TW107138513A TW107138513A TWI703645B TW I703645 B TWI703645 B TW I703645B TW 107138513 A TW107138513 A TW 107138513A TW 107138513 A TW107138513 A TW 107138513A TW I703645 B TWI703645 B TW I703645B
Authority
TW
Taiwan
Prior art keywords
metal layer
joint according
intermetallic compound
layer
alloy
Prior art date
Application number
TW107138513A
Other languages
English (en)
Other versions
TW201923913A (zh
Inventor
上島稔
立花芳恵
Original Assignee
日商千住金屬工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商千住金屬工業股份有限公司 filed Critical 日商千住金屬工業股份有限公司
Publication of TW201923913A publication Critical patent/TW201923913A/zh
Application granted granted Critical
Publication of TWI703645B publication Critical patent/TWI703645B/zh

Links

Images

Classifications

    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16BDEVICES FOR FASTENING OR SECURING CONSTRUCTIONAL ELEMENTS OR MACHINE PARTS TOGETHER, e.g. NAILS, BOLTS, CIRCLIPS, CLAMPS, CLIPS OR WEDGES; JOINTS OR JOINTING
    • F16B5/00Joining sheets or plates, e.g. panels, to one another or to strips or bars parallel to them
    • F16B5/08Joining sheets or plates, e.g. panels, to one another or to strips or bars parallel to them by means of welds or the like
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262Sn as the principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0008Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0008Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0016Brazing of electronic components
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/008Soldering within a furnace
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/20Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
    • B23K1/203Fluxing, i.e. applying flux onto surfaces
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/20Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
    • B23K1/206Cleaning
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C13/00Alloys based on tin
    • C22C13/02Alloys based on tin with antimony or bismuth as the next major constituent
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C19/00Alloys based on nickel or cobalt
    • C22C19/03Alloys based on nickel or cobalt based on nickel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4827Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00Articles made by soldering, welding or cutting
    • B23K2101/36Electric or electronic devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00Articles made by soldering, welding or cutting
    • B23K2101/36Electric or electronic devices
    • B23K2101/42Printed circuits
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • B23K35/025Pastes, creams, slurries
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/034Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/03444Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
    • H01L2224/0345Physical vapour deposition [PVD], e.g. evaporation, or sputtering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/034Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/0346Plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05073Single internal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05075Plural internal layers
    • H01L2224/0508Plural internal layers being stacked
    • H01L2224/05082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05075Plural internal layers
    • H01L2224/0508Plural internal layers being stacked
    • H01L2224/05083Three-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05075Plural internal layers
    • H01L2224/0508Plural internal layers being stacked
    • H01L2224/05084Four-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05124Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05139Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05155Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05166Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05171Chromium [Cr] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05172Vanadium [V] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05611Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05639Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05655Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/29294Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325Material
    • H01L2224/32501Material at the bonding interface
    • H01L2224/32503Material at the bonding interface comprising an intermetallic compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325Material
    • H01L2224/32505Material outside the bonding interface, e.g. in the bulk of the layer connector
    • H01L2224/32507Material outside the bonding interface, e.g. in the bulk of the layer connector comprising an intermetallic compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009Pre-treatment of the layer connector or the bonding area
    • H01L2224/83022Cleaning the bonding area, e.g. oxide removal step, desmearing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009Pre-treatment of the layer connector or the bonding area
    • H01L2224/83024Applying flux to the bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009Pre-treatment of the layer connector or the bonding area
    • H01L2224/83048Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053Bonding environment
    • H01L2224/83054Composition of the atmosphere
    • H01L2224/83065Composition of the atmosphere being reducing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053Bonding environment
    • H01L2224/83054Composition of the atmosphere
    • H01L2224/83075Composition of the atmosphere being inert
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/83204Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/8321Applying energy for connecting using a reflow oven
    • H01L2224/83211Applying energy for connecting using a reflow oven with a graded temperature profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83455Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • H01L2224/8381Soldering or alloying involving forming an intermetallic compound at the bonding interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • H01L2224/83815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3512Cracking

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

藉由抑制焊接接頭的形成時的背部金屬與焊接合金的剝離,並抑制焊接合金的不浸潤、溶融焊接的飛散、及晶片破裂造成的電子部件的破損,提供信賴性佳的焊接接頭、及焊接接頭的形成方法。焊接接頭將具備背部金屬的電子部件與基板藉由焊接合金接合。焊接合金具備:具有由質量%為Ag:2~4%、Cu:0.6~2%、Sb:9.0~12%、Ni:0.005~1%、及殘留部為Sn所構成的合金組成的焊接合金層、Sn-Sb金屬間化合物相、背部金屬側金屬間化合物層、基板側金屬間化合物層。在Sn-Sb金屬間化合物相與背部金屬側金屬間化合物層之間、及Sn-Sb金屬間化合物相與基板側金屬間化合物層之間的至少一者介在著焊接合金層。

Description

焊接接頭、及焊接接頭的形成方法
本發明係有關於抑制電子部件的背部金屬的剝離的焊接接頭、及焊接接頭的形成方法。
近年,電子機器要求高積體化、大容量化、高速化。為了對應該要求,使用以QFP(Quad Flat Package)為代表的半導體封裝達到在半導體晶片等級的高積體化、高機能化。在QFP的製造中,採用將從矽晶圓切取出的矽晶片晶粒接合至導線框的封裝製程。
在QFP中,藉由該封裝製程,矽晶片與導線框藉由焊接合金進行晶粒接合形成焊接接頭。在矽晶片,為了改善與焊料的浸潤性並使密著強度提升,形成Ni層等背部金屬。但是,因為溶融焊料時的熱,Ni會向Si擴散而造成半導體晶片的機能降低,故在矽晶片與Ni層之間形成Ti層等阻障層。因此,背部金屬層變多層的話,會有背部金屬層間的剝離、及背部金屬與焊接合金的剝離發生。其中,為了抑制該等剝離,關於背部金屬層進行各種檢討。
在專利文獻1中,為了抑制空隙的發生並且改善焊接合金的浸潤性而得到良好的接合特性,揭示在矽晶片具備:由包含Cr或V的層與Ni層構成的第1的金屬被膜、包含Sn或Sb的第2金屬被膜(金屬層),作為接合矽晶片與基板的焊接合金,採用以Sn為主成分,並使Sb以10重量%以上含有的合金。
又,在專利文獻2中,為了防止金屬間化合物的生成造成的界面的破壞,提案有在矽晶片設置Cr及Ti等的金屬層(阻障層),具有將阻障層與Sn及Sb作為主成分的焊材直接固著的黏接構造的半導體裝置。又,在專利文獻2中,記載有即便為了使與焊接合金的密著強度提升而在阻障層與焊接合金之間設置Ni層及Ag層等的中間層,該中間相也會消失而不會生成與Sn的金屬間化合物相,金屬間化合物相的生成與選擇性地破壞不會發生。
因此,在從前的晶粒接合中,在使用Sn-Sb系焊接合金的前提下,進行了關於背部金屬的各種檢討。在該等檢討中使用Sn-Sb合金是因為該合金的液相線溫度高,是為了讓用於晶粒接合的焊接合金實裝至印刷基板等時不會溶融。但是,即便藉由Sb的多量添加而讓焊接合金的液相線溫度提升,將矽晶片實際裝至印刷基板時,因為加熱溫度到達焊接合金的液相線溫度附近的溫度域,會有焊接合金軟質化、焊接接頭的電阻值變化的情形。
在這裡,例如於專利文獻3中,提示了在晶片接合後的電極部接合中,因為藉由使耐熱疲勞性能提升而抑制加熱時的電阻變化,在Sn中,含有:Fe及Ni的至少1種為0.005~5.0質量%、還有Ag:0.1~20質量%及Cu:0.005~9質量%的至少1種,並使Sb以0.1~15質量%含有的焊接合金的技術。 [先前技術文獻] [專利文獻]
[專利文獻1] 特開2001-196393公報 [專利文獻2] 特開平6-244226公報 [專利文獻3] 特開2001-144111公報
但是,如同專利文獻1及專利文獻2所記載的,即便使用液相線溫度高的Sn-Sb系焊接合金,若將Ni層層積於阻障層的話,當焊接合金的溶融時Ni會有擴散至焊接合金並消失的情形。此時,因為阻障層會與焊接合金接觸,焊接合金難以浸潤阻障層,在阻障層與焊接合金的界面會有發生剝離的情形。接著,這是在晶粒接合時可能引起的問題點。另一方面,專利文獻3記載的發明,是以在晶片接合後的電極部接合中抑制加熱時的電阻變化為目的。因此,專利文獻1及2記載的發明與專利文獻3記載的發明,因為其課題的發生時期不同,無法避免在晶粒接合時的上述剝離的產生。
又,在專利文獻1及2記載的發明中,如同前述,為了改善背部金屬與焊接合金的浸潤性,抑制受到壞影響的金屬間化合物相的生成,將矽晶片的背部金屬設為層積構造。不過,因為各層的線膨漲係數不同,將焊接合金溶融而在凝固時於各層間會產生應力,會有界面剝離的可能性。剝離區域的面積小時,應力集中於該剝離區域,該剝離區域成為各層的裂縫的起點,傳遞至矽晶片為止的矽晶片會有破壞的情形。特別是在專利文獻2中,記載0.6μm的Ni層在晶粒接合時會消失,此時,在阻障層與焊接合金的界面會有剝離產生。這是因為如同專利文獻2記載的,若Ni消失則焊接合金與Ti會接合,但向焊接合金的Ti的浸潤性非常差,Ti會排斥焊接合金浸潤。Ti的浸潤性差的理由如下。Sn-Ti合金的製作條件需要是加熱溫度為1200℃以上,且在不活性氣體氛圍下進行數小時的加熱。因此,通常的焊接條件,即400℃以下的加熱溫度,且30分以內的短時間加熱,難以將Sn與Ti完全浸潤。
再來假如Ni層部分殘留,Ti也會露出。此時,因為焊接合金難以浸潤Ti,空隙應會增加。
其中,專利文獻2記載的Ni層的消失在完全不含有Ni、Ti、及Sn以外的氣體及原子的理想環境下進行時,Ni完全溶解後,Ti與Sn能發揮良好的浸潤。不過,在現實的環境下,在Ni與Ti的界面會形成一些氧化物,即便是真空氛圍也會含有多量的氧原子。再來,在焊接工程中,於溶融焊接中必會形成空隙,在該空隙之中包含成為污染物的氧原子及其他有機成分。對Ti而言氧成為污染氣體。因為隨著Ni層消失,污染氣體與Ti接觸,使該表面劣化,與焊接合金的浸潤會越來越差,容易產生剝離。
一般,焊接合金因應組成液相線溫度及固相線溫度會發生變化。因此,根據焊接時的條件,會發生焊接合金的不浸潤、溶融焊接的飛散、晶片破裂。
而且,隨著電子機器的用途多樣代,使用環境也會劣化。即便是在焊接合金的凝固時不產生剝離的情形,在高低溫差大的環境中因應力造成的反複變形會發生剝離。不浸潤區域及剝離區域為局部時,如同前述剝離區域成為裂縫的起點而在矽晶片會產生裂縫。空隙明顯地膨漲時、或不浸潤區域及剝離區域的面積大時,在矽晶片與焊接合金的界面的放熱性明顯降低,會招致半導體裝置發火等的重大事態。
因此,電子機器的高積體化、大容量化、高速化、及適用範圍的廣域化造成的使用環境的惡化,會對電子部件造成極大負擔。為了矽晶片的剝離引起的裂縫的抑制及顯示高放熱性,有再檢討的必要。具體來說,為了不使背部金屬的一部分即Ni層消失,有檢討的必要。
本發明的課題為藉由抑制焊接接頭的形成時的背部金屬與焊接合金的剝離,並抑制焊接合金的不浸潤、溶融焊接的飛散、及晶片破裂造成的電子部件的破損,提供信賴性佳的焊接接頭、及焊接接頭的形成方法。
本發明者,首先調查關於Ni的擴散及凝固時的應力以外的背部金屬與焊接合金的剝離原因。在從前,剝離原因的調查,如同前述著目於背部金屬層而進行,但無法解決該等課題。對於此,本發明者非著目於背部金屬層而是著目於焊接合金的組織所引起者。又,因為必須避免在晶粒接合的焊接合金的溶融及軟質化,本發明者們認為即便在Sn-Sb系焊接合金之中,也特別需要使用同時含有Sn、Ag、Cu、Sb及Ni的焊接合金。
在此,本發明者們著目於使用Sn-Ag-Cu-Sb-Ni焊接合金的焊接接頭,詳細調查剝離的樣本的結果,得到背部金屬與焊接合金的剝離,除了Ni的擴散及凝固時的應力以外,也會因焊接合金的組織引起的見解。又,將剝離的處所進行剖面觀察後,得到在背部金屬與焊接合金的界面形成金屬間化合物層,金屬間化合物層與背部金屬的界面會剝離的見解。這是由以下的方式推察。
在以晶粒接合形成的焊接接頭,在背部金屬與焊接合金的接合界面,且焊接合金中形成金屬間化合物層。又,與此同時,在基板與焊接合金的接合界面,且焊接合金中形成金屬間化合物層。接著,在焊接合金中,Sn-Sb金屬間化合物相因越接觸兩金屬間化合物層而粗大化時,背部金屬與基板變得僅部分地隔介著金屬間化合物層及Sn-Sb金屬間化合物相而接合。在這種部分,緩和施加至接合界面的應力是困難的,在背部金屬與金屬間化合物層之間剝離。
本發明者以上述的方式進行推察的結果,推測在焊接合金中的Sn-Sb金屬間化合物相中,藉由控制焊接接頭的板厚方向的粒徑,能夠抑制背部金屬與焊接合金的剝離。但是,因為金屬間化合物層並不平坦,除了Sn-Sb金屬間化合物相的粒徑極小的情形以外,無法斷言Sn-Sb金屬間化合物相不會接觸兩金屬間化合物層。
在此,本發明者們,在構成焊接合金的組織之中,將除了形成於兩界面的金屬間化合物層及Sn-Sb金屬間化合物相以外的部分作為焊接合金層時,著目於控制發現應力緩和作用的焊接合金層,再進行更多檢討。其結果,得到了若焊接合金層在至少一方的金屬間化合物層與Sn-Sb金屬間化合物相之間介在的話,因為施加至接合界面的應力因焊接合金層而緩和,而能夠抑制剝離的見解,進而完成本發明。換言之,Sn-Sb金屬間化合物相若未貫通焊接合金層的話則能夠抑制剝離。
接著,本發明者們想定這種粗大的Sn-Sb金屬間化合物相的生成原因在於製造工程中,詳細調查各工程。其結果,得到原因在將焊接合金冷卻的工程中的見解。已知一般結晶相的粒徑其冷卻速度越慢則會越粗大化。在從前的焊接接頭的形成中,單著目於冷卻速度的例子多數存在。又,從前就被著目的冷卻速度表示從開始冷卻後到室溫為止的冷卻速度。針對於此,本發明者們推測即便只管理在從前著目的溫度域的冷卻速度,也無法抑制Sn-Sb金屬間化合物相的粗大化。為什麼呢,因為推測從 加熱工程移至冷卻工程時有無法進行溫度管理的時間帶,Sn-Sb金屬間化合物相已經粗大化了。
其中,Sn-Sb系焊接合金在冷卻時經過如以下這種相的析出過程。首先,若冷卻溫度低於SnSb相的析出開始溫度的話,液相及SnSb相這2相共存。接著,在本發明中,因為使用含有Ag的Sn-Ag-Cu-Sb-Ni焊接合金,冷卻溫度若低於230℃,從剩下的接近90%的液相,SnSb相、Sn相及SnAg相與SnCu相的4相共存。
在這裡,本發明者們著目於Sn-Ag-Cu-Sb-Ni焊接合金的冷卻時的相的析出過程。其結果,得到藉由控制從Sn-Sb金屬間化合物相的析出開始的溫度到Sn-Sb系金屬間化合物相的析出結束的230℃為止的冷卻時間,能夠抑制Sn-Sb金屬間化合物相的粗大化的見解。又,隨之得到了焊接合金層介在於至少一方的金屬間化合物層與Sn-Sb金屬間化合物相之間的見解。
再來,本發明者推測剝離的一因即Ni層消失是因為峰值溫度與保持時間引起的。峰值溫度與保持時間的控制,在為了焊接合金的浸潤擴展及藉由Ni未消失的程度的擴散來抑制剝離的發生是必要的。在這裡,除了加熱條件以外也詳細調查加熱氛圍的減壓條件的結果,偶然得到了加熱溫度、加熱保持時間、加熱時的峰值溫度、及減壓條件在預定的範圍內Ni層會殘留而抑制了背部金屬與金屬間化合物層的剝離的見解。
又,加熱溫度、加熱保持時間、加熱時的峰值溫度、及減壓條件在預定的範圍內,除因為Ni的殘留而抑制剝離以外,還得到了能夠抑制焊接合金的不浸潤、溶融焊接的飛散、及晶片破裂的見解。
根據該等見解得到的本發明如下。 (1)一種焊接接頭,係將具備背部金屬的電子部件與基板藉由焊接合金接合的焊接接頭,其中,焊接合金具備:具有由質量%為Ag:2~4%、Cu:0.6~2%、Sb:9.0~12%、Ni:0.005~1%、及殘留部為Sn所構成的合金組成的焊接合金層、Sn-Sb金屬間化合物相、形成於背部金屬與焊接合金的界面的背部金屬側金屬間化合物層、及形成於基板與焊接合金的界面的基板側金屬間化合物層;在Sn-Sb金屬間化合物相與背部金屬側金屬間化合物層之間、及Sn-Sb金屬間化合物相與基板側金屬間化合物層之間的至少一者介在著焊接合金層。
(2)如請求項1記載的焊接接頭,其中,Sn-Sb金屬間化合物相,在焊接接頭的剖面,將Sn-Sb金屬間化合物相以與基板平行的2條平行線包夾,2條平行線的間隔即Sn-Sb金屬間化合物相的費雷特(Feret)徑為電子部件的背部金屬與基板的平均間隔的60%以下。
(3)如請求項1或2記載的焊接接頭,其中,合金組成更含有質量%為Co:0.2%以下及Fe:0.1%以下的至少1種。
(4)如請求項1~3中任1項記載的焊接接頭,其中背部金屬與基板的間隔的平均為50~400μm。
(5)如請求項1~4中任1項記載的焊接接頭,其中,背部金屬從電子部件側依序以:將Ti、Cr及V的至少1種為主成分的阻障層、和將Ni及Cu的至少1種作為主成分的第一金屬層來構成。
(6)如請求項5記載的焊接接頭,其中,在電子部件與阻障層之間,具備:將Au及Al的至少1種作為主成分的第二金屬層。
(7)如請求項5或6記載的焊接接頭,其中,在第一金屬層與焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
(8)如請求項7記載的焊接接頭,其中,在第三金屬層與焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
(9)一種如請求項1~8中任1項記載的焊接接頭的形成方法,係將具備背部金屬的電子部件與基板藉由焊接合金接合,具備:將隔介著焊接合金載置電子部件的基板,加熱至比焊接合金的液相線溫度還高10℃以上的加熱溫度域的溫度,以在加熱溫度域的保持時間為30秒~5分,且在保持時間的峰值溫度成為270~330℃的方式加熱的加熱工程;在基板的加熱溫度達到227℃之前將加熱氛圍減壓至100Pa以下、或當基板的加熱溫度到達加熱溫度域之後經過20秒以後開始減壓將加熱氛圍減壓至100Pa以下,開始減壓之後到使加熱氛圍回到0.8氣壓以上的氣壓域為止的時間即減壓時間為30秒~4分的減壓工程;加熱工程後,將Sn-Sb金屬間化合物相的析出開始溫度~230℃的溫度域在5秒以上2分以內冷卻的冷卻工程。
(10)如請求項9記載的焊接接頭的形成方法,其中,加熱工程具備:在基板的加熱溫度到達227℃之前,以150~220℃的溫度域進行2~10分間加熱的預備加熱工程。
(11)如請求項9或10記載的焊接接頭的形成方法,減壓工程,在到開始冷卻工程的5秒~2分前為止,使加熱氛圍回到0.8氣壓以上的壓力。
(12)如請求項9~11中任1項記載的焊接接頭的形成方法,其中,減壓工程,在基板的加熱溫度到達加熱溫度域之後20秒~3分後開始。
(13)如請求項9~12中任1項記載的焊接接頭的形成方法,其中,減壓工程,在減壓時間內進行複數次。
[實施形態]
1.焊接接頭 本發明的焊接接頭,將電子部件與基板藉由焊接合金接合。關於電子部件、基板、及焊接合金在以下詳述。
(1)電子部件 構成本發明的焊接接頭的電子部件,例如是在晶圓形成電阻、電晶體、電容、積體電路等半導體元件,從晶圓將各半導體元件的畫分切取出的晶片。作為晶圓可以是Si、SiC、GaN。電子部件作為半導體封裝搭載於基板時,以焊接合金進行晶粒接合。
在電子部件,為了提升與焊接合金的密著強度,至少在與焊接合金的接合界面側之面形成背部金屬。將電子部件的兩面焊接時,在電子部件的兩面形成背部金屬也可以。
本發明的背部金屬從電子部件側依序以:將Ti、Cr及V的至少1種為主成分的阻障層、和將Ni及Cu的至少1種作為主成分的第一金屬層來構成較佳。以下,詳述關於能構成背部金屬的阻障層、第一金屬層~第四金屬層。
(1-1)阻障層 在本發明中,為了抑制構成第一金屬層的元素向電子部件側擴散,在電子部件的基板側之面與第一金屬層之間具備將Ti、Cr及V的至少1種作為主成分的阻障層較佳。阻障層的膜厚雖沒有特別的限定,但從抑制擴散的觀點來看較佳為0.01~0.2μm。
此外,在本發明中,阻障層的主成分不能是Ag。因為Ag在晶粒接合時會比第一金屬層的Ni或Cu還更快擴散而使阻障層消失。又,Ag中的氧的擴散激烈,成為阻障層氧化並剝離的原因。
(1-2)第一金屬層 在本發明中,為了使與焊接合金的浸潤性改善,具有將Ni及Cu的至少1種作為主成分的第一金屬層較佳。第一金屬層的膜厚較佳為0.3~1.7μm。該膜厚藉由晶粒接合進行某種程度的擴散,為殘留的第一金屬層的膜厚。晶粒接合前的第一金屬層的膜厚為0.5~2μm較佳。本發明的焊接接頭與從前的焊接接頭不同,如同前述因為在焊接接頭的形成後第一金屬層維持前述的膜厚,能夠抑制背部金屬與焊接合金的剝離。
又,第一金屬層與焊接合金接觸時,第一金屬層不是單獨Cu較佳。
(1-3)第二金屬層 在本發明中,在電子部件的基板側之面與阻障層之間,具備將Au及Al的至少1種作為主成分的第二金屬層較佳。在該位置具備第二金屬層的話,能夠使電子部件與阻障層的密著強度提升。第二金屬層的晶粒接合後的膜厚雖未特別限定,但為0.02~1μm較佳。
(1-4)第三金屬層 本發明中,在第一金屬層與焊接合金的金屬間化合物層之間,具備:將由Au、Ag、Sn、Ni及Cu構成的群中的至少1種、及Ni的至少1種作為主成分的第三金屬層較佳。 在該位置具備第三金屬層的話,能夠使焊接合金的浸潤性提升。第三金屬層的晶粒接合後的膜厚雖未特別限定,但Au為0~0.1μm、Ag為0~2μm、Sn為0~5μm、Cu為0~5μm較佳。第三金屬層在晶粒接合後有消失的情形發生。
又,第一金屬層未含有Ni時,第三金屬層與焊接合金接觸時,因為藉由避免阻障層的露出而維持背部金屬與焊接合金的浸潤性,第三金屬層含有Ni較佳。使用Ni時的第三金屬層的晶粒接合後的膜厚雖未特別限定,但為0.3~1.7μm即可。
(1-5)第四金屬層 本發明中,在第三金屬層與焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層較佳。在該位置具備第四金屬層的話,能夠抑制第三金屬層的氧化,並維持好的浸潤性。第四金屬層的晶粒接合後的膜厚雖未特別限定,但Au為0~0.1μm、Ag為0~2μm、Sn為0~5μm較佳。第四金屬層在晶粒接合後有消失的情形發生。第四金屬層的主成分在第三金屬層為Ag時能選擇Au、在第三金屬層為Cu時能選擇Ag、Sn或Au。
又,第一金屬層及第三金屬層未含有Ni時,因為藉由避免阻障層的露出而維持背部金屬與焊接合金的浸潤性,第四金屬層含有Ni較佳。使用Ni時的第三金屬層的膜厚雖未特別限定,但為0.3~1.7μm即可。
(1-6)焊接接頭的層積構造 利用圖1說明本發明的焊接接頭的層積構造。圖1為層積阻障層、第一~第四金屬層的焊接接頭的示意圖、圖1(a)為從電子部件側依序層積阻障層、及第一金屬層的示意圖、圖1(b)為從電子部件側依序層積第二金屬層、阻障層、及第一金屬層的示意圖、圖1(c)為從電子部件側依序層積第二金屬層、阻障層、第一金屬層、及第三金屬層的示意圖、圖1(d)為從電子部件側依序層積第二金屬層、阻障層、第一金屬層、第三金屬層、及第四金屬層的示意圖。如圖1(a)~圖1(d)所示,在本發明的焊接接頭中,因為難以與本發明所用的焊接合金浸潤的Al有僅在第二金屬層使用的情形,Al層與焊接合金沒有接觸。另一方面,能與焊接合金接合的第一金屬層、第三金屬層、及第四金屬層,因為都有與焊接合金接觸的可能性而未含有Al,如同上述本發明所用的焊接合金能選擇容易浸潤的構成元素。
各層的形成方法沒有特別限定,可以適用蒸鍍法、濺鍍法、鍍膜法等。
上述阻障層及第一~第四金屬層中,雖都規定主成分的元素,但在本發明中的「主成分」表示各層的50質量%以上。該等層由單獨的元素構成更佳。主成分以外含有不可避免的雜質也可以。即便是含有不可避免的雜質的情形,也不會對前述的效果有影響。在不可避免的雜質中也包含從背部金屬擴散的元素。又,本發明中即便未含有的元素作為不可避免的雜質含有也不會對前述的效果有影響。
(2)基板 構成本發明的焊接接頭的基板,表示高耐熱的FR4等玻璃纖維強化環氧系印刷基板及聚醯亞胺系的基板、DBA(Direct Bonded Aluminum)及DBC(Direct Bonded Copper)等陶瓷基板、Cu等金屬基板、Cu導線框等。基板隔介著焊接合金搭載電子部件。基板自體施予金屬鍍膜也可以。金屬鍍膜在基板的兩面形成也可以,又多層也可以。
電子部件的背部金屬與基板的間隔的平均雖沒有特別限制,但作為實際可形成的間隔通常為50~400μm。
本發明中,電子部件的背部金屬與基板的間隔的平均,在電子部件的4角,能夠例如以焦點顯微鏡或雷射變位計測定從基板的上面到電子部件的上面的高度,藉由算出各高度的加算平均與包含背部的金屬電子部件的高度之差來求出。
(3)焊接合金 本說明書中,關於焊接合金組成的「%」只要沒有特別指定就是「質量%」。構成本發明的焊接接頭的焊接合金由以下的元素構成。
(3-1)Ag:2~4% Ag為使信賴性提升的元素。Ag若未滿2%的話,無法緩和凝固時的應力。Ag的下限為2%以上、較佳為2.5%以上、特佳為2.9%以上。
另一方面,Ag超過4%的話,Ag3 Sn等的粗大的金屬間化合物相在局部生成而成為剝離的原因。該Ag3 Sn金屬間化合物相的生成與Sn-Sb系金屬間化合物相不同,以曲線控制非常困難。Ag的上限為4%以下、較佳為3.5%以下、特佳為3.1%以下。
(3-2)Cu:0.6~2% Cu為調整焊接合金的熔點,並在阻障層具有第一金屬層時控制Ni層的擴散,抑制背部金屬的剝離的元素。Cu若未滿0.6%的話,隨著Ni的擴散的進行會有發生剝離的情形。Cu的下限值為0.6%以上、較佳為0.7%以上、特佳為0.95%以上。
另一方面,若Cu超過2%的話,焊接合金的熔點顯著地上升,晶粒接合之時形成於電子部件的矽晶片上的IC等性能會有劣化的情形。Cu的上限為2%以下、較佳為1.5%以下、特佳為1.05%以下。
(3-3)Sb:9.0~12% Sb為控制Sn-Sb金屬間化合物相的粒徑並且使信賴性提升的元素。Sb若未滿9.0%的話,Sn中的Sb濃度不會提高,焊接合金的信賴性差。因此,Sb含有量需要是析出Sn-Sb金屬間化合物相的程度之量。Sb的下限為9.0%以上、較佳為10.0%以上。
另一方面,Sb超過12%的話,Sn-Sb金屬間化合物相的粒徑容易粗大化,成為剝離的原因。Sb的上限為12%以下、較佳為11%以下、特佳為10.5%以下。
(3-4)Ni:0.005~1% Ni為調整焊接合金的熔點,並在背部金屬具有Ni層時,控制Ni層的擴散使與焊接合金的密著強度提升而抑制剝離的元素。Ni若未滿0.005%的話,與電子部件的密著強度降低而會有產生剝離的情形。Ni的下限為0.005%以上、較佳為0.010%以上、特佳為0.015%以上。
另一方面,Ni若超過1%的話,焊接合金的熔點會變得過高,晶粒接合之時會有對半導體元件造成熱損傷的情形。Ni的上限為1%以下、較佳為0.1%以下、特佳為0.025%以下。
(3-5)Co:0.2%以下及Fe:0.1%以下的至少1種 該等元素是為了抑制Ni的溶解,能夠抑制背部金屬的剝離的任意元素。該等元素為上限以下的話,焊接合金的熔點不會變得過高,晶粒接合之時不會有對半導體元件造成熱損傷的情形。Co的上限較佳為0.2%以下、更佳為0.1%以下。Fe的上限較佳為0.1%以下、更佳為0.05%以下。
另一方面,為了發揮該等元素的添加效果,Co的下限較佳為0.005%以上、更佳為0.01%以上。Fe的下限較佳為0.005%以上、更佳為0.01%以上。
(3-6)殘留部為Sn 構成本發明的焊接接頭的焊接合金的殘留部為Sn。前述元素之外含有不可避免的雜質也可以。即便是含有不可避免的雜質的情形,也不會對前述的效果有影響。本發明中,在不可避免的雜質中也包含從背部金屬擴散的元素。又,如同後述,本發明中即便未含有的元素作為不可避免的雜質含有也不會對前述的效果有影響。
(3-7)合金組織 構成本發明的焊接接頭的焊接合金具有:背部金屬側金屬間化合物層、基板側金屬間化合物層、Sn-Sb金屬間化合物相、及焊接合金層。以下將詳述有關其等。
(3-7-1)背部金屬側金屬間化合物層 本發明的焊接合金因為含有Sn及Cu,在背部金屬與焊接合金的界面,形成Cu6 Sn5 及Cu3 Sn等的背部金屬側金屬間化合物層。又,背部金屬中,與焊接合金接觸的金屬層含有Ni時,也形成(Cu,Ni)6 Sn5 、(Cu,Ni)3 Sn等背部金屬側金屬間化合物層。
本發明中的背部金屬側金屬間化合物層,為在背部金屬與焊接合金的界面形成的「一連的金屬間化合物層」,構成元素即相同也不會包含從「一連的金屬間化合物層」游離的「游離金屬間化合物相」。也就是說,在「一連的金屬間化合物層」與「游離金屬間化合物相」之間介在有後述的焊接合金層時,「游離金屬間化合物相」也不該當於「一連的金屬間化合物層」。因為若介在有焊接合金層的話,即便假若Sn-Sb金屬間化合物相與「游離金屬間化合物相」接觸,因為有焊接合金層的介在,也能夠緩和施加至接合界面的應力。
(3-7-2)基板側金屬間化合物層
本發明的焊接接頭,在基板與焊接合金的界面,形成Cu6Sn5及Cu3Sn等基板側金屬間化合物層。又,在基板形成Ni鍍膜時,也形成(Cu,Ni)6Sn5、(Cu,Ni)3Sn等基板側金屬間化合物層。
本發明中的背部金屬側金屬間化合物層,與背部金屬側金屬化合物層一樣,為在基板與焊接合金的界面形成的「一連的金屬間化合物層」,構成元素即相同也不會包含從「一連的金屬間化合物層」游離的「游離金屬間化合物相」。因為若介在有焊接合金層的話,即便假若Sn-Sb金屬間化合物相與「游離金屬間化合物相」接觸,因為有焊接合金層的介在,也能夠緩和施加至接合界面的應力。
(3-7-3)Sn-Sb金屬間化合物相
本發明的Sn-Sb金屬間化合物相,有必要在Sn-Sb金屬間化合物相與背部金屬側金屬間化合物層之間、及Sn-Sb 金屬間化合物相與基板側金屬間化合物層之間的至少一者隔介著焊接合金層。
本發明的焊接接頭因為採用Sb的含有量為9.0%以上含有的焊接合金,Sn-Sb金屬間化合物相容易粗大化。Sn-Sb系金屬間化合物相,以將在背部金屬側金屬間化合物層與基板側金屬間化合物層之間的某焊接合金局部貫通的程度粗大化時,會接觸兩金屬間化合物層。此時,Sn-Sb金屬間化合物相因為是高強度且沒有變形,無法緩和周邊的應力。又,上述兩金屬間化合物層比焊接合金還硬,一樣無法緩和應力。其結果,在從背部金屬到基板之間能緩和應力的位置消失,在背部金屬與焊接合金的金屬間化合物層的界面發生剝離。該剝離成為電子部件的脫落及導通不良的原因。
本發明中,Sn-Sb金屬間化合物相的粒徑小者較佳。本發明中,焊接接頭的剖面中,將Sn-Sb金屬間化合物相以與基板平行的2條平行線包夾,2條平行線的間隔即作為Sn-Sb金屬間化合物相的費雷特(Feret)徑。該費雷特徑為電子部件的背部金屬與基板的平均間隔的60%以下較佳、未滿50%更佳、33.3%以下又更佳。
Sn-Sb金屬間化合物相的費雷特(Feret)徑雖相依於電子部件的背部金屬與基板的間隔,但10~350μm以下較佳、10~150μm以下更佳、15~30μm又更佳。
本發明中,Sn-Sb金屬間化合物相的粒徑藉由顯微鏡以150~1000倍觀察,從目視大者抽出2~5個粒子,攝影照片並量測抽出的2~5個粒子的費雷特徑,將抽出的2~5個粒子之中的最大值設為費雷特徑。本發明中,費雷特徑為以包夾粒子的2條平行切線間的距離定義的定方向切線徑(粉體工學會編「粒子量測技術」日刊工業新聞社,P7(1994))。本發明中,以與基板平行的2條平行線包夾Sn-Sb金屬間化合物相,將2條平行線的距離設為費雷特徑。
此外,本發明中,Sn-Sb金屬間化合物相為1個結晶粒或複數結晶粒連結也可以。複數結晶粒連結時,將連結的一群作為Sn-Sb金屬間化合物相。同樣,複數結晶粒連結時的費雷特徑為在連結的一群結晶粒的徑。又,本發明中的「Sn-Sb金屬間化合物相」表示SnSb相。再來,因為金屬間化合物層不平坦,即便是兩金屬間化合物層的最短間隔比費雷特徑還小的情形,Sn-Sb金屬間化合物相未與兩金屬間化合物層接觸的情形也有十足的可能。
(3-7-4)焊接合金層 本發明中,焊接合金層表示焊接合金除了背部金屬側金屬間化合物層、基板側金屬間化合物層、及Sn-Sb金屬間化合物相以外的部分。再來,存在前述「游離金屬間化合物相」時,「游離金屬間化合物相」也從焊接合金層被除去。
本發明中的焊接合金層比該等硬度還低,能夠緩和施加至接合界面的應力。也就是說,本發明中的焊接合金層有作為本發明的焊接接頭的緩衝材的機能。
焊接合金層有包含該等金屬間化合物層及具有與Sn-Sb金屬間化合物相同等以上的硬度的Ag3 Sn等的結晶相的情形。不過,因為該結晶析出量極微,不會對本發明的效果造成影響。
在Sn-Sb金屬間化合物相與背部金屬側金屬間化合物層之間、及Sn-Sb金屬間化合物相與基板側金屬間化合物層之間的至少一者介在的焊接合金層的膜厚,從發揮上述效果的觀點來看,較佳為1μm以上、更佳為5μm以上。
2.焊接接頭的形成方法 本發明的焊接接頭的形成方法,係將備背部金屬的電子部件與基板藉由焊接合金接合的方法。以下,詳述關於各工程。
(1)加熱工程 本發明的加熱工程,將隔介著焊接合金載置電子部件的基板,加熱至比焊接合金的液相線溫度還高10℃以上的加熱溫度域的溫度,以在加熱溫度域的保持時間為30秒~5分,且在保持時間的峰值溫度成為270~330℃的方式加熱。
(1-1)加熱條件 本發明的焊接接頭的形成方法,在基板依焊接合金、電子部件的順序載置。載置電子部件的方向,為電子部件的背部金屬與焊接合金抵接的方向。將電子部件的兩面具備背部金屬時,選擇因應電子部件的機能等適合的面。
本發明的加熱工程中,有將基板加熱至比焊接合金的液相線溫度還高10℃以上的加熱溫度域的溫度的必要。因為加熱溫度若在該溫度域的範圍內,焊接合金從半溶融狀態成為溶融狀態,溶融焊接會充分地浸潤擴展至電子部件的背部金屬及基板電極。
本發明中,為了防止可成為與焊接合金接觸的層的第一金屬層、第三金屬層、及第四金屬層的消失,有將在前述的加熱溫度域的保持時間設為30秒~5分間的必要。下限未滿30秒的話浸潤性會惡化。下限較佳為1分以上、更佳為2分以上。另一方面,上限超過5分的話,第一金屬層消失,在焊接合金的背部金屬側金屬間化合物層與背部金屬的界面會有剝離之虞。上限較佳為4.5分以下。
接著,將搭載焊接合金與電子部件的基板以加熱爐加熱。加熱時的峰值溫度為270~330℃的溫度域。本發明的峰值溫度,為了促進Sn-Sb金屬間化合物相的溶解,並發揮良好的浸潤性,需要是270℃以上。因為液相線溫度會根據焊接合金組成變動,因應焊接合金的液相線溫度將峰值溫度在上述溫度域的範圍調整。另一方面,峰值溫度若過高的話,電子部件會受到熱損傷,又第一金屬層等的擴散會變快第一金屬層等會有消失的情形。又,因此,將上限設為330℃以下。
(1-3)其他的條件 本發明的加熱工程中,升溫速度為0.5~5℃/s較佳。若是該範圍的話,能夠充分抑制空隙的產生,並改善浸潤性。
又,在加熱工程以後的工程的氛圍,當使用助焊劑或包含助焊劑的焊接製品時,設為大氣、氮、惰性氣體、氫、甲酸、及其他還原氣體的氛圍較佳。不用助焊劑,而僅供應焊接合金時,設為氫、甲酸等還原氣體與氮等不活性氣體的混合氣體的氛圍較佳。此外,如同後述,在減壓工程中使加熱氛圍回到0.8MPa以上的氣壓時,導入大氣以外的氛圍氣體而回到前述氣壓較佳。
(1-4)預備加熱工程 本發明的加熱工程中,將基板均勻加熱,將基板上的氧化物清淨化、供應助焊劑或包含助焊劑的焊接製品至基板時,為了將有機溶劑除去,在基板的加熱溫度到達227℃前,設置以150~220℃的溫度域進行2~10分間加熱的預備加熱工程也可以。
(1-5)焊接合金的使用形態 又,本發明中,使用助焊劑及含有前述焊接合金的糊料也可以。助焊劑及用於糊料的焊接合金以外的成分沒有特別限定,使用從前者也可以。
本發明中的焊接合金的形狀若是球、帶、墊圈、顆粒、線、晶片等預形體的話,形狀沒有特別限定。
(2)減壓工程 本發明的減壓工程,有在基板的加熱溫度達到227℃之前將加熱氛圍減壓至100Pa以下、或當基板的加熱溫度到達加熱溫度域之後經過20秒以後開始減壓並將加熱氛圍減壓至100Pa以下,將開始減壓後到使加熱氛圍回到0.8氣壓以上的氣壓域為止的時間即減壓時間設為30秒~4分的必要。
本發明中,為了避免焊接合金的在半溶融狀態的急劇的氣壓變化,減壓至100Pa以下的時點可以進行2種類的任一種。詳述關於兩者。
(2-1)基板的加熱溫度到達227℃前將加熱氛圍減壓至100Pa以下。 以該條件進行減壓的話,因為焊接合金不會在半溶融狀態進行減壓,焊接合金在溶融開始之前處於減壓的狀態,能夠抑制焊接合金的飛散,降低實裝不良。另一方面,在基板的加熱溫度到達227℃之後將加熱氛圍減壓至100Pa以下之後,焊接合金以半溶融狀態引起急劇的氣壓變化,焊接合金會飛散。
設為227℃是因為是特別在本發明使用的焊接合金的固相線溫度或接近其的溫度。
本發明中,若將加熱氛圍壓減壓至100Pa以下就足夠了。較佳為50Pa以下、更佳為10Pa以下。
(2-2)當基板的加熱溫度到達加熱溫度域之後經過20秒以後開始減壓並將加熱氛圍減壓至100Pa以下。 焊接合金以溶融狀態結束浸潤之前開始減壓後,因為急劇的氣壓差造成空隙膨漲,無法發揮焊接合金自體本來的浸潤性,產生不浸潤。因此,有至少在到達前述加熱溫度域經過20秒以後開始減壓工程的必要。減壓開始時間,在到達加熱溫度域之後20秒~3分後進行較佳,在到達加熱溫度域之後1分~2分後進行特佳。若是該範圍的話能夠抑制不浸潤。
本發明的減壓工程中,在到開始冷卻工程的5秒~2分前為止回到0.8氣壓以上的壓力較佳。空隙容易產生的時間帶會因第一金屬層的膜厚、加熱溫度、升溫速度、加熱氛圍等各種要因而變動,但藉由從大致開始冷卻的5秒到2分前為止進行最後的減壓處理,使減壓時膨漲的空隙收縮,能夠在除濕前於空隙部填充焊料並抑制不浸潤。回到0.8氣壓以上的壓力的時間,為開始冷卻工程的10秒~1分前較佳。
回到減壓後的壓力的下限,從避免向空隙部填充的焊料量不足並抑制不浸潤的觀點來看,0.8氣壓以上更佳、0.9氣壓以上、1氣壓以上特佳。上限沒有特別限定,3氣壓以下即可。
(2-3)減壓時間 本發明中,為了在焊接合金的溶融時抑制空隙的產生並發揮焊接合金自體的優浸潤性,同時抑制第一金屬層的消失,將開始減壓後到使加熱氛圍回到0.8氣壓以上的氣壓域為止的時間即減壓時間設為30秒~4分。減壓時間未滿30秒時,因為減壓時空隙膨漲而會留下空隙中的氣體及失去活性的助焊劑成分,幾乎不會從焊接接合部排出,即便回到0.8氣壓以上空隙降低效果也沒有多大的期待。又,在焊接合金以溶融狀態結束浸潤之前減壓的話,因為欲收縮的空隙膨漲了,無法發揮焊接合金自體本來的浸潤性,反而空隙會殘留並產生不浸潤。因此,有至少在到達比焊接合金的液相溫度還高10℃以上的溫度經過30秒以後開始減壓工程的必要。
另一方面,減壓時間超過4分的話,減壓時與擴展的空隙接觸的電極部微殘留的溶融焊料隨著反應層的成長被消耗,部分反應層露出至空隙中,所謂的不相熔現象在晶片接合接合部即電子部件的背部金屬與焊接合金的界面、焊接合金與基板電極的界面發生。一度引起不相熔的電極,浸潤非常差,減壓時焊接合金不會再度浸潤,會產生不浸潤。又,因為長時間的減壓會造成溶融時間變長,第一金屬層會有消失的情形。
又,本發明的減壓工程中,藉由將基板反覆曝露在0.8氣壓以上的壓力與減壓的環境下,溶融焊料會流動,相對於不浸潤部分物使焊料物理性地浸潤擴展。因此,在發明中,將減壓工程4分以內進行複數次較佳。考慮減壓時間等的話,2~3次較佳。例如,2次減壓的曲線在以下的時點進行也可以。第1次為在加熱工程中到達230℃之前以加熱氛圍成為100Pa以下的方式開始減壓,在液相線溫度暫時結束減壓使壓力回升。第2次為到達峰值溫度後經過20秒~3分後再度開始減壓,開始冷卻工程的5秒~2分前為止使壓力回升。
本發明的減壓工程中,藉由利用旋轉泵的簡易減壓機構就足夠了。 (4)冷卻工程 本發明的冷卻工程,在加熱工程後,將Sn-Sb金屬間化合物相的析出開始溫度~230℃的溫度域在5秒以上2分以內冷卻。
本發明中,藉由進行焊接合金的凝固時的冷卻控制,能夠抑制焊接合金中的Sn-Sb系金屬間化合物相的粗大化。本發明使用的含有Ag及Cu的Sn-Sb系焊接合金中,若低於230℃,SnSb相、Sn相及SnAg相與SnCu相的4相結晶析出。本發明中,藉由控制在Sn-Sb金屬間化合物相的生成溫度域即Sn-Sb系金屬間化合物相的析出開始溫度~230℃的溫度域的冷卻時間,能夠抑制Sn-Sb金屬間化合物相的粗大化,並抑制背部金屬與合金的剝離。又,隨此,能夠抑制合金組織,使焊接合金層至少在一者的金屬間化合物層與Sn-Sb金屬間化合物相之間介在。因此,本發明中,控制Sn-Sb金屬間化合物相的析出開始溫度~230℃的冷卻速度即可、較佳為控制270~230℃的冷卻速度。
又,冷卻時間從抑制Sn-Sb金屬間化合物相旳粗大化的觀點來看,將在上述溫度域的冷卻時間設為5秒以上2分以內較佳。冷卻時間未滿5秒的話,因為基板上的冷卻偏差會變大,再加上熱衝擊,在Si晶片會產生不均勻的應力,導致Si晶片破壞。冷卻時間的下限較佳為10秒以上、更佳為30秒以上。另一方面,冷卻時間超過2分的話,因為Sn-Sb金屬間化合物相會粗大化,成為剝離的原因。冷卻時間的上限較佳為1.5分以下、更佳為1分以下。 [實施例]
1.發明例1 (1)焊接接頭的形成 以下說明發明例1的焊接接頭的形成方法、及各評價項目的評估方法。
將板厚為100μm的Sn-3Ag-1Cu-10Sb-0.02Ni焊接合金(液相線溫度:256℃)的預形體搭載至施予Ni鍍膜的Cu製導線框(基板)。之後,將在5mm×5mm×200μmt 的矽晶片的基板接合面側具備背部金屬的IC晶片(電子部件)搭載於焊接合金上。背部金屬為依序層積作為阻障層膜厚為0.05μm的Ti層、作為第一金屬層膜厚為1μm的Ni層。搭載的方向,為在該背部金屬IC晶片中,Ni層與焊接合金的預形體抵接的方向。將搭載焊接合金的預形體及IC晶片的基板導入加熱爐,以表1所示的條件進行加熱及冷卻,進行晶粒接合。表1的發明例1所示的條件成為圖2所示的溫度分佈。
加熱氛圍中使用甲酸與氮的混合氣體。將基板導入加熱爐,在基板溫度到達270℃經過1分後,以旋轉泵減壓至10Pa,開始減壓後到快經過100秒之前導入前述混合氣體進行排氣,開始減壓後到經過100秒為止回到大氣壓。排氣結束後經過10秒後,以從270℃到230℃為止的冷卻時間成為60秒的方式將加熱爐,形成發明例1的焊接接頭。
(2)評價 關於形成的焊接接頭,為了就矽晶片的背部金屬確認「Ni層的殘留」、「SnSb相的貫通」、及「剝離」、「不浸潤」、「飛散」、「晶片破壞」進行以下的觀察。
將矽晶片的背部金屬的剖面,利用日本電子股份公司製JSM-6610LV以300倍及10000倍的倍率從藉由SEM的監視器對比的差異將各相分類,基於定量分析SnSb相(Sn-Sb金屬間化合物相)、Ni層、Ti層、Si、及形成於接合界面的金屬間化合物層(形成於電子部件與焊接合金的界面的背部金屬側金屬間化合物、形成於基板與焊接合金的界面的基板側金屬間化合物)及金屬學的見解,來鑑定。
・「Ni層的殘留」、「SnSb相的貫通」、「剝離」、「不浸潤」、「飛散」、「晶片破壞」 就矽晶片的背部金屬的剖面,在SEM的監視器上擴大10000倍,就任意的10處確認Ni層的殘留。又,從以SEM攝影的影像中,確認SnSb相是否貫通焊接合金。接著,當Ni層消失時確認Ti層與焊接合金的剝離的有無。又,當確認Ni層殘留時,確認Ni層與焊接合金的不浸潤的有無。
關於「Ni層的殘留」,Ni層殘留時設為「○」、未殘留時設為「×」。
關於「SnSb相的貫通」,SnSb相未貫通焊接合金層,而與背部金屬側金屬間化合物層、或基板側金屬間化合物層接觸、或未與任何金屬間化合物層接觸時設為「無」、SnSb相貫通焊接合金層,與兩金屬間化合物接觸時設為「有」。
關於「剝離」,Ti層與焊接合金的剝離在任何位置都無法確認時設為「無」、在任何位置都有剝離時設為「有」。
關於「不浸潤」,Ti層與焊接合金之間無間隙未發生不浸潤時設為「無」、在任何位置都有間隙並發生不浸潤時設為「有」。
關於「飛散」的有無,在得到的焊接接頭的基板周邊焊料無飛散設為「無」、焊料飛散時設為「有」。
關於「晶片破壞」,藉由目視形成的焊接接頭的外觀,觀察矽晶片的破壞的有無。矽晶片未被破壞時設為「無」、在任何位置矽晶片都被破壞時設為「有」。
2.發明例2~24、比較例1~12 該等也與發明例1一樣進行評價。此外,為了使焊接接頭的層積狀態明確,以圖3記載焊接接頭的剖面示意圖。圖3(a)為發明例1的示意圖、圖3(b)為發明例8的示意圖、圖3(c)為發明例9的示意圖、圖3(d)為發明例10的示意圖。
結果顯示於表1。
Figure 02_image001
根據表1,發明例中Ni層殘留、沒有SnSb相的貫通,都沒有看到背部金屬與焊接合金的剝離、不浸潤、飛散、及晶片破裂的任一者。
另一方面,比較例1因為加熱時間長加熱時的峰值溫度也高,Ni層消失並產生剝離。又,因為冷卻時間長,SnSb相會貫通焊接合金層。因此,能看見背部金屬與背部金屬側金屬間化合物層的剝離。
比較例2因為加熱時的峰值溫度低,呈現不浸潤的樣相。 比較例3因為加熱時的峰值溫度高,Ni層會消失能看見剝離。
比較例4因為加熱時的保持時間短,產生不浸潤。 比較例5因為加熱時的保持時間長,呈現不浸潤的樣相。
比較例6因為在加熱溫度到達270℃之前的266℃開始減壓,浸潤不充分。
比較例7因為在加熱溫度到達227℃之後的230℃開始減壓,焊料飛散。
比較例8因為減壓時間短,呈現不浸潤的樣相。 比較例9因為加熱時間過長,Ni層消失並產生剝離。
比較例10因為排氣後的壓力低,呈現不浸潤的樣相。 比較例11因為冷卻時間短,因急冷而凝固收縮大,產生Si晶片破壞。
比較例12因為冷卻時間長,SnSb相會貫通焊接合金層而產生剝離。
為了證明該等,圖4顯示剖面SEM照片。圖4為發明例1及比較例1的剖面SEM照片、圖4(a)及圖4(b)為發明例1的SEM照片、圖4(c)及圖4(d)為比較例1的SEM照片。圖4(b)及圖4(d)為將各圖4(a)及圖4(c)的白色四角部分擴大者。又,在圖4(a)中,以1點虛線包圍的區域表示SnSb相。在圖4(c)中,以1點虛線、背部金屬側金屬間化合物相、及基板側金屬間化合物相包圍的區域表示SnSb相。
從圖4(a)及圖4(b)可明白,發明例1的焊接接頭中,SnSb相僅接觸僅任一者的金屬間化合物層,且背部金屬的Ni層殘留,沒看見背部金屬與背部金屬側金屬間化合物層的剝離。另一方面,在圖4(c)及圖4(d)中,存在貫通焊接合金層的Sn-Sb相,背部金屬的Ni層消失,並能看見背部金屬與金屬間化合物層的剝離。此外,圖4(a)中,能看見與背部金屬側金屬間化合物層為相同組成,並且從形成於背部金屬與焊接合金的界面的一連的背部金屬側金屬間化合物層游離的游離金屬間化合物相。該游離金屬間化合物相不被視為背部金屬側金屬間化合物層。
上述發明例與比較例的電子部件的背部金屬與基板的導線框的平均間隔,在電子部件的4角,能夠以焦點顯微鏡測定從基板的上面到電子部件的上面的高度,藉由算出各高度的加算平均與包含背部的金屬電子部件的高度之差來求出。
導線框與背部金屬的平均間隔在發明例1與比較例1中都為約90μm。比較例的SnSb相的費雷特徑最大為82μm。發明例的SnSb相的費雷特徑最大為30μm,得知比導線框與矽晶片的間隔的平均還小。又,發明例的費雷特徑為導線框與背部金屬的平均間隔的33.3%以下,相對於此,比較例的費雷特徑為導線框與背部金屬的平均間隔的91%以上。
再來,以圖4(a)觀察到的背部金屬側金屬間化合物層與基板側金屬間化合物層的最短間隔為25μm左右。由此看來,發明例1的焊接接頭,兩金屬間化合物層的最短間隔明顯比費雷特徑還小。接著,即便是該種狀況,SnSb相若未貫通焊接合金層的話,則明顯能發揮效果。
11、21、31、41、51、61、71、81‧‧‧電子部件(矽晶片) 12、22、32、42、52、62、72、82‧‧‧基板 13、23、33、43、53、63、73、83‧‧‧焊接合金 14、24、34、44、54、64、74、84‧‧‧阻障層 15、25、35、45、55、65、75、85‧‧‧第一金屬層 26、36、46、66,86‧‧‧第二金屬層 37、47、77、87‧‧‧第三金屬層 48、88‧‧‧第四金屬層 19、29、39、49、59、69、79、89‧‧‧背部金屬
[圖1] 圖1為層積阻障層、第一~第四金屬層的焊接接頭的示意圖、圖1(a)為從電子部件側依序層積阻障層、及第一金屬層的示意圖、圖1(b)為從電子部件側依序層積第二金屬層、阻障層、及第一金屬層的示意圖、圖1(c)為從電子部件側依序層積第二金屬層、阻障層、第一金屬層、及第三金屬層的示意圖、圖1(d)為從電子部件側依序層積第二金屬層、阻障層、第一金屬層、第三金屬層、及第四金屬層的示意圖。 [圖2] 圖2為表示本發明的焊接接頭的形成方法的溫度與時間及氛圍壓力與時間的曲線之一例。 [圖3] 圖3為焊接接頭的剖面示意圖、圖3(a)為發明例1的示意圖、圖3(b)為發明例8的示意圖、圖3(c)為發明例9的示意圖、圖3(d)為發明例10的示意圖。 [圖4] 圖4為發明例1及比較例1的剖面SEM照片、圖4(a)及圖4(b)為發明例1的SEM照片、圖4(c)及圖4(d)為比較例1的SEM照片。

Claims (38)

  1. 一種焊接接頭,係將具備背部金屬的電子部件與基板藉由焊接合金接合的焊接接頭,其中,前述焊接合金具備:具有由質量%為Ag:2~4%、Cu:0.6~2%、Sb:9.0~12%、Ni:0.005~1%、及殘留部為Sn所構成的合金組成的焊接合金層、Sn-Sb金屬間化合物相、形成於前述背部金屬與前述焊接合金的界面的背部金屬側金屬間化合物層、及形成於前述基板與前述焊接合金的界面的基板側金屬間化合物層;在前述Sn-Sb金屬間化合物相與前述背部金屬側金屬間化合物層之間、及前述Sn-Sb金屬間化合物相與前述基板側金屬間化合物層之間的至少一者介在著前述焊接合金層。
  2. 如請求項1記載的焊接接頭,其中,前述Sn-Sb金屬間化合物相,在前述焊接接頭的剖面,將前述Sn-Sb金屬間化合物相以與前述基板平行的2條平行線包夾,前述2條平行線的間隔即前述Sn-Sb金屬間化合物相的費雷特(Feret)徑為前述電子部件的背部金屬與前述基板的平均間隔的60%以下。
  3. 如請求項1或2記載的焊接接頭,其中,前述合金組成更含有質量%為Co:0.2%以下及Fe:0.1%以下的至少1 種。
  4. 如請求項1或2記載的焊接接頭,其中,前述背部金屬與前述基板的間隔的平均為50~400μm。
  5. 如請求項3記載的焊接接頭,其中,前述背部金屬與前述基板的間隔的平均為50~400μm。
  6. 如請求項1或2記載的焊接接頭,其中,前述背部金屬從前述電子部件側依序以:將Ti、Cr及V的至少1種為主成分的阻障層、和將Ni及Cu的至少1種作為主成分的第一金屬層來構成。
  7. 如請求項3記載的焊接接頭,其中,前述背部金屬從前述電子部件側依序以:將Ti、Cr及V的至少1種為主成分的阻障層、和將Ni及Cu的至少1種作為主成分的第一金屬層來構成。
  8. 如請求項4記載的焊接接頭,其中,前述背部金屬從前述電子部件側依序以:將Ti、Cr及V的至少1種為主成分的阻障層、和將Ni及Cu的至少1種作為主成分的第一金屬層來構成。
  9. 如請求項5記載的焊接接頭,其中,前述背部金屬從 前述電子部件側依序以:將Ti、Cr及V的至少1種為主成分的阻障層、和將Ni及Cu的至少1種作為主成分的第一金屬層來構成。
  10. 如請求項6記載的焊接接頭,其中,在前述電子部件與前述阻障層之間,具備:將Au及Al的至少1種作為主成分的第二金屬層。
  11. 如請求項7記載的焊接接頭,其中,在前述電子部件與前述阻障層之間,具備:將Au及Al的至少1種作為主成分的第二金屬層。
  12. 如請求項8記載的焊接接頭,其中,在前述電子部件與前述阻障層之間,具備:將Au及Al的至少1種作為主成分的第二金屬層。
  13. 如請求項9記載的焊接接頭,其中,在前述電子部件與前述阻障層之間,具備:將Au及Al的至少1種作為主成分的第二金屬層。
  14. 如請求項6記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  15. 如請求項7記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  16. 如請求項8記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  17. 如請求項9記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  18. 如請求項10記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  19. 如請求項11記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  20. 如請求項12記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  21. 如請求項13記載的焊接接頭,其中,在前述第一金屬層與前述焊接合金之間,具備:將Au、Ag、Sn、Ni及Cu的至少1種作為主成分的第三金屬層。
  22. 如請求項14記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  23. 如請求項15記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  24. 如請求項16記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  25. 如請求項17記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  26. 如請求項18記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  27. 如請求項19記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  28. 如請求項20記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  29. 如請求項21記載的焊接接頭,其中,在前述第三金屬層與前述焊接合金之間,具備將Au、Ag、Ni及Sn的至少1種作為主成分的第四金屬層。
  30. 一種如請求項1~29中任1項記載的焊接接頭的形成方法,係將具備背部金屬的電子部件與基板藉由焊接合金接合,具備:將隔介著前述焊接合金載置前述電子部件的前述基板,加熱至比前述焊接合金的液相線溫度還高10℃以上的加熱溫度域的溫度,以在前述加熱溫度域的保持時間為30秒~5分,且在前述保持時間的峰值溫度成為270~330℃的方式加熱的加熱工程;在前述基板的加熱溫度達到227℃之前將加熱氛圍減壓至100Pa以下、或當前述基板的加熱溫度到達前述加熱溫度域之後經過20秒以後開始減壓將加熱氛圍減壓至100Pa以下,開始前述減壓之後到使前述加熱氛圍回到0.8 氣壓以上的氣壓域為止的時間即減壓時間為30秒~4分的減壓工程;前述加熱工程後,將前述Sn-Sb金屬間化合物相的析出開始溫度~230℃的溫度域在5秒以上2分以內冷卻的冷卻工程。
  31. 如請求項30記載的焊接接頭的形成方法,其中,前述加熱工程具備:在前述基板的加熱溫度到達227℃之前,以150~220℃的溫度域進行2~10分間加熱的預備加熱工程。
  32. 如請求項30或31記載的焊接接頭的形成方法,前述減壓工程,在到開始前述冷卻工程的5秒~2分前為止,使前述加熱氛圍回到0.8氣壓以上的壓力。
  33. 如請求項30或31記載的焊接接頭的形成方法,其中,前述減壓工程,在前述基板的加熱溫度到達前述加熱溫度域之後20秒~3分後開始。
  34. 如請求項32記載的焊接接頭的形成方法,其中,前述減壓工程,在前述基板的加熱溫度到達前述加熱溫度域之後20秒~3分後開始。
  35. 如請求項30或31記載的焊接接頭的形成方法,其中, 前述減壓工程,在前述減壓時間內進行複數次。
  36. 如請求項32記載的焊接接頭的形成方法,其中,前述減壓工程,在前述減壓時間內進行複數次。
  37. 如請求項33記載的焊接接頭的形成方法,其中,前述減壓工程,在前述減壓時間內進行複數次。
  38. 如請求項34記載的焊接接頭的形成方法,其中,前述減壓工程,在前述減壓時間內進行複數次。
TW107138513A 2017-10-31 2018-10-31 焊接接頭、及焊接接頭的形成方法 TWI703645B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017211000 2017-10-31
JP2017-211000 2017-10-31

Publications (2)

Publication Number Publication Date
TW201923913A TW201923913A (zh) 2019-06-16
TWI703645B true TWI703645B (zh) 2020-09-01

Family

ID=66331937

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107138513A TWI703645B (zh) 2017-10-31 2018-10-31 焊接接頭、及焊接接頭的形成方法

Country Status (9)

Country Link
US (1) US10968932B2 (zh)
EP (1) EP3706161A4 (zh)
JP (1) JP6643749B2 (zh)
KR (1) KR102133765B1 (zh)
CN (1) CN111344844B (zh)
MY (1) MY190755A (zh)
PH (1) PH12020550504A1 (zh)
TW (1) TWI703645B (zh)
WO (1) WO2019088068A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102596758B1 (ko) * 2018-10-24 2023-11-03 삼성전자주식회사 반도체 패키지
JPWO2023053901A1 (zh) * 2021-09-30 2023-04-06
EP4212278A4 (en) * 2021-11-30 2023-09-06 Tamura Corporation SOLDER ALLOY, SOLDER JOINT, SOLDER PASTE, AND SEMICONDUCTOR PACKAGE

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001196393A (ja) * 2000-01-12 2001-07-19 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2006108604A (ja) * 2004-09-08 2006-04-20 Denso Corp 半導体装置およびその製造方法
WO2010047139A1 (ja) * 2008-10-24 2010-04-29 三菱電機株式会社 はんだ合金および半導体装置
JP2015173215A (ja) * 2014-03-12 2015-10-01 株式会社東芝 半導体装置及びその製造方法
WO2015152387A1 (ja) * 2014-04-02 2015-10-08 千住金属工業株式会社 Led用はんだ合金およびledモジュール

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3033378B2 (ja) 1993-02-19 2000-04-17 株式会社日立製作所 半導体装置及び半導体装置の製造方法
JP2001144111A (ja) 1999-11-12 2001-05-25 Tanaka Electronics Ind Co Ltd 半導体装置の製造方法
JP3809806B2 (ja) 2002-03-29 2006-08-16 富士電機デバイステクノロジー株式会社 半導体装置の製造方法
JP2005205418A (ja) 2004-01-20 2005-08-04 Denso Corp 接合構造体の製造方法
JP2007053268A (ja) 2005-08-19 2007-03-01 Toyota Motor Corp 接合構造体の製造方法、ハンダ接合方法及びハンダ接合装置
JP5031677B2 (ja) 2008-06-18 2012-09-19 シャープ株式会社 接合構造体の製造方法
CN101380701B (zh) * 2008-10-31 2010-11-03 河南科技大学 一种高温无铅软钎料及制备方法
JP2013004894A (ja) * 2011-06-21 2013-01-07 Panasonic Corp 半導体接合構造体及びその製造方法
TWI476878B (zh) * 2012-05-10 2015-03-11 Univ Nat Chiao Tung 包含有具優選方向成長之CuSn晶粒之電性連接結構及其製備方法
JP2015077601A (ja) 2013-04-02 2015-04-23 千住金属工業株式会社 鉛フリーはんだ合金
KR102217782B1 (ko) * 2013-05-10 2021-02-18 후지 덴키 가부시키가이샤 반도체 장치 및 반도체 장치의 제조방법
JP6365919B2 (ja) 2013-09-27 2018-08-01 富士電機株式会社 半導体装置の製造方法
CN105609434B (zh) * 2015-12-25 2018-03-27 通富微电子股份有限公司 晶圆片级芯片封装凸点的返工方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001196393A (ja) * 2000-01-12 2001-07-19 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2006108604A (ja) * 2004-09-08 2006-04-20 Denso Corp 半導体装置およびその製造方法
WO2010047139A1 (ja) * 2008-10-24 2010-04-29 三菱電機株式会社 はんだ合金および半導体装置
JP2015173215A (ja) * 2014-03-12 2015-10-01 株式会社東芝 半導体装置及びその製造方法
WO2015152387A1 (ja) * 2014-04-02 2015-10-08 千住金属工業株式会社 Led用はんだ合金およびledモジュール

Also Published As

Publication number Publication date
CN111344844A (zh) 2020-06-26
JP6643749B2 (ja) 2020-02-12
EP3706161A1 (en) 2020-09-09
KR20200046121A (ko) 2020-05-06
WO2019088068A1 (ja) 2019-05-09
PH12020550504A1 (en) 2021-03-22
US20200284282A1 (en) 2020-09-10
KR102133765B1 (ko) 2020-07-14
EP3706161A4 (en) 2021-03-10
TW201923913A (zh) 2019-06-16
US10968932B2 (en) 2021-04-06
CN111344844B (zh) 2021-02-12
JPWO2019088068A1 (ja) 2020-04-02
MY190755A (en) 2022-05-12

Similar Documents

Publication Publication Date Title
TWI587316B (zh) High temperature lead free solder alloy
JP5598592B2 (ja) パワーモジュール
JP4391276B2 (ja) 半導体実装用半田合金とその製造方法、及び半田ボール、電子部材
TWI703645B (zh) 焊接接頭、及焊接接頭的形成方法
JP5186719B2 (ja) セラミックス配線基板、その製造方法及び半導体モジュール
WO2017217145A1 (ja) はんだ接合部
JP6128211B2 (ja) 半導体装置および半導体装置の製造方法
JP2011124585A (ja) セラミックス配線基板、その製造方法及び半導体モジュール
JP3796181B2 (ja) 無鉛ハンダ合金、ハンダボール及びハンダバンプを有する電子部材
JP2017075382A (ja) 無酸素銅板、無酸素銅板の製造方法およびセラミック配線基板
TW201522667A (zh) Au-Sn-Ag系焊接合金、以及使用此Au-Sn-Ag系焊接合金密封之電子零件及電子零件搭載裝置
CN111435646B (zh) 半导体装置及其制造方法
TWI725664B (zh) 焊料合金、焊料膏、焊料預形體及焊料接頭
TWI442987B (zh) Bi-Al-Zn系無鉛焊料合金
JP5526336B2 (ja) 半田層及びそれを用いたデバイス接合用基板並びにその製造方法
JP5227427B2 (ja) 接合構造体、及び接合材料
JP6528559B2 (ja) セラミックス/アルミニウム接合体の製造方法、パワーモジュール用基板の製造方法、及び、セラミックス/アルミニウム接合体、パワーモジュール用基板
WO2011036829A1 (ja) 半導体装置及びその製造方法
JP6299442B2 (ja) パワーモジュール
TW202007465A (zh) 焊料合金及焊接接頭
KR102247498B1 (ko) 솔더 합금, 솔더볼 및 그 제조방법
JP2017147285A (ja) PbフリーZn−Al系合金はんだと金属母材とのクラッド材によって接合された接合体
JP2023106062A (ja) はんだおよび半導体装置
Hsu et al. Fluxless Tin Bonding Process With Suppressed Intermetallic Growth
JP2018149554A (ja) PbフリーBi系はんだ合金、該はんだ合金を用いた電子部品、および電子部品実装基板