TWI701555B - 主控器件、從屬器件及用於操作其等之方法 - Google Patents

主控器件、從屬器件及用於操作其等之方法 Download PDF

Info

Publication number
TWI701555B
TWI701555B TW105127586A TW105127586A TWI701555B TW I701555 B TWI701555 B TW I701555B TW 105127586 A TW105127586 A TW 105127586A TW 105127586 A TW105127586 A TW 105127586A TW I701555 B TWI701555 B TW I701555B
Authority
TW
Taiwan
Prior art keywords
line
slave
master
slave device
address
Prior art date
Application number
TW105127586A
Other languages
English (en)
Chinese (zh)
Other versions
TW201712555A (zh
Inventor
拉藍 傑 米序拉
理查 多明尼克 韋特費爾德
Original Assignee
美商高通公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美商高通公司 filed Critical 美商高通公司
Publication of TW201712555A publication Critical patent/TW201712555A/zh
Application granted granted Critical
Publication of TWI701555B publication Critical patent/TWI701555B/zh

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
TW105127586A 2015-09-21 2016-08-26 主控器件、從屬器件及用於操作其等之方法 TWI701555B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/860,568 2015-09-21
US14/860,568 US9990316B2 (en) 2015-09-21 2015-09-21 Enhanced serial peripheral interface

Publications (2)

Publication Number Publication Date
TW201712555A TW201712555A (zh) 2017-04-01
TWI701555B true TWI701555B (zh) 2020-08-11

Family

ID=56853908

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105127586A TWI701555B (zh) 2015-09-21 2016-08-26 主控器件、從屬器件及用於操作其等之方法

Country Status (8)

Country Link
US (2) US9990316B2 (https=)
EP (1) EP3353668B1 (https=)
JP (1) JP2018527678A (https=)
KR (1) KR20180054780A (https=)
CN (1) CN108027797A (https=)
CA (1) CA2996419A1 (https=)
TW (1) TWI701555B (https=)
WO (1) WO2017053010A1 (https=)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10055376B1 (en) * 2015-01-15 2018-08-21 Maxim Integrated Products, Inc. Serial peripheral interface system with slave expander
US9990316B2 (en) 2015-09-21 2018-06-05 Qualcomm Incorporated Enhanced serial peripheral interface
JP6652702B2 (ja) * 2015-12-25 2020-02-26 富士通クライアントコンピューティング株式会社 伝送システムおよびマスタ装置
US10250376B2 (en) * 2016-01-29 2019-04-02 Analog Devices, Inc. Clock sustain in the absence of a reference clock in a communication system
US11030142B2 (en) * 2017-06-28 2021-06-08 Intel Corporation Method, apparatus and system for dynamic control of clock signaling on a bus
US10372663B2 (en) * 2017-07-25 2019-08-06 Qualcomm Incorporated Short address mode for communicating waveform
TW201915818A (zh) * 2017-10-05 2019-04-16 香港商印芯科技股份有限公司 光學識別模組
CN107832250B (zh) * 2017-11-02 2020-10-30 北京中电华大电子设计有限责任公司 一种基于spi的主从通讯时序方法
US10534733B2 (en) * 2018-04-26 2020-01-14 EMC IP Holding Company LLC Flexible I/O slot connections
TWI671638B (zh) * 2018-05-24 2019-09-11 新唐科技股份有限公司 匯流排系統
CN109582616B (zh) * 2018-12-05 2020-07-17 北京爱其科技有限公司 基于串行总线的通信系统和方法
US20220156222A1 (en) * 2019-01-15 2022-05-19 Christoph HELDEIS Keyboard, bus unit, bus control unit and method for operating a keyboard
US11928069B2 (en) * 2019-01-15 2024-03-12 Christoph HELDEIS Optical output device, bus unit, bus control unit and methods
CN109902046B (zh) * 2019-02-01 2020-03-20 福瑞泰克智能系统有限公司 一种用于串行外围总线系统的通信方法、相关设备及系统
CN109873741B (zh) * 2019-02-25 2019-12-31 南京金信通信息服务有限公司 一种单线共享总线协议的系统和工作方法
US10884972B2 (en) * 2019-05-08 2021-01-05 Analog Devices, Inc. Communication systems with serial peripheral interface functionality
EP3780558B1 (en) * 2019-08-14 2025-02-19 Schneider Electric Industries SAS Addressing of slave devices using iterative power activation
DE102019125493B4 (de) 2019-09-23 2025-03-20 Infineon Technologies Ag Slaveeinrichtung, Bussystem und Verfahren
US11188495B2 (en) * 2020-01-31 2021-11-30 Infineon Technologies Ag SPI broadcast mode
US11106620B1 (en) * 2020-04-07 2021-08-31 Qualcomm Incorporated Mixed signal device address assignment
US11088815B1 (en) * 2020-10-02 2021-08-10 Qualcomm Incorporated Techniques for timed-trigger and interrupt coexistence
US11119971B1 (en) 2020-10-15 2021-09-14 Texas Instruments Incorporated I2C standard compliant bidirectional buffer
US11379402B2 (en) * 2020-10-20 2022-07-05 Micron Technology, Inc. Secondary device detection using a synchronous interface
US11379401B2 (en) * 2020-10-20 2022-07-05 Micron Technology, Inc. Deferred communications over a synchronous interface
US11334512B1 (en) 2021-02-12 2022-05-17 Qualcomm Incorporated Peripheral access control for secondary communication channels in power management integrated circuits
CN112882979B (zh) * 2021-03-15 2024-08-30 广东拓斯达科技股份有限公司 一种通信系统和方法
TWI773247B (zh) * 2021-04-13 2022-08-01 新唐科技股份有限公司 匯流排系統
TWI791271B (zh) 2021-08-25 2023-02-01 新唐科技股份有限公司 匯流排系統
US11847087B2 (en) * 2021-09-16 2023-12-19 Qualcomm Incorporated Systems and methods for chip operation using serial peripheral interface (SPI) with reduced pin options
US11609877B1 (en) * 2021-09-24 2023-03-21 Qualcomm Incorporated Systems and methods for chip operation using serial peripheral interface (SPI) without a chip select pin
CN115996434B (zh) * 2021-10-18 2025-11-28 大唐移动通信设备有限公司 一种参数配置方法及装置
US11847083B2 (en) * 2021-12-16 2023-12-19 Himax Technologies Limited Daisy-chain SPI integrated circuit and operation method thereof
TWI812194B (zh) * 2022-04-27 2023-08-11 凌通科技股份有限公司 序列周邊介面相容性擴展切換方法與使用其之嵌入式系統
CN114996184B (zh) * 2022-06-13 2024-01-30 南京观海微电子有限公司 兼容实现spi或i2c从机的接口模块及数据传输方法
US12056078B2 (en) * 2022-07-29 2024-08-06 Semiconductor Components Industries, Llc Addressing multiphase power stage modules for power state and thermal management
US12130765B2 (en) 2022-10-10 2024-10-29 Hewlett Packard Enterprise Development Lp Sharing communication lines among multiple buses
EP4386570A1 (en) * 2022-12-14 2024-06-19 Televic Rail Improved circuit integration
JP2024118727A (ja) * 2023-02-21 2024-09-02 シャープセミコンダクターイノベーション株式会社 電子機器
CN116166594B (zh) * 2023-04-26 2023-07-18 闪极科技(深圳)有限公司 一种单地址多从机的iic总线电路及其传输方法和装置
KR102844371B1 (ko) 2023-06-07 2025-08-08 한국알프스 주식회사 다중 스위치 신호의 단일 핀 입력에 의한 웨이크업 기능을 갖는 디바이스

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080183928A1 (en) * 2007-01-29 2008-07-31 Microsemi Corp. - Analog Mixed Signal Group Ltd. Addressable Serial Peripheral Interface
US7467204B2 (en) * 2005-02-10 2008-12-16 International Business Machines Corporation Method for providing low-level hardware access to in-band and out-of-band firmware
US20100131676A1 (en) * 2008-11-25 2010-05-27 Spansion Llc Spi addressing beyond 24-bits
TW201112002A (en) * 2009-09-29 2011-04-01 Hon Hai Prec Ind Co Ltd Data transmission device and method based on serial peripheral interface
TW201128348A (en) * 2009-09-30 2011-08-16 Via Tech Inc Method for generating multiple serial bus chip selects using single chip select signal and modulation of clock signal frequency
US20130275636A1 (en) * 2012-04-12 2013-10-17 International Business Machines Corporation Accessing peripheral devices

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3587635T2 (de) * 1984-10-04 1994-04-21 Bull Hn Information Syst Plattenspeichersteuergerät mit geteiltem Adressenregister.
US5878234A (en) 1996-09-10 1999-03-02 Sierra Wireless, Inc. Low power serial protocol translator for use in multi-circuit board electronic systems
US20020108011A1 (en) 2000-12-11 2002-08-08 Reza Tanha Dual interface serial bus
US7304950B2 (en) 2003-12-15 2007-12-04 Finisar Corporation Two-wire interface having dynamically adjustable data fields depending on operation code
US8667194B2 (en) 2003-12-15 2014-03-04 Finisar Corporation Two-wire interface in which a master component monitors the data line during the preamble generation phase for synchronization with one or more slave components
US7287208B2 (en) 2003-12-15 2007-10-23 Finisar Corporation Two-wire interface having embedded per frame reliability information
JP2006171930A (ja) * 2004-12-14 2006-06-29 Seiko Epson Corp 記憶装置および記憶装置を備える印刷記録材容器
US20060143348A1 (en) 2004-12-29 2006-06-29 Wilson Matthew T System, method, and apparatus for extended serial peripheral interface
US8316158B1 (en) 2007-03-12 2012-11-20 Cypress Semiconductor Corporation Configuration of programmable device using a DMA controller
DE102007024737A1 (de) * 2007-05-25 2008-11-27 Robert Bosch Gmbh Datenübertragungsverfahren zwischen Master- und Slave-Einrichtungen
CN101499046A (zh) * 2008-01-30 2009-08-05 鸿富锦精密工业(深圳)有限公司 Spi设备通信电路
US8719613B2 (en) * 2010-01-28 2014-05-06 Futurewei Technologies, Inc. Single-wire serial interface with delay module for full clock rate data communication between master and slave devices
TWI547784B (zh) 2011-04-22 2016-09-01 緯創資通股份有限公司 動態調整匯流排時脈的方法及其裝置
US8732366B2 (en) 2012-04-30 2014-05-20 Freescale Semiconductor, Inc. Method to configure serial communications and device thereof
US9274997B2 (en) * 2012-05-02 2016-03-01 Smsc Holdings S.A.R.L. Point-to-point serial peripheral interface for data communication between devices configured in a daisy-chain
US9003091B2 (en) 2012-10-18 2015-04-07 Hewlett-Packard Development Company, L.P. Flow control for a Serial Peripheral Interface bus
CN103500154B (zh) * 2013-09-11 2016-09-21 深圳市摩西尔电子有限公司 一种串行总线接口芯片、串行总线传输系统及方法
US9411772B2 (en) * 2014-06-30 2016-08-09 Echelon Corporation Multi-protocol serial nonvolatile memory interface
JP6428132B2 (ja) * 2014-10-10 2018-11-28 株式会社デンソー 通信装置
JP2016111651A (ja) * 2014-12-10 2016-06-20 本田技研工業株式会社 制御システム
US9990316B2 (en) 2015-09-21 2018-06-05 Qualcomm Incorporated Enhanced serial peripheral interface

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7467204B2 (en) * 2005-02-10 2008-12-16 International Business Machines Corporation Method for providing low-level hardware access to in-band and out-of-band firmware
US20080183928A1 (en) * 2007-01-29 2008-07-31 Microsemi Corp. - Analog Mixed Signal Group Ltd. Addressable Serial Peripheral Interface
US20100131676A1 (en) * 2008-11-25 2010-05-27 Spansion Llc Spi addressing beyond 24-bits
TW201112002A (en) * 2009-09-29 2011-04-01 Hon Hai Prec Ind Co Ltd Data transmission device and method based on serial peripheral interface
TW201128348A (en) * 2009-09-30 2011-08-16 Via Tech Inc Method for generating multiple serial bus chip selects using single chip select signal and modulation of clock signal frequency
US20130275636A1 (en) * 2012-04-12 2013-10-17 International Business Machines Corporation Accessing peripheral devices

Also Published As

Publication number Publication date
US10289582B2 (en) 2019-05-14
EP3353668A1 (en) 2018-08-01
US20180267916A1 (en) 2018-09-20
US9990316B2 (en) 2018-06-05
TW201712555A (zh) 2017-04-01
CA2996419A1 (en) 2017-03-30
JP2018527678A (ja) 2018-09-20
US20170083467A1 (en) 2017-03-23
CN108027797A (zh) 2018-05-11
EP3353668B1 (en) 2020-02-26
WO2017053010A1 (en) 2017-03-30
KR20180054780A (ko) 2018-05-24

Similar Documents

Publication Publication Date Title
TWI701555B (zh) 主控器件、從屬器件及用於操作其等之方法
JP2018527678A5 (https=)
CN112639756B (zh) 混合模式射频前端接口
US8667204B2 (en) Method to differentiate identical devices on a two-wire interface
US8266360B2 (en) I2C-bus interface with parallel operational mode
EP3095038B1 (en) Camera control interface extension with in-band interrupt
US10241955B2 (en) Dynamically adjustable multi-line bus shared by multi-protocol devices
CN112416841A (zh) 基于i2c总线的多机通信的实现方法及多机通信系统
KR101823315B1 (ko) 가변 프레임 길이를 갖는 2-와이어 인터페이스 시스템에 대한 임피던스-기반 플로우 제어
US11436176B2 (en) Semiconductor integrated circuit and operation method thereof
TWI646431B (zh) 用於單一導線程式化及除錯之微控制器及方法
CN106462516A (zh) 由多协议设备共享的可动态地调节的多线总线
JP2008539498A (ja) 単一のi2cデータストリームからの並列i2cスレーブデバイスのプログラミング
CN107209739A (zh) 电压模式和电流模式设备枚举
CN108604219B (zh) 具有最优传输等待时间的串行通信链路
JP2017528830A (ja) 修正型uartインターフェースを有する可変フレーム長仮想gpio
CN110532211A (zh) 总线系统
JP2008539497A (ja) 集積回路間におけるスレーブ装置の装置識別コーディング
TW202014904A (zh) I3c上的低等待時間虛擬通用輸入/輸出
CN105474193A (zh) 用于将来自外围设备的irq线的数量最小化到一条导线的方法
TW200917040A (en) Bus width arbitration
CN106874228A (zh) 基于i2c总线的控制器及通信方法、多控制器间的通信方法
CN111130678B (zh) 数据传输方法、装置、设备及计算机可读存储介质
US9880968B2 (en) Bi-directional communication between electronic components
CN118820139A (zh) 非标准接口外部设备控制方法、片上系统、设备及介质

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees