CA2996419A1 - Enhanced serial peripheral interface - Google Patents

Enhanced serial peripheral interface Download PDF

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Publication number
CA2996419A1
CA2996419A1 CA2996419A CA2996419A CA2996419A1 CA 2996419 A1 CA2996419 A1 CA 2996419A1 CA 2996419 A CA2996419 A CA 2996419A CA 2996419 A CA2996419 A CA 2996419A CA 2996419 A1 CA2996419 A1 CA 2996419A1
Authority
CA
Canada
Prior art keywords
line
slave
master device
master
serial peripheral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA2996419A
Other languages
English (en)
French (fr)
Inventor
Lalan Jee MISHRA
Richard Dominic Wietfeldt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CA2996419A1 publication Critical patent/CA2996419A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
CA2996419A 2015-09-21 2016-08-26 Enhanced serial peripheral interface Abandoned CA2996419A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/860,568 2015-09-21
US14/860,568 US9990316B2 (en) 2015-09-21 2015-09-21 Enhanced serial peripheral interface
PCT/US2016/049105 WO2017053010A1 (en) 2015-09-21 2016-08-26 Enhanced serial peripheral interface

Publications (1)

Publication Number Publication Date
CA2996419A1 true CA2996419A1 (en) 2017-03-30

Family

ID=56853908

Family Applications (1)

Application Number Title Priority Date Filing Date
CA2996419A Abandoned CA2996419A1 (en) 2015-09-21 2016-08-26 Enhanced serial peripheral interface

Country Status (8)

Country Link
US (2) US9990316B2 (https=)
EP (1) EP3353668B1 (https=)
JP (1) JP2018527678A (https=)
KR (1) KR20180054780A (https=)
CN (1) CN108027797A (https=)
CA (1) CA2996419A1 (https=)
TW (1) TWI701555B (https=)
WO (1) WO2017053010A1 (https=)

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US11106620B1 (en) * 2020-04-07 2021-08-31 Qualcomm Incorporated Mixed signal device address assignment
US11088815B1 (en) * 2020-10-02 2021-08-10 Qualcomm Incorporated Techniques for timed-trigger and interrupt coexistence
US11119971B1 (en) 2020-10-15 2021-09-14 Texas Instruments Incorporated I2C standard compliant bidirectional buffer
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US11334512B1 (en) 2021-02-12 2022-05-17 Qualcomm Incorporated Peripheral access control for secondary communication channels in power management integrated circuits
CN112882979B (zh) * 2021-03-15 2024-08-30 广东拓斯达科技股份有限公司 一种通信系统和方法
TWI773247B (zh) * 2021-04-13 2022-08-01 新唐科技股份有限公司 匯流排系統
TWI791271B (zh) 2021-08-25 2023-02-01 新唐科技股份有限公司 匯流排系統
US11847087B2 (en) * 2021-09-16 2023-12-19 Qualcomm Incorporated Systems and methods for chip operation using serial peripheral interface (SPI) with reduced pin options
US11609877B1 (en) * 2021-09-24 2023-03-21 Qualcomm Incorporated Systems and methods for chip operation using serial peripheral interface (SPI) without a chip select pin
CN115996434B (zh) * 2021-10-18 2025-11-28 大唐移动通信设备有限公司 一种参数配置方法及装置
US11847083B2 (en) * 2021-12-16 2023-12-19 Himax Technologies Limited Daisy-chain SPI integrated circuit and operation method thereof
TWI812194B (zh) * 2022-04-27 2023-08-11 凌通科技股份有限公司 序列周邊介面相容性擴展切換方法與使用其之嵌入式系統
CN114996184B (zh) * 2022-06-13 2024-01-30 南京观海微电子有限公司 兼容实现spi或i2c从机的接口模块及数据传输方法
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CN116166594B (zh) * 2023-04-26 2023-07-18 闪极科技(深圳)有限公司 一种单地址多从机的iic总线电路及其传输方法和装置
KR102844371B1 (ko) 2023-06-07 2025-08-08 한국알프스 주식회사 다중 스위치 신호의 단일 핀 입력에 의한 웨이크업 기능을 갖는 디바이스

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Also Published As

Publication number Publication date
US10289582B2 (en) 2019-05-14
EP3353668A1 (en) 2018-08-01
US20180267916A1 (en) 2018-09-20
TWI701555B (zh) 2020-08-11
US9990316B2 (en) 2018-06-05
TW201712555A (zh) 2017-04-01
JP2018527678A (ja) 2018-09-20
US20170083467A1 (en) 2017-03-23
CN108027797A (zh) 2018-05-11
EP3353668B1 (en) 2020-02-26
WO2017053010A1 (en) 2017-03-30
KR20180054780A (ko) 2018-05-24

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FZDE Discontinued

Effective date: 20200831

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Effective date: 20240819

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Effective date: 20250114