TWI646637B - 薄膜覆晶封裝結構及其可撓性基板 - Google Patents

薄膜覆晶封裝結構及其可撓性基板 Download PDF

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TWI646637B
TWI646637B TW107105137A TW107105137A TWI646637B TW I646637 B TWI646637 B TW I646637B TW 107105137 A TW107105137 A TW 107105137A TW 107105137 A TW107105137 A TW 107105137A TW I646637 B TWI646637 B TW I646637B
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groove
flexible substrate
item
thin
patent application
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TW107105137A
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TW201935620A (zh
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謝慶堂
Chin-Tang Hsieh
李俊德
Chun-Te Lee
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頎邦科技股份有限公司
Chipbond Technology Corporation
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Priority to TW107105137A priority Critical patent/TWI646637B/zh
Priority to US15/952,814 priority patent/US10580729B2/en
Priority to CN201810339871.4A priority patent/CN110164825B/zh
Priority to JP2018078830A priority patent/JP6653345B2/ja
Priority to KR1020180045458A priority patent/KR102027393B1/ko
Application granted granted Critical
Publication of TWI646637B publication Critical patent/TWI646637B/zh
Publication of TW201935620A publication Critical patent/TW201935620A/zh

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Abstract

一種薄膜覆晶封裝結構具有一晶片及一可撓性基板，該可撓性基板具有一薄膜及一線路層，該線路層形成於該薄膜之一第一表面並電性連接該晶片，至少一凹槽凹設於該薄膜之一第二表面，當該可撓性基板與外部電子元件接合時，會被彎折而形成複數個平板部及至少一彎折部，該彎折部位於該些平板部之間，其中該凹槽位於該彎折部，可避免該可撓性基板之該彎折部斷裂。

Description

薄膜覆晶封裝結構及其可撓性基板
本發明關於一種薄膜覆晶封裝結構，特別是一種可避免因彎折導致斷裂之薄膜覆晶封裝結構。
驅動IC為消費電子產品顯示器之重要元件，其多以薄膜覆晶封裝(Chip On Film, COF)或晶片載體封裝(Tape Carrier Package, TCP)技術進行封裝，以熱壓合方式使晶片上之凸塊與軟性電路基板之內引腳接合，而位於軟性電路基板兩端之外引腳分別與顯示器面板及控制訊號之電路板接合。由於顯示器已逐步朝向薄型化及全螢幕方向發展，軟性電路基板接合顯示器面板及電路板時必須彎折以符合配置需求，然而位於軟性電路基板彎折處的元件容易受彎曲應力影響而損壞或斷裂，因此必須尋求解決方案以有效減少彎曲應力的影響。
本發明之一目的在於提供一種薄膜覆晶封裝結構，其包含一晶片及一可撓性基板，該可撓性基板具有一薄膜及一線路層，該薄膜具有一第一表面及相對於該第一表面之一第二表面，該線路層形成於該第一表面並電性連接該晶片，至少一凹槽凹設於該第二表面，該凹槽具有一槽底面，其中該可撓性基板以位於該第一表面之該線路層與外部電子元件接合時，該可撓性基板被彎折而形成有複數個平板部及至少一彎折部，該彎折部位於該些平板部之間，該凹槽位於該彎折部。
本發明之另一目的在於提供一種可撓性基板，其包含一薄膜及一線路層，該薄膜具有一第一表面及相對於該第一表面之一第二表面，該線路層形成於該第一表面，至少一凹槽凹設於該第二表面，該凹槽具有一槽底面，其中該可撓性基板以位於該第一表面之該線路層與外部電子元件接合時，該可撓性基板被彎折而形成有複數個平板部及至少一彎折部，該彎折部位於該些平板部之間，該凹槽位於該彎折部。
本發明藉由形成該凹槽以薄化位於該彎折部之該薄膜，因此可提昇其可撓性，避免位於該可撓性基板之該線路層或其他元件受彎曲應力影響而損壞或斷裂。
請參閱第1圖，其為本發明之第一實施例，一種薄膜覆晶封裝結構A包含有一晶片100及一可撓性基板200，較佳地，該薄膜覆晶封裝結構A另包含一封裝膠體300，該封裝膠體300填充於該晶片100及該可撓性基板200之間，該封裝膠體300可為底部填充膠(underfill)，但本發明不以此為限制。
請參閱第1圖，該可撓性基板200具有一薄膜210及一線路層220，該薄膜210具有一第一表面211及相對於該第一表面211之一第二表面212，該線路層220形成於該第一表面211並電性連接該晶片100，在該第一實施例中，該可撓性基板200另具有一保護層230，該保護層230覆蓋該第一表面211及該線路層220，較佳地，該薄膜210為聚醯亞胺薄膜(PI film)，該線路層220為銅線路，該保護層230為防焊漆(solder resist)，但本發明不以此為限制。
請參閱第1圖，一晶片設置區211a位於該第一表面211，該保護層230顯露該晶片設置區211a，該晶片100設置於該晶片設置區211a以電性連接該線路層220，其中該晶片100之一主動面110設置有複數個凸塊120，該些凸塊120用以電性連接該線路層220，該些凸塊120之材質可為金、銅、銀、鎳或其合金。
請參閱第1及2圖，於該可撓性基板200以位於該第一表面211之該線路層220與外部電子元件接合時，該可撓性基板200會被彎折而形成有複數個平板部240及至少一彎折部250，該彎折部250位於該些平板部240之間，在該第一實施例中，該可撓性基板200被彎折後形成一第一平板部240a、一第二平板部 240b及該彎折部250，該彎折部250位於該第一平板部240a及該第二平板部240b之間，該第一平板部240a與一顯示器面板P1接合，該第二平板部240b與一電路板P2接合，較佳地，該晶片設置區211a位於該第二平板部240b之內緣。
請參閱第1及2圖，至少一凹槽260凹設於該薄膜210之該第二表面212，該凹槽260係由雷射燒蝕該薄膜210所形成，藉由控制雷射能量及燒蝕時間，使該凹槽260未貫穿該薄膜210且具有一槽底面261，較佳地，係使用波長介於355~1064nm的雷射光束燒蝕該薄膜210以形成該凹槽260，該槽底面261與該薄膜210之該第一表面211之間具有一厚度，該厚度為該槽底面261及該第一表面211之間的最短距離，其中該厚度不小於6μm，較佳地，該厚度介於6-15μm之間，在本實施例中，係使用波長355nm的雷射光束燒蝕該薄膜210，使該厚度實質上等於15μm。
請參閱第1及2圖，該凹槽260係形成於該可撓性基板200之預定彎折區域，因此當彎折該可撓性基板200時，該凹槽260會位於該彎折部250，因此相對位於該第一平板部240a及該第二平板部240b之該薄膜210，位於該彎折部250之該薄膜210較為薄化，較佳地，該可撓性基板200係朝向該第一表面211方向彎折，使得該凹槽260位於該彎折部250之外緣，而部份之該線路層220位於該保護層230及該凹槽260之間，因此該凹槽260可避免位於該彎折部250之該線路層220及該保護層230受彎曲應力影響而損壞或斷裂。
請參閱第3及4圖，其為本發明之第二實施例，該第二實施例與該第一實施例之差異在於該晶片設置區211a的位置，在該第二實施例中，該晶片設置區211a位於該彎折部250，即該晶片設置區211a位於對應該凹槽260之該第一表面211上，而部份之該線路層220位於該晶片100及該凹槽260之間，由於填充於該 晶片100及該可撓性基板200之間的該封裝膠體300會導致應力集中於該彎折部250，因此於相同方向，該凹槽260之寬度不小於該晶片100及該封裝膠體300之寬度，使該凹槽260的形成範圍完全涵蓋該晶片100及該封裝膠體300，以避免該晶片100因該彎折部250及該封裝膠體300所造成的應力而脫落損壞。
請參閱第5及6圖，其為本發明之第三實施例，該第三實施例與該第一實施例之差異在於該可撓性基板200被彎折後形成有該第一平板部240a、該第二平板部240b、一第三平板部240c、一第一彎折部250a及一第二彎折部250b，該第一彎折部250a位於該第一平板部240a及該第三平板部240c之間，該第二彎折部250b位於該第二平板部240b及該第三平板部240c之間，在該第三實施例中，一第一凹槽260a及一第二凹槽260b凹設於該薄膜210之該第二表面212，且當該可撓性基板200被彎折時，該第一凹槽260a及該第二凹槽260b分別位於該第一彎折部250a及該第二彎折部250b。
請參閱第6圖，較佳地，該第一凹槽260a及該第二凹槽260b分別位於該第一彎折部250a及該第二彎折部250b之外緣，由於部份之該線路層220位於該保護層230及該第一凹槽260a之間，且部份之該線路層220位於該保護層230及該第二凹槽260b之間，因此藉由該第一凹槽260a及該第二凹槽260b的設置，可避免位於該第一彎折部250a及該第二彎折部250b之該線路層220及該保護層230因應力而導致剝離的情形發生。
請參閱第5及6圖，在該第三實施例中，該晶片設置區211a位於該第三平板部240c之該第一表面211且位於該第一彎折部250a及該第二彎折部250b之間，因此設置於該第三平板部240c之該晶片100亦位於該第一彎折部250a及該第二彎折部250b之間。
由於該晶片100的硬度較高，位於該晶片設置區211a之該薄膜210不會因該可撓性基板200被彎折而彎曲，使得該可撓性基板200於該第一彎折部250a及該第二彎折部250b之間形成該第三平板區240c，此外，由於無須薄化位於該第三平板區240c之該薄膜210，因此該第三平板部240c可提供良好支撐力，以避免該晶片100脫離該可撓性基板200。
本發明於該可撓性基板200之該彎折部250形成該凹槽260，以薄化位於該彎折部250之該薄膜210並提昇其可撓性，可有效避免該可撓性基板200上之該線路層220、該保護層230或其他元件受彎曲應力影響而損壞或斷裂。
本發明之保護範圍當視後附之申請專利範圍所界定者為準，任何熟知此項技藝者，在不脫離本發明之精神和範圍內所作之任何變化與修改，均屬於本發明之保護範圍。
100‧‧‧晶片
110‧‧‧主動面
120‧‧‧凸塊
200‧‧‧可撓性基板
210‧‧‧薄膜
211‧‧‧第一表面
211a‧‧‧晶片設置區
212‧‧‧第二表面
220‧‧‧線路層
230‧‧‧保護層
240‧‧‧平板部
240a‧‧‧第一平板部
240b‧‧‧第二平板部
240c‧‧‧第三平板部
250‧‧‧彎折部
250a‧‧‧第一彎折部
250b‧‧‧第二彎折部
260‧‧‧凹槽
260a‧‧‧第一凹槽
260b‧‧‧第二凹槽
261‧‧‧槽底面
300‧‧‧封裝膠體
A‧‧‧薄膜覆晶封裝結構
P1‧‧‧顯示器面板
P2‧‧‧電路板
第1圖：依據本發明之第一實施例，一種薄膜覆晶封裝結構之剖視圖。
第2圖：依據本發明之第一實施例，該薄膜覆晶封裝結構與外部電子元件接合之示意圖。
第3圖：依據本發明之第二實施例，一種薄膜覆晶封裝結構之剖視圖。
第4圖：依據本發明之第二實施例，該薄膜覆晶封裝結構與外部電子元件接合之示意圖。
第5圖：依據本發明之第三實施例，一種薄膜覆晶封裝結構之剖視圖。
第6圖：依據本發明之第三實施例，該薄膜覆晶封裝結構與外部電子元件接合之示意圖。

Claims (20)

  1. 一種薄膜覆晶封裝結構，其包含：一晶片；以及一可撓性基板，具有一薄膜及一線路層，該薄膜具有一第一表面及相對於該第一表面之一第二表面，該線路層形成於該第一表面並電性連接該晶片，至少一凹槽凹設於該第二表面，該凹槽具有一槽底面，其中該可撓性基板以位於該第一表面之該線路層與外部電子元件接合時，該可撓性基板被彎折而形成有複數個平板部及至少一彎折部，該彎折部位於該些平板部之間，該凹槽位於該彎折部。
  2. 如申請專利範圍第1項所述之薄膜覆晶封裝結構，其中該凹槽係由雷射燒蝕該薄膜所形成。
  3. 如申請專利範圍第1項所述之薄膜覆晶封裝結構，其中該槽底面與該第一表面之間具有一厚度，該厚度不小於6μm。
  4. 如申請專利範圍第3項所述之薄膜覆晶封裝結構，其中該厚度介於6-15μm之間。
  5. 如申請專利範圍第1項所述之薄膜覆晶封裝結構，其中該凹槽位於該彎折部之外緣。
  6. 如申請專利範圍第1項所述之薄膜覆晶封裝結構，其中該可撓性基板另具有一保護層，該保護層覆蓋該第一表面及該線路層，部份之該線路層位於該保護層及該凹槽之間。
  7. 如申請專利範圍第1項所述之薄膜覆晶封裝結構，其中部份之該線路層位於該晶片及該凹槽之間。
  8. 如申請專利範圍第7項所述之薄膜覆晶封裝結構，其中該凹槽之寬度不小於該晶片之寬度。
  9. 如申請專利範圍第7項所述之薄膜覆晶封裝結構，其另包含一封裝膠體，該封裝膠體填充於該晶片及該可撓性基板之間，該凹槽之寬度不小於該封裝膠體之寬度。
  10. 如申請專利範圍第1項所述之薄膜覆晶封裝結構，其中該可撓性基板被彎折後形成有一第一彎折部及一第二彎折部，一第一凹槽及一第二凹槽凹設於該第二表面且分別位於該第一彎折部及該第二彎折部，該晶片位於該第一彎折部及該第二彎折部之間。
  11. 如申請專利範圍第10項所述之薄膜覆晶封裝結構，其中該可撓性基板另具有一保護層，該保護層覆蓋該第一表面及該線路層，部份之該線路層位於該保護層及該第一凹槽之間，且部份之該線路層位於該保護層及該第二凹槽之間。
  12. 一種可撓性基板，其包含：一線路層；以及一薄膜，具有一第一表面及相對於該第一表面之一第二表面，該線路層形成於該第一表面，至少一凹槽凹設於該第二表面，該凹槽具有一槽底面，其中該可撓性基板以位於該第一表面之該線路層與外部電子元件接合時，該可撓性基板被彎折而形成有複數個平板部及至少一彎折部，該彎折部位於該些平板部之間，該凹槽位於該彎折部。
  13. 如申請專利範圍第12項所述之可撓性基板，其中該凹槽係由雷射燒蝕該薄膜所形成。
  14. 如申請專利範圍第12項所述之可撓性基板，其中該槽底面與該第一表面之間具有一厚度，該厚度不小於6μm。
  15. 如申請專利範圍第14項所述之可撓性基板，其中該厚度介於6-15μm之間。
  16. 如申請專利範圍第12項所述之可撓性基板，其中該凹槽位於該彎折部之外緣。
  17. 如申請專利範圍第12項所述之可撓性基板，其另包含一保護層，該保護層覆蓋該第一表面及該線路層，部份之該線路層位於該保護層及該凹槽之間。
  18. 如申請專利範圍第12項所述之可撓性基板，其中一晶片設置區位於對應該凹槽之該第一表面。
  19. 如申請專利範圍第12項所述之可撓性基板，其中該可撓性基板被彎折後形成有一第一彎折部及一第二彎折部，一第一凹槽及一第二凹槽凹設於該第二表面且分別位於該第一彎折部及該第二彎折部，一晶片設置區位於該第一表面且位於該第一彎折部及該第二彎折部之間。
  20. 如申請專利範圍第19項所述之可撓性基板，其另包含一保護層，該保護層覆蓋該第一表面及該線路層，部份之該線路層位於該保護層及該第一凹槽之間，且部份之該線路層位於該保護層及該第二凹槽之間。
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