CN110164825A - 薄膜覆晶封装结构及其可挠性基板 - Google Patents

薄膜覆晶封装结构及其可挠性基板 Download PDF

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CN110164825A
CN110164825A CN201810339871.4A CN201810339871A CN110164825A CN 110164825 A CN110164825 A CN 110164825A CN 201810339871 A CN201810339871 A CN 201810339871A CN 110164825 A CN110164825 A CN 110164825A
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groove
base plate
flexible base
bending part
line layer
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CN110164825B (zh
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谢庆堂
李俊德
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Chipbond Technology Corp
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Chipbond Technology Corp
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Abstract

一种薄膜覆晶封装结构具有芯片及可挠性基板，该可挠性基板具有薄膜及线路层，该线路层形成于该薄膜的第一表面并电性连接该芯片，至少一个凹槽凹设于该薄膜的第二表面，当该可挠性基板与外部电子元件接合时，会被弯折而形成多个平板部及至少一个弯折部，该弯折部位于该些平板部之间，其中该凹槽位于该弯折部，可避免该可挠性基板的该弯折部断裂。

Description

薄膜覆晶封装结构及其可挠性基板
技术领域
本发明关于一种薄膜覆晶封装结构，特别是一种可避免因弯折导致断裂的薄膜覆晶封装结构。
背景技术
驱动I C为消费电子产品显示器的重要元件，其多以薄膜覆晶封装(Chip OnFilm,COF)或芯片载体封装(Tape Carrier Package,TCP)技术进行封装，以热压合方式使芯片上的凸块与软性电路基板的内引脚接合，而位于软性电路基板两端的外引脚分别与显示器面板及控制信号的电路板接合。由于显示器已逐步朝向薄型化及全荧幕方向发展，软性电路基板接合显示器面板及电路板时必须弯折以符合配置需求，然而位于软性电路基板弯折处的元件容易受弯曲应力影响而损坏或断裂，因此必须寻求解决方案以有效减少弯曲应力的影响。
发明内容
本发明的目的在于提供一种薄膜覆晶封装结构，其包含芯片及可挠性基板，该可挠性基板具有薄膜及线路层，该薄膜具有第一表面及相对于该第一表面的第二表面，该线路层形成于该第一表面并电性连接该芯片，至少一个凹槽凹设于该第二表面，该凹槽具有槽底面，其中该可挠性基板以位于该第一表面的该线路层与外部电子元件接合时，该可挠性基板被弯折而形成有多个平板部及至少一个弯折部，该弯折部位于该些平板部之间，该凹槽位于该弯折部。
所述的薄膜覆晶封装结构，其中该凹槽是由激光烧蚀该薄膜所形成。
所述的薄膜覆晶封装结构，其中该槽底面与该第一表面之间具有厚度，该厚度不小于6μm。
所述的薄膜覆晶封装结构，其中该厚度介于6-20μm之间。
所述的薄膜覆晶封装结构，其中该凹槽位于该弯折部的外缘。
所述的薄膜覆晶封装结构，其中该可挠性基板另具有保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该凹槽之间。
所述的薄膜覆晶封装结构，其中该线路层的一部分位于该芯片及该凹槽之间。
所述的薄膜覆晶封装结构，其中该凹槽的宽度不小于该芯片的宽度。
所述的薄膜覆晶封装结构，其另包含封装胶体，该封装胶体填充于该芯片及该可挠性基板之间，该凹槽的宽度不小于该封装胶体的宽度。
所述的薄膜覆晶封装结构，其中该可挠性基板被弯折后形成有第一弯折部及第二弯折部，第一凹槽及第二凹槽凹设于该第二表面且分别位于该第一弯折部及该第二弯折部，该芯片位于该第一弯折部及该第二弯折部之间。
所述的薄膜覆晶封装结构，其中该可挠性基板另具有保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该第一凹槽之间，且该线路层的一部分位于该保护层及该第二凹槽之间。
本发明的另一目的在于提供一种可挠性基板，其包含薄膜及线路层，该薄膜具有第一表面及相对于该第一表面的第二表面，该线路层形成于该第一表面，至少一个凹槽凹设于该第二表面，该凹槽具有槽底面，其中该可挠性基板以位于该第一表面的该线路层与外部电子元件接合时，该可挠性基板被弯折而形成有多个平板部及至少一个弯折部，该弯折部位于该些平板部之间，该凹槽位于该弯折部。
所述的可挠性基板，其中该凹槽是由激光烧蚀该薄膜所形成。
所述的可挠性基板，其中该槽底面与该第一表面之间具有厚度，该厚度不小于6μm。
所述的可挠性基板，其中该厚度介于6-20μm之间。
所述的可挠性基板，其中该凹槽位于该弯折部的外缘。
所述的可挠性基板，其另包含保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该凹槽之间。
所述的可挠性基板，其中芯片设置区位于对应该凹槽的该第一表面。
所述的可挠性基板，其中该可挠性基板被弯折后形成有第一弯折部及第二弯折部，第一凹槽及第二凹槽凹设于该第二表面且分别位于该第一弯折部及该第二弯折部，芯片设置区位于该第一表面且位于该第一弯折部及该第二弯折部之间。
所述的可挠性基板，其另包含保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该第一凹槽之间，且该线路层的一部分位于该保护层及该第二凹槽之间。
本发明借由形成该凹槽以薄化位于该弯折部的该薄膜，因此可提升其可挠性，避免位于该可挠性基板的该线路层或其他元件受弯曲应力影响而损坏或断裂。
附图说明
图1：依据本发明的第一实施例，一种薄膜覆晶封装结构的剖视图。
图2：依据本发明的第一实施例，该薄膜覆晶封装结构与外部电子元件接合的示意图。
图3：依据本发明的第二实施例，一种薄膜覆晶封装结构的剖视图。
图4：依据本发明的第二实施例，该薄膜覆晶封装结构与外部电子元件接合的示意图。
图5：依据本发明的第三实施例，一种薄膜覆晶封装结构的剖视图。
图6：依据本发明的第三实施例，该薄膜覆晶封装结构与外部电子元件接合的示意图。
【主要元件符号说明】
100：芯片 110：主动面
120：凸块 200：可挠性基板
210：薄膜 211：第一表面
211a：芯片设置区 212：第二表面
220：线路层 230：保护层
240：平板部 240a：第一平板部
240b：第二平板部 240c：第三平板部
250：弯折部 250a：第一弯折部
250b：第二弯折部 260：凹槽
260a：第一凹槽 260b：第二凹槽
261：槽底面 300：封装胶体
A：薄膜覆晶封装结构 P1：显示器面板
P2：电路板
具体实施方式
请参阅图1，其为本发明的第一实施例，一种薄膜覆晶封装结构A包含有芯片100及可挠性基板200，较佳地，该薄膜覆晶封装结构A另包含封装胶体300，该封装胶体300填充于该芯片100及该可挠性基板200之间，该封装胶体300可为底部填充胶(underfill)，但本发明不以此为限制。
请参阅图1，该可挠性基板200具有薄膜210及线路层220，该薄膜210具有第一表面211及相对于该第一表面211的第二表面212，该线路层220形成于该第一表面211并电性连接该芯片100，在该第一实施例中，该可挠性基板200另具有保护层230，该保护层230覆盖该第一表面211及该线路层220，较佳地，该薄膜210为聚酰亚胺薄膜(PI film)，该线路层220为铜线路，该保护层230为防焊漆(solder resist)，但本发明不以此为限制。
请参阅图1，芯片设置区211a位于该第一表面211，该保护层230显露该芯片设置区211a，该芯片100设置于该芯片设置区211a以电性连接该线路层220，其中该芯片100的主动面110设置有多个凸块120，该些凸块120用以电性连接该线路层220，该些凸块120的材质可为金、铜、银、镍或其合金。
请参阅图1和图2，当该可挠性基板200以位于该第一表面211的该线路层220与外部电子元件接合时，该可挠性基板200会被弯折而形成有多个平板部240及至少一个弯折部250，该弯折部250位于该些平板部240之间，在该第一实施例中，该可挠性基板200被弯折后形成第一平板部240a、第二平板部240b及该弯折部250，该弯折部250位于该第一平板部240a及该第二平板部240b之间，该第一平板部240a与显示器面板P1接合，该第二平板部240b与电路板P2接合，较佳地，该芯片设置区211a位于该第二平板部240b的内缘。
请参阅图1和图2，至少一个凹槽260凹设于该薄膜210的该第二表面212，该凹槽260是由激光烧蚀该薄膜210所形成，借由控制激光能量及烧蚀时间，使该凹槽260未贯穿该薄膜210且具有槽底面261，较佳地，使用波长介于355～1064nm的激光光束烧蚀该薄膜210以形成该凹槽260，该槽底面261与该薄膜210的该第一表面211之间具有厚度，该厚度为该槽底面261及该第一表面211之间的最短距离，其中该厚度不小于6μm，较佳地，该厚度介于6-20μm之间，在本实施例中，使用波长355nm的激光光束烧蚀该薄膜210，使该厚度实质上等于15μm。
请参阅图1和图2，该凹槽260形成于该可挠性基板200的预定弯折区域，因此当弯折该可挠性基板200时，该凹槽260会位于该弯折部250，因此相对位于该第一平板部240a及该第二平板部240b的该薄膜210，位于该弯折部250的该薄膜210较为薄化，较佳地，该可挠性基板200朝向该第一表面211方向弯折，使得该凹槽260位于该弯折部250的外缘，而该线路层220的一部分位于该保护层230及该凹槽260之间，因此该凹槽260可避免位于该弯折部250的该线路层220及该保护层230受弯曲应力影响而损坏或断裂。
请参阅图3和图4，其为本发明的第二实施例，该第二实施例与该第一实施例的差异在于该芯片设置区211a的位置，在该第二实施例中，该芯片设置区211a位于该弯折部250，即该芯片设置区211a位于对应该凹槽260的该第一表面211上，而该线路层220的一部分位于该芯片100及该凹槽260之间，由于填充于该芯片100及该可挠性基板200之间的该封装胶体300会导致应力集中于该弯折部250，因此于相同方向，该凹槽260的宽度不小于该芯片100及该封装胶体300的宽度，使该凹槽260的形成范围完全涵盖该芯片100及该封装胶体300，以避免该芯片100因该弯折部250及该封装胶体300所造成的应力而脱落损坏。
请参阅图5和图6，其为本发明的第三实施例，该第三实施例与该第一实施例的差异在于该可挠性基板200被弯折后形成有该第一平板部240a、该第二平板部240b、第三平板部240c、第一弯折部250a及第二弯折部250b，该第一弯折部250a位于该第一平板部240a及该第三平板部240c之间，该第二弯折部250b位于该第二平板部240b及该第三平板部240c之间，在该第三实施例中，第一凹槽260a及第二凹槽260b凹设于该薄膜210的该第二表面212，且当该可挠性基板200被弯折时，该第一凹槽260a及该第二凹槽260b分别位于该第一弯折部250a及该第二弯折部250b。
请参阅图6，较佳地，该第一凹槽260a及该第二凹槽260b分别位于该第一弯折部250a及该第二弯折部250b的外缘，由于该线路层220的一部分位于该保护层230及该第一凹槽260a之间，且该线路层220的一部分位于该保护层230及该第二凹槽260b之间，因此借由该第一凹槽260a及该第二凹槽260b的设置，可避免位于该第一弯折部250a及该第二弯折部250b的该线路层220及该保护层230因应力而导致剥离的情形发生。
请参阅图5和图6，在该第三实施例中，该芯片设置区211a位于该第三平板部240c的该第一表面211且位于该第一弯折部250a及该第二弯折部250b之间，因此设置于该第三平板部240c的该芯片100亦位于该第一弯折部250a及该第二弯折部250b之间。
由于该芯片100的硬度较高，位于该芯片设置区211a的该薄膜210不会因该可挠性基板200被弯折而弯曲，使得该可挠性基板200于该第一弯折部250a及该第二弯折部250b之间形成该第三平板区240c，此外，由于无须薄化位于该第三平板区240c的该薄膜210，因此该第三平板部240c可提供良好支撑力，以避免该芯片100脱离该可挠性基板200。
本发明于该可挠性基板200的该弯折部250形成该凹槽260，以薄化位于该弯折部250的该薄膜210并提升其可挠性，可有效避免该可挠性基板200上的该线路层220、该保护层230或其他元件受弯曲应力影响而损坏或断裂。
以上所述，仅是本发明的较佳实施例而已，并非对本发明作任何形式上的限制，虽然本发明已以较佳实施例揭露如上，然而并非用以限定本发明,任何熟悉本专业的技术人员，在不脱离本发明技术方案范围内,当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例,但凡是未脱离本发明技术方案的内容，依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本发明技术方案的范围内。

Claims (20)

1.一种薄膜覆晶封装结构，其特征在于，其包含：
芯片；以及
可挠性基板，具有薄膜及线路层，该薄膜具有第一表面及相对于该第一表面的第二表面，该线路层形成于该第一表面并电性连接该芯片，至少一个凹槽凹设于该第二表面，该凹槽具有槽底面，其中该可挠性基板以位于该第一表面的该线路层与外部电子元件接合时，该可挠性基板被弯折而形成有多个平板部及至少一个弯折部，该弯折部位于该些平板部之间，该凹槽位于该弯折部。
2.如权利要求1所述的薄膜覆晶封装结构，其特征在于，其中该凹槽是由激光烧蚀该薄膜所形成。
3.如权利要求1所述的薄膜覆晶封装结构，其特征在于，其中该槽底面与该第一表面之间具有厚度，该厚度不小于6μm。
4.如权利要求3所述的薄膜覆晶封装结构，其特征在于，其中该厚度介于6-20μm之间。
5.如权利要求1所述的薄膜覆晶封装结构，其特征在于，其中该凹槽位于该弯折部的外缘。
6.如权利要求1所述的薄膜覆晶封装结构，其特征在于，其中该可挠性基板另具有保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该凹槽之间。
7.如权利要求1所述的薄膜覆晶封装结构，其特征在于，其中该线路层的一部分位于该芯片及该凹槽之间。
8.如权利要求7所述的薄膜覆晶封装结构，其特征在于，其中该凹槽的宽度不小于该芯片的宽度。
9.如权利要求7所述的薄膜覆晶封装结构，其特征在于，其另包含封装胶体，该封装胶体填充于该芯片及该可挠性基板之间，该凹槽的宽度不小于该封装胶体的宽度。
10.如权利要求1所述的薄膜覆晶封装结构，其特征在于，其中该可挠性基板被弯折后形成有第一弯折部及第二弯折部，第一凹槽及第二凹槽凹设于该第二表面且分别位于该第一弯折部及该第二弯折部，该芯片位于该第一弯折部及该第二弯折部之间。
11.如权利要求10所述的薄膜覆晶封装结构，其特征在于，其中该可挠性基板另具有保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该第一凹槽之间，且该线路层的一部分位于该保护层及该第二凹槽之间。
12.一种可挠性基板，其特征在于，其包含：
线路层；以及
薄膜，具有第一表面及相对于该第一表面的第二表面，该线路层形成于该第一表面，至少一个凹槽凹设于该第二表面，该凹槽具有槽底面，其中该可挠性基板以位于该第一表面的该线路层与外部电子元件接合时，该可挠性基板被弯折而形成有多个平板部及至少一个弯折部，该弯折部位于该些平板部之间，该凹槽位于该弯折部。
13.如权利要求12所述的可挠性基板，其特征在于，其中该凹槽是由激光烧蚀该薄膜所形成。
14.如权利要求12所述的可挠性基板，其特征在于，其中该槽底面与该第一表面之间具有厚度，该厚度不小于6μm。
15.如权利要求14所述的可挠性基板，其特征在于，其中该厚度介于6-20μm之间。
16.如权利要求12所述的可挠性基板，其特征在于，其中该凹槽位于该弯折部的外缘。
17.如权利要求12所述的可挠性基板，其特征在于，其另包含保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该凹槽之间。
18.如权利要求12所述的可挠性基板，其特征在于，其中芯片设置区位于对应该凹槽的该第一表面。
19.如权利要求12所述的可挠性基板，其特征在于，其中该可挠性基板被弯折后形成有第一弯折部及第二弯折部，第一凹槽及第二凹槽凹设于该第二表面且分别位于该第一弯折部及该第二弯折部，芯片设置区位于该第一表面且位于该第一弯折部及该第二弯折部之间。
20.如权利要求19所述的可挠性基板，其特征在于，其另包含保护层，该保护层覆盖该第一表面及该线路层，该线路层的一部分位于该保护层及该第一凹槽之间，且该线路层的一部分位于该保护层及该第二凹槽之间。
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