TWI602696B - Anisotropic conductive film - Google Patents

Anisotropic conductive film Download PDF

Info

Publication number
TWI602696B
TWI602696B TW103132957A TW103132957A TWI602696B TW I602696 B TWI602696 B TW I602696B TW 103132957 A TW103132957 A TW 103132957A TW 103132957 A TW103132957 A TW 103132957A TW I602696 B TWI602696 B TW I602696B
Authority
TW
Taiwan
Prior art keywords
resin composition
layer
insulating resin
conductive
melt viscosity
Prior art date
Application number
TW103132957A
Other languages
English (en)
Other versions
TW201524766A (zh
Inventor
Seiichiro Shinohara
Original Assignee
Dexerials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dexerials Corp filed Critical Dexerials Corp
Publication of TW201524766A publication Critical patent/TW201524766A/zh
Application granted granted Critical
Publication of TWI602696B publication Critical patent/TWI602696B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • B32B27/06Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B27/08Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02Electrically-conducting adhesives
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00Properties of the layers or laminate
    • B32B2307/20Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
    • B32B2307/202Conductive
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00Properties of the layers or laminate
    • B32B2307/20Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
    • B32B2307/206Insulating
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00Properties of the layers or laminate
    • B32B2307/70Other properties
    • B32B2307/706Anisotropic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/27003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/271Manufacture and pre-treatment of the layer connector preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2902Disposition
    • H01L2224/29026Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body
    • H01L2224/29028Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body the layer connector being disposed on at least two separate bonding areas, e.g. bond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/2908Plural core members being stacked
    • H01L2224/29082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/2908Plural core members being stacked
    • H01L2224/29083Three-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/2939Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material
    • H01L2224/294Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29438Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29455Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32104Disposition relative to the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/38Effects and problems related to the device integration
    • H01L2924/381Pitch distance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Geometry (AREA)
  • Non-Insulated Conductors (AREA)
  • Wire Bonding (AREA)

Description

異向性導電膜
本發明係關於一種異向性導電膜。
於液晶面板或有機EL面板等多數顯示元件中,將驅動IC與基板經由異向性導電膜而異向性導電連接,為了實現近年來之顯示元件之高精細化及高功能化,此種IC之凸塊亦不斷窄間距化。
先前,為了因應IC凸塊之窄間距化,提出於異向性導電膜中使導電粒子以單層排列。例如,提出使導電粒子散佈於在基片形成有接著劑層之接著片之該接著劑層,利用鼓風將未接觸接著劑層之導電粒子去除而形成單層之含導電粒子層,並將該形成有該含導電粒子層之基片以獲得想要之粒子間距離之方式以既定延伸倍率進行雙軸延伸,藉此使導電粒子單層排列(專利文獻1);或者使導電粒子配置於磁性介質之特定區域,將過量附著之導電粒子去除後,將所配置之導電粒子轉印至絕緣性接著劑膜,藉此使導電粒子單層排列(專利文獻2)。可認為於該等情形時,藉由減小導電粒子之粒徑,增大異向性導電膜中之導電粒子密度,而變得易於因應窄間距化。
專利文獻1:日本專利第4789738號
專利文獻2:日本專利第4887700號
然而,利用專利文獻1~2之技術而製成之僅有含導電粒子層之單層型異向性導電膜,或進一步積層有絕緣性樹脂組成物層之兩層構造型異向性導電膜有時會無法充分因應IC晶片高程度之窄間距化。具體而言,於使用此種異向性導電膜將電氣零件彼此異向性導電連接時,有時會產生如下問題:短路之發生增多,或因高溫高濕環境下之保管導致導通電阻增大而使導通可靠性降低。
本發明之目的在於解決以上先前技術之問題,在於可於使用異向性導電膜將經窄間距化之電氣零件彼此異向性導電連接時,抑制短路之發生,抑制因高溫高濕環境下之保管導致導通可靠性降低。
本發明人發現:藉由對於至少於第一絕緣性樹脂組成物層上積層有導電粒子單層排列於層狀之黏合劑樹脂組成物而成之含導電粒子層的異向性導電膜,或者對於與第一絕緣性樹脂組成物層為相反側之含導電粒子層之表面進一步積層有第二絕緣性樹脂組成物層之異向性導電膜,調整各樹脂組成物之最低熔融黏度,可達成本案發明之目的,從而完成本發明。
即,本發明提供一種異向性導電膜,至少於第一絕緣性樹脂組成物層上積層有導電粒子單層排列於層狀之黏合劑樹脂組成物而成之含導電粒子層, 黏合劑樹脂組成物之最低熔融黏度為第一絕緣性樹脂組成物之最低熔融黏度以上。本發明之該異向性導電膜包含以下態樣。
於含導電粒子層之與第一絕緣性樹脂組成物層相反之面,進 一步積層有第二絕緣性樹脂組成物層,黏合劑樹脂組成物之最低熔融黏度高於第一及第二絕緣性樹脂組成物之最低熔融黏度之態樣。
再者,該態樣包含:第一絕緣性樹脂組成物與第二絕緣性樹 脂組成物之一者的最低熔融黏度高於另一者的最低熔融黏度之態樣,或於第一絕緣性樹脂組成物之最低熔融黏度與第二絕緣性樹脂組成物之最低熔融黏度為相同或大致相同之情形時第一絕緣性樹脂組成物層及第二絕緣性樹脂組成物層之一者的層厚大於另一者的層厚之態樣。
又,本發明提供一種連接體,係使第一電氣零件之端子與第 二電氣零件之端子經由本發明之異向性導電膜進行異向性導電連接而成,其特徵在於:自側面方向觀察其剖面時,含導電粒子層成為彎曲之狀態。
對於至少於第一絕緣性樹脂組成物層上積層有導電粒子單 層排列於層狀黏合劑樹脂組成物而成之含導電粒子層的本發明之異向性導電膜,將黏合劑樹脂組成物之最低熔融黏度調整為第一絕緣性樹脂組成物之最低熔融黏度以上。因此,於將異向性導電膜以第一絕緣性樹脂組成物層成為第一電氣零件側之方式配置於第一電氣零件之端子與第二電氣零件之端子之間而將其等異向性導電連接製成連接體之情形時,若自其連接面之俯視方向觀察,則如圖1A般,以高粒子密度摻合之導電粒子1彼此相互連續地接觸而亦使電極2間看上去短路。但是,如圖1B所示,於自A-A線剖面方向觀察時,於第一電氣零件3之端子3a與第二電氣零件4之端子 4a之間,經熱壓接之含導電粒子層10被壓入與第一絕緣性樹脂組成物層11相反之側而彎曲,其結果為,導電粒子1移動至第二電氣零件4側,導電粒子1彼此於厚度方向上隔離,因此可抑制短路之發生,亦可抑制導通可靠性之降低。於該情形時,含導電粒子層10與第一絕緣性樹脂組成物層11之樹脂成分相互混合,其等之界面變得不明確之情形多。又,有第一絕緣性樹脂組成物層11亦進入含導電粒子層10之第二電氣零件4側之情形。圖1B如其所示般表示第一絕緣性樹脂組成物層11亦進入含導電粒子層10之第二電氣零件4側之情況。
又,於與第一絕緣性樹脂組成物層為相反側之含導電粒子層 之表面進一步積層有第二絕緣性樹脂組成物層時,考慮黏合劑樹脂組成物之最低熔融黏度高於第一及第二絕緣性樹脂組成物之最低熔融黏度之情形,及第一絕緣性樹脂組成物與第二絕緣性樹脂組成物之任一者的最低熔融黏度高於另一者的最低熔融黏度之情形。如圖2所示,於假設第一絕緣性樹脂組成物層20之最低熔融黏度低於第二絕緣性樹脂組成物21之最低熔融黏度之情形時,含導電粒子層22被壓入最低熔融黏度較低之第一絕緣性樹脂組成物側而彎曲,其結果為,導電粒子彼此於厚度方向上隔離,因此可抑制短路之發生,亦可抑制導通可靠性之降低。於該情形時,關於含導電粒子層22、第一絕緣性樹脂組成物層20及第二絕緣性樹脂組成物層21之樹脂成分相互混合,其等之界面變得不明確之情形多。
再者,亦認為於第一絕緣性樹脂組成物之最低熔融黏度與第 二絕緣性樹脂組成物之最低熔融黏度相同或大致相同之情形時,無法形成含導電粒子層之彎曲,如圖3所示,有第一絕緣性樹脂組成物層30及第二 絕緣性樹脂組成物層31之任一者的層厚大於另一者的層厚之情形。於假設第一絕緣性樹脂組成物層之層厚大於第二絕緣性樹脂組成物層31之層厚之情形時,含導電粒子層32被壓入層厚較薄之第二絕緣性樹脂組成物層31側而彎曲,其結果為,導電粒子彼此於厚度方向上隔離,因此可抑制短路之發生,亦可抑制導通可靠性之降低。於該情形時,含導電粒子層32、第一絕緣性樹脂組成物層30及第二絕緣性樹脂組成物層31之樹脂成分相互混合,其等之界面變得不明確之情形多。
再者,於第一電氣零件之端子(例如凸塊)之高度與第二電氣零件之端子(例如凸塊)之高度相互差異大之情形時,有時可將含導電粒子層壓入端子高度較低之側而使其彎曲。
1、42、63‧‧‧導電粒子
2‧‧‧電極
3‧‧‧第一電氣零件
3a‧‧‧端子
4‧‧‧第二電氣零件
4a‧‧‧端子
10、22、32、44‧‧‧含導電粒子層
11、20、30、41‧‧‧第一絕緣性樹脂組成物層
21、31、51‧‧‧第二絕緣性樹脂組成物層
40、50‧‧‧異向性導電膜
43‧‧‧黏合劑樹脂組成物
60‧‧‧絕緣基板
61‧‧‧線狀電極
62‧‧‧配線基板
64‧‧‧帶電器
65‧‧‧導電刮板
65a‧‧‧矩形凸部
65b‧‧‧凹部
a‧‧‧電極寬度
b‧‧‧電極間距離
c‧‧‧電極深度
圖1A為連接體之俯視透視圖。
圖1B為圖1A之A-A線剖面圖。
圖2為連接體之剖面圖。
圖3為連接體之剖面圖。
圖4為本發明之異向性導電膜之剖面圖。
圖5為本發明之異向性導電膜之剖面圖。
圖6A為用以使導電粒子單層排列之裝置構成說明圖。
圖6B為用以使導電粒子單層排列之裝置構成說明圖。
圖6C為導電刮板之剖面圖。
<異向性導電膜>
如圖4所示,本發明之異向性導電膜40之特徵在於:具有至少於第一絕緣性樹脂組成物層41積層有導電粒子42單層排列於層狀黏合劑樹脂組成物43而成之含導電粒子層44的構造,黏合劑樹脂組成物之最低熔融黏度為絕緣性樹脂組成物之最低熔融黏度以上。若黏合劑樹脂組成物之最低熔融黏度為第一絕緣性樹脂組成物之最低熔融黏度以上,則變得容易於異向性導電連接時使含導電粒子層44於鄰接端子間彎曲。此處,最低熔融黏度為利用黏彈性測量裝置(Rheometer RS150,Hake公司)所測得之值。
<第一絕緣性樹脂組成物層>
關於第一絕緣性樹脂組成物層41之最低熔融黏度,就均勻之流動性之方面而言,較佳調整為10~5000mPa.s,更佳調整為50~3000mPa.s。最低熔融黏度之調整可藉由樹脂組成物之構成成分之種類的選擇、摻合比率的選擇、預加熱或UV照射的實施等進行。
關於第一絕緣性樹脂組成物層41之層厚,就防止連接後之短路之方面而言,較佳為0.5~30μm,更佳為3~20μm。
第一絕緣性樹脂組成物層41為由絕緣性熱塑性樹脂組成物、絕緣性熱硬化性樹脂組成物、或絕緣性光硬化性樹脂組成物所形成之層。關於該等樹脂組成物之成分構成,可自公知之成分構成中適當選擇,就大部分之異向性導電連接可藉由熱壓接實施而言,較佳設為熱硬化性樹脂組成物之構成。作為熱硬化性樹脂組成物之聚合形式,可為熱自由基聚 合,可為熱陽離子聚合,亦可為熱陰離子聚合,就低溫下之迅速硬化及連接穩定性之方面而言,較佳為熱陽離子聚合。作為此種熱陽離子聚合型硬化性樹脂組成物,可較佳地列舉將環氧化合物、氧呾化合物、乙烯醚化合物等熱陽離子聚合性化合物5~80質量份(較佳為10~70質量份)、芳香族鋶鹽等熱陽離子聚合起始劑0.2~30質量份(較佳為0.5~20質量份)、及苯氧基樹脂等成膜樹脂5~95質量份(較佳為10~90質量份)混合而成之組成物。視需要可於熱陽離子聚合型硬化性樹脂組成物含有矽烷偶合劑、防銹劑、著色劑、溶劑等添加劑。
<含導電粒子層>
含導電粒子層44具有導電粒子42單層排列於層狀黏合劑樹脂組成物43之構造。作為使導電粒子42單層排列於層狀黏合劑樹脂組成物43之方法,只要不損害發明之效果,則並無特別限定。例如,可採用先前技術之欄中提及之專利文獻1~2所揭示之方法。
作為導電粒子42,可採用構成公知之異向性導電膜之導電粒子。例如,可列舉鎳等之金屬粒子、於樹脂核心之表面形成鎳等之金屬鍍敷膜的金屬被覆樹脂粒子等。亦可視需要形成絕緣薄膜。
作為此種導電粒子42之平均粒徑,就應連接之端子與導電粒子之接觸性之方面而言,較佳為1~20μm,更佳為2~10μm。
關於含導電粒子層44中之導電粒子密度,就防止短路之觀點而言,較佳為5000~80000個/mm2,更佳為10000~60000個/mm2
又,於含導電粒子層44中,關於相互鄰接之導電粒子彼此之粒子間距離,就防止短路之觀點而言,較佳為1μm以上,更佳為1μm 以上且導電粒子直徑之30倍以內,尤佳為2μm以上且導電粒子直徑之20倍以內。該粒子間距離意指自排列之任意導電粒子至最接近之導電粒子的距離。此處,為了確定粒子間距離而選擇之導電粒子為不凝聚而獨立存在者。
再者,作為構成含導電粒子層44之黏合劑樹脂組成物43, 除將其最低熔融黏度設為第一絕緣性樹脂組成物之最低熔融黏度以上以外,可設為與第一絕緣性樹脂組成物相同之構成。
關於含導電粒子層44之層厚,就使導電粒子之保持性穩定 之方面而言,較佳為導電粒子直徑之0.3倍以上且3倍以下,更佳為0.5倍以上且2倍以下。
<另一態樣之異向性導電膜>
如圖5所示,本發明之另一態樣之異向性導電膜50具有於與第一絕緣性樹脂組成物層41為相反側之含導電粒子層44之表面進一步積層有第二絕緣性樹脂組成物層51的構造。於該態樣中,構成含導電粒子層44之黏合劑樹脂組成物43的最低熔融黏度高於第一及第二絕緣性樹脂組成物層41、51的最低熔融黏度。若黏合劑樹脂組成物43之最低熔融黏度高於第一及第二絕緣性樹脂組成物層41、51之最低熔融黏度,則變得容易於異向性導電連接時使含導電粒子層44於鄰接端子間彎曲。
<第二絕緣性樹脂組成物層>
關於第二絕緣性樹脂組成物層51之構成成分、層厚,可設為與第一絕緣性樹脂組成物層41相同之構成。
再者,第一絕緣性樹脂組成物之最低熔融黏度與第二絕緣性 樹脂組成物之最低熔融黏度可為相同,就藉由使流動穩定而防止導電粒子彼此之接觸之方面而言,較佳為一者高於另一者之最低熔融黏度。於該情形時,就控制流動之方向性之方面而言,兩者之差較佳調整為50~10000mPa.s,更佳調整為100~5000mPa.s。
於第一絕緣性樹脂組成物之最低熔融黏度與第二絕緣性樹 脂組成物之最低熔融黏度為相同或大致相同之情形時,為了實現向同一方向之流動,較佳使第一絕緣性樹脂組成物層41及第二絕緣性樹脂組成物層51之任一者之層厚較另一者之層厚厚較佳為1~20μm,更佳為2~15μm。
<圖4所示之構造之異向性導電膜之製造>
圖4所示之構造之異向性導電膜可藉由各種方法製造。以下說明其一例。
(第一絕緣性樹脂組成物層之製作)
將熱陽離子聚合性化合物、熱陽離子聚合起始劑、及成膜樹脂以固形物成分成為50%之方式溶解於乙酸乙酯或甲苯等溶劑,利用公知之方法將所獲得之溶液以成為既定乾燥厚度之方式塗佈於剝離PET基底膜,於例如50~80℃之烘箱中進行3~10分鐘乾燥,藉此可於剝離PET基底膜上製作第一絕緣性樹脂組成物層。
(含導電粒子層之製作)
如圖6A、6B所示,準備於絕緣基板60上設有具有既定之電極寬度a、電極間距離b及電極深度c之線狀電極61的配線基板62,對線狀電極61賦予正電位。使導電粒子63散佈於該配線基板62表面。其次,將用以使導電粒子63帶正電之帶電器64以與線狀電極61正交且可於線狀電極61上沿 長度方向移動之方式配置於配線基板62。進而,將對利用帶電器64帶正電之導電粒子63進行塗刷之導電刮板65設於配線基板62上。於導電刮板65之刮板表面,交替地設置有線狀之相當於電極寬度a之矩形凸部65a與相當於電極間距離b之凹部65b(圖6C)。其次,一面利用帶電器64使導電粒子63帶正電,一面使該帶電器64於線狀電極61之長度方向上移動。如此,帶正電之導電粒子63集中於被賦予正電位之線狀電極61間。其次,繼帶電器64之移動後,使導電刮板65以矩形凸部65a抵接於線狀電極61之方式對配線基板62表面進行塗刷。藉此,可使單層之導電粒子63呈線狀地排列於線狀電極61間。
對於該排列為線狀之導電粒子,將與第一絕緣性樹脂組成物 同樣地製作之形成於剝離PET基底膜上之黏合劑樹脂組成物層以不正式硬化之程度進行熱壓接,以將導電粒子埋入黏合劑樹脂組成物層之方式進行轉印,藉此可於剝離PET基底膜上製作含導電粒子層。如此,使導電粒子排列之方法可採用使用延伸膜之方法、使用模具使其轉印之方法等公知之方法。此處,於使導電粒子排列時,期望以個數基準計90%以上,較佳為95%以上之導電粒子具有規則性。所謂規則性,意指並非隨機排列之排列。
(含導電粒子層與第一絕緣性樹脂組成物層之一體化)
藉由使如上述般準備之第一絕緣性樹脂組成物層與含導電粒子層對向並以不正式硬化之程度進行熱壓接而實現一體化,藉此可獲得圖4所示之構造之異向性導電膜。
<圖5所示之構造之異向性導電膜之製造>
圖5所示之構造之異向性導電膜可藉由各種方法製造。以下說明其一 例。
以與製造圖4所示之構造之異向性導電膜之情形相同之方 式製作第一絕緣性樹脂組成物層及含導電粒子層。進而,以與第一絕緣性樹脂組成物層之製作相同之方式製作第二絕緣性樹脂組成物層。藉由以第一絕緣性樹脂組成物層及第二絕緣性樹脂組成物層夾持如上述般準備之含導電粒子層並以不正式硬化之程度進行熱壓接而實現一體化,藉此可獲得圖5所示之構造之異向性導電膜。
<連接體>
本發明之異向性導電膜配置於第一電氣零件(例如IC晶片)之端子(例如凸塊)與第二電氣零件(例如配線基板)之端子(例如凸塊、焊墊)之間,自第一或第二電氣零件側藉由熱壓接而使之正式硬化,從而進行異向性導電連接,藉此可獲得連接體。於自俯視方向觀察該連接體時,有鄰接電極間如圖1A所示,看上去短路之情形,若自側面方向觀察其剖面,則如圖1B所示,含導電粒子層彎曲,導電粒子彼此相互不接觸,俯視方向為絕緣。因此,連接體成為可抑制短路之發生,亦可抑制導通可靠性之降低者。此處,若考慮於自俯視方向觀察時導電粒子看上去相互接觸,則可知粒子之規則性對短路之抑制有效地發揮作用。再者,含導電粒子層成為彎曲狀態,可理解為於將排列之導電粒子看作群之情形時,該群顯示彎曲性。
實施例
以下,藉由實施例具體地說明本發明。
實施例1~8、比較例1、2
(第一絕緣性樹脂組成物層之形成)
按照表1所示之摻合(單位:質量份),使用甲苯製備50%固形物成分之第一絕緣性樹脂組成物混合液,將該混合液以成為表1之乾燥厚度之方式塗佈於剝離PET基片上,以80℃進行5分鐘乾燥,藉此形成第一絕緣性樹脂組成物層。再者,利用黏彈性測量裝置(Rheometer RS150,Hake公司)測量第一絕緣性樹脂組成物層之最低熔融黏度,將其結果示於表1。
(第二絕緣性樹脂組成物層之形成)
按照表1所示之摻合(單位:質量份),使用甲苯製備50%固形物成分之第二絕緣性樹脂組成物混合液,將該混合液以成為表1之乾燥厚度之方式塗佈於剝離PET基片上,以80℃進行5分鐘乾燥,藉此形成第二絕緣性樹脂組成物層。再者,利用黏彈性測量裝置(Rheometer RS150,Hake公司)測量第二絕緣性樹脂組成物層之最低熔融黏度,將其結果示於表1。
(含導電粒子層之形成)
按照表1所示之摻合(單位:質量份),使用甲苯製備50%固形物成分之黏合劑樹脂組成物混合液,將該混合液以成為表1之乾燥厚度之方式塗佈於剝離PET基片上,以80℃進行5分鐘乾燥,藉此形成黏合劑樹脂組成物層。再者,利用黏彈性測量裝置(Rheometer RS150,Hake公司)測量黏合劑樹脂組成物層之最低熔融黏度,將其結果示於表1。
其次,使用圖6A、6B所示之裝置(表1之電極寬度、電極 間距離3.5μm、電極深度3.5μm),使平均粒徑3μm之導電粒子(AUL703,積水化學工業股份有限公司)以表1之粒子密度呈線狀地單層排列於配線基板上。對於該單層排列為線狀之導電粒子,配置黏合劑樹脂組成物層,自剝離PET基片側以40℃、0.1MPa進行層壓,藉此形成具有導電 粒子壓入黏合劑樹脂組成物層之構造之表1之厚度之含導電粒子層。
(異向性導電膜之製作)
於含導電粒子層壓入有導電粒子側之表面配置第一絕緣性樹脂組成物層,於另一面配置第二絕緣性樹脂組成物層,將整體以40℃、0.1MPa之條件進行層壓,藉此製作異向性導電膜。
實施例9
不使用第二絕緣性樹脂組成物層,除此以外,依照實施例1中進行之操作製作兩層構造之異向性導電膜。
實施例10
不使用第一絕緣性樹脂組成物層,除此以外,依照實施例1中進行之操作製作兩層構造之異向性導電膜。
<連接體之評價>
(連接體之製作)
使用各實施例及比較例中製作之異向性導電膜,藉由熱壓接將IC晶片之凸塊與聚醯亞胺基底之配線基板之電極之間異向性導電連接。再者,於異向性連接時將第一絕緣性樹脂組成物層配置於IC晶片側。
熱壓接條件:180℃、80MPa、5秒
IC晶片之尺寸:1.5mm×13mm、0.5mmt
IC晶片之凸塊:鍍金凸塊、25μm×25μm、凸塊高度(表1)、凸塊間間隙7.5μm
配線基板之電極:鍍金電極、Line/Space=16.5μm/16μm、電極高度(表1)、電極間間隙7.5μm
(性能評價)
針對所獲得之連接體,如以下說明般,對「導電粒子捕捉數」、「短路發生率」、「初期導通電阻」、「高溫高濕負荷試驗後之導通電阻(導通可靠性)」、「含導電粒子層之彎曲方向」、「含導電粒子層之彎曲長度」、「導電粒子間距離」進行測量。將所獲得之結果示於表1。
「導電粒子捕捉數」
自壓接之IC之全部凸塊中選擇任意300個凸塊,利用顯微鏡計數存在於凸塊上之導電粒子數,求出其平均值及標準偏差。於連接實用方面,關於導電粒子數,期望平均-3σ之值為3個以上。
「短路發生率」
短路發生率係以「短路之發生數/7.5μm間隙總數」算出。於實用方面,期望為100ppm以下。
「初期導通電阻」
使用市售之電阻測量器測量剛製作後之連接體之初期導通電阻。於實用方面,期望為10Ω以下。
「高溫高濕負荷試驗後之導通電阻(導通可靠性)」
使用市售之電阻測量器測量將連接體於維持為85℃、85%Rh之腔室中放置1000小時後之連接體之導通電阻。於實用方面,期望為10Ω以下。
「含導電粒子層之彎曲方向」
將連接構造體之異向性連接部於相對於俯視方向為垂直之方向且相對於線狀之導電粒子排列為正交之方向上切斷,對該切斷面進行顯微鏡觀察,調查「含導電粒子層之彎曲方向」。將存在於連接體之俯視方向上之凸 塊間間隙之含導電粒子層之彎曲於第一絕緣性樹脂組成物層側為凸之情形設為彎曲方向為「上」,將於第二絕緣性樹脂組成物層側為凸之情形設為彎曲方向為「下」。
「含導電粒子層之彎曲長度」
將連接構造體之異向性連接部於相對於俯視方向為垂直方向且相對於線狀之導電粒子排列為正交之方向上切斷,對該切斷面進行顯微鏡觀察,求出「含導電粒子層之彎曲長度」。將使異向性導電連接之對向之凸塊間之中心於水平方向上延伸所成之直線至含導電粒子層之彎曲凸部前端之最短距離設為「含導電粒子層之彎曲長度」。
「導電粒子間距離」
將連接構造體之異向性連接部於相對於俯視方向為垂直方向且相對於線狀之導電粒子排列為正交之方向上切斷,對該切斷面進行顯微鏡觀察,求出「導電粒子間距離」。將存在於連接體之俯視方向上之凸塊間間隙之含導電粒子層之相互鄰接之導電粒子間之距離設為「導電粒子間距離」。
<探討>
於實施例9之異向性導電膜之情形時,構成含導電粒子層之黏合劑樹脂組成物之最低熔融黏度為第一絕緣性樹脂組成物之最低熔融黏度以上,故連接體中之含導電粒子層於配線基板側呈凸狀地彎曲。因此,初期導通電阻亦低,高溫高濕負荷試驗後之導通可靠性亦高。又,亦抑制了短路之發生。
於實施例10之異向性導電膜之情形時,構成含導電粒子層 之黏合劑樹脂組成物之最低熔融黏度為第二絕緣性樹脂組成物之最低熔融黏度以上,故連接體中之含導電粒子層於IC晶片側呈凸狀地彎曲。因此,初期導通電阻亦低,高溫高濕負荷試驗後之導通可靠性亦高。又,亦抑制了短路之發生。
於實施例1、2、5~8之異向性導電膜之情形時,構成含導 電粒子層之黏合劑樹脂組成物之最低熔融黏度高於第一及第二絕緣性樹脂組成物之最低熔融黏度。而且,第一絕緣性樹脂組成物及第二絕緣性樹脂組成物之一者之最低熔融黏度高於另一者之最低熔融黏度。因此,連接體中之含導電粒子層於顯示更低之最低熔融黏度之絕緣性樹脂組成物層側呈凸狀地彎曲。因此,初期導通電阻亦低,高溫高濕負荷試驗後之導通可靠性亦高。又,亦抑制了短路之發生。
於實施例3之異向性導電膜之情形時,構成含導電粒子層之 黏合劑樹脂組成物之最低熔融黏度高於第一及第二絕緣性樹脂組成物之最低熔融黏度,但第一絕緣性樹脂組成物與第二絕緣性樹脂組成物之最低熔融黏度相同。但是,IC晶片之凸塊高度遠遠高於配線基板之電極高度,故 連接體中之含導電粒子層於IC晶片側之第一絕緣性樹脂組成物層側呈凸狀地彎曲。因此,初期導通電阻亦低,高溫高濕負荷試驗後之導通可靠性亦高。又,亦抑制了短路之發生。
於實施例4之異向性導電膜之情形時,構成含導電粒子層之 黏合劑樹脂組成物之最低熔融黏度高於第一及第二絕緣性樹脂組成物之最低熔融黏度,但第一絕緣性樹脂組成物與第二絕緣性樹脂組成物之最低熔融黏度相同。但是,第一絕緣性樹脂組成物之層厚遠遠厚於第二絕緣性樹脂組成物之層厚,故連接體中之含導電粒子層於配線基板側之第二絕緣性樹脂組成物層側呈凸狀地彎曲。因此,初期導通電阻亦低,高溫高濕負荷試驗後之導通可靠性亦高。又,亦抑制了短路之發生。
與此相對,比較例1之異向性導電膜與比較例2之異向性導電膜之導電粒子密度互不相同,但第一絕緣性樹脂組成物、黏合劑樹脂組成物及第二絕緣性樹脂組成物之最低熔融黏度相同。因此,使用比較例1之異向性導電膜之連接體的短路發生率高。使用比較例2之異向性導電膜之連接體的導通可靠性低。
[產業上之可利用性]
藉由本發明之異向性導電膜,使用異向性導電膜將經窄間距化之電氣零件彼此異向性導電連接時,可抑制短路之發生,抑制因高溫高濕環境下之保管導致導通可靠性降低。因此,於將IC晶片覆晶安裝於配線基板時有用。
40‧‧‧異向性導電膜
41‧‧‧第一絕緣性樹脂組成物層
42‧‧‧導電粒子
43‧‧‧黏合劑樹脂組成物
44‧‧‧含導電粒子層

Claims (11)

  1. 一種異向性導電膜,至少於第一絕緣性樹脂組成物層上積層有導電粒子單層排列於層狀之黏合劑樹脂組成物而成之含導電粒子層,黏合劑樹脂組成物之最低熔融黏度為第一絕緣性樹脂組成物之最低熔融黏度以上,單層排列於含導電粒子層之導電粒子的以個數基準計90%以上規則排列。
  2. 如申請專利範圍第1項之異向性導電膜,其中,單層排列於含導電粒子層之導電粒子的以個數基準計95%以上規則排列。
  3. 如申請專利範圍第1或2項之異向性導電膜,其中,於含導電粒子層之與第一絕緣性樹脂組成物層相反之面,進一步積層有第二絕緣性樹脂組成物層,黏合劑樹脂組成物之最低熔融黏度高於第一及第二絕緣性樹脂組成物之最低熔融黏度。
  4. 如申請專利範圍第3項之異向性導電膜,其中,第一絕緣性樹脂組成物與第二絕緣性樹脂組成物之一者的最低熔融黏度高於另一者的最低熔融黏度。
  5. 如申請專利範圍第3項之異向性導電膜,其中,於第一絕緣性樹脂組成物之最低熔融黏度與第二絕緣性樹脂組成物之最低熔融黏度為相同或大致相同之情形時,第一絕緣性樹脂組成物層及第二絕緣性樹脂組成物層之一者的層厚大於另一者的層厚。
  6. 如申請專利範圍第1或2項之異向性導電膜,其中,於含導電粒子層中,相互鄰接之導電粒子彼此之粒子間距離為1μm以上。
  7. 如申請專利範圍第1或2項之異向性導電膜,其中,導電粒子於厚度方向之高度位置一致。
  8. 一種連接體,係使第一電氣零件之端子與第二電氣零件之端子經由申請專利範圍第1至7項中任一項之異向性導電膜異向性導電連接而成,自側面方向觀察其剖面時,當將規則排列之導電粒子看做為群的情形,該群彎曲。
  9. 如申請專利範圍第8項之連接體,其中,自連接體之俯視方向觀察時,存在於鄰接之端子間的複數個導電粒子看起來像互相連結。
  10. 如申請專利範圍第8項之連接體,其中,存在於鄰接之端子間的含導電粒子層的彎曲距離為對向之端子的各個端子高度之合計的一半以下。
  11. 如申請專利範圍第8項之連接體,其中,存在於鄰接之端子間的導電粒子的粒子間距離小於對向之端子間距離。
TW103132957A 2013-10-15 2014-09-24 Anisotropic conductive film TWI602696B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013214753A JP2015079586A (ja) 2013-10-15 2013-10-15 異方性導電フィルム

Publications (2)

Publication Number Publication Date
TW201524766A TW201524766A (zh) 2015-07-01
TWI602696B true TWI602696B (zh) 2017-10-21

Family

ID=52827971

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103132957A TWI602696B (zh) 2013-10-15 2014-09-24 Anisotropic conductive film

Country Status (6)

Country Link
US (1) US10424538B2 (zh)
JP (1) JP2015079586A (zh)
KR (1) KR20160050078A (zh)
CN (2) CN105594063A (zh)
TW (1) TWI602696B (zh)
WO (1) WO2015056518A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102332272B1 (ko) * 2014-11-18 2021-12-01 삼성디스플레이 주식회사 이방성 도전 필름 및 이를 갖는 표시장치
GB201509080D0 (en) * 2015-05-27 2015-07-08 Landa Labs 2012 Ltd Coating apparatus
JP2017175093A (ja) * 2016-03-25 2017-09-28 デクセリアルズ株式会社 電子部品、接続体、電子部品の設計方法
JP7274811B2 (ja) 2016-05-05 2023-05-17 デクセリアルズ株式会社 異方性導電フィルム
WO2017191781A1 (ja) * 2016-05-05 2017-11-09 デクセリアルズ株式会社 異方性導電フィルム
JP7119288B2 (ja) * 2016-05-05 2022-08-17 デクセリアルズ株式会社 フィラー配置フィルム
WO2017191779A1 (ja) * 2016-05-05 2017-11-09 デクセリアルズ株式会社 異方性導電フィルム
KR20210060732A (ko) * 2019-11-18 2021-05-27 삼성디스플레이 주식회사 표시 장치의 제조 방법
CN111179750A (zh) * 2019-12-12 2020-05-19 武汉华星光电技术有限公司 显示面板的结构和其制作方法
JP2023051504A (ja) * 2021-09-30 2023-04-11 デクセリアルズ株式会社 導電フィルム、接続構造体及びその製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005200521A (ja) * 2004-01-15 2005-07-28 Sony Chem Corp 接着フィルム、接着フィルムの製造方法
JP2010278025A (ja) * 2010-08-30 2010-12-09 Sony Chemical & Information Device Corp 異方性導電フィルム

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04366630A (ja) * 1991-06-13 1992-12-18 Sharp Corp 異方性導電接着テープ
JP4190763B2 (ja) 2001-04-27 2008-12-03 旭化成株式会社 異方性を有する導電性接着シートおよびその製造方法
JP4130747B2 (ja) 2002-03-28 2008-08-06 旭化成エレクトロニクス株式会社 異方導電性接着シートおよびその製造方法
JP4887700B2 (ja) 2005-09-09 2012-02-29 住友ベークライト株式会社 異方導電性フィルムおよび電子・電機機器
WO2007125993A1 (ja) * 2006-04-27 2007-11-08 Asahi Kasei Emd Corporation 導電粒子配置シート及び異方導電性フィルム
JP4789738B2 (ja) 2006-07-28 2011-10-12 旭化成イーマテリアルズ株式会社 異方導電性フィルム
JP5032961B2 (ja) * 2007-11-29 2012-09-26 ソニーケミカル&インフォメーションデバイス株式会社 異方性導電膜及びこれを用いた接合体
JP4572929B2 (ja) * 2007-11-19 2010-11-04 日立化成工業株式会社 接続部材及びこれを用いた電極の接続構造
JP5225766B2 (ja) * 2008-06-25 2013-07-03 旭化成イーマテリアルズ株式会社 異方導電性接着シート及び微細接続構造体
CN102090154B (zh) * 2008-07-11 2014-11-05 迪睿合电子材料有限公司 各向异性导电薄膜
JP2010067360A (ja) * 2008-09-08 2010-03-25 Tokai Rubber Ind Ltd 異方性導電膜およびその使用方法
JP2010199087A (ja) * 2010-05-11 2010-09-09 Sony Chemical & Information Device Corp 異方性導電膜及びその製造方法、並びに、接合体及びその製造方法
KR101351617B1 (ko) 2010-12-23 2014-01-15 제일모직주식회사 이방 도전성 필름
WO2013089199A1 (ja) 2011-12-16 2013-06-20 旭化成イーマテリアルズ株式会社 異方導電性フィルム付き半導体チップ、異方導電性フィルム付き半導体ウェハ、及び半導体装置
JP5209778B2 (ja) * 2011-12-27 2013-06-12 デクセリアルズ株式会社 異方性導電膜及びこれを用いた接合体
JP2013143292A (ja) * 2012-01-11 2013-07-22 Sekisui Chem Co Ltd 異方性導電フィルム材料、接続構造体及び接続構造体の製造方法
JP6151597B2 (ja) * 2013-07-29 2017-06-21 デクセリアルズ株式会社 導電性接着フィルムの製造方法、導電性接着フィルム、接続体の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005200521A (ja) * 2004-01-15 2005-07-28 Sony Chem Corp 接着フィルム、接着フィルムの製造方法
JP2010278025A (ja) * 2010-08-30 2010-12-09 Sony Chemical & Information Device Corp 異方性導電フィルム

Also Published As

Publication number Publication date
KR20160050078A (ko) 2016-05-10
WO2015056518A1 (ja) 2015-04-23
TW201524766A (zh) 2015-07-01
CN112117257A (zh) 2020-12-22
JP2015079586A (ja) 2015-04-23
CN105594063A (zh) 2016-05-18
US20160240468A1 (en) 2016-08-18
US10424538B2 (en) 2019-09-24

Similar Documents

Publication Publication Date Title
TWI602696B (zh) Anisotropic conductive film
JP6380591B2 (ja) 異方導電性フィルム及び接続構造体
CN110265174B (zh) 各向异性导电性膜
JP6950797B2 (ja) 異方性導電フィルム
TWI643416B (zh) Isotropic conductive film, connection method, connection structure, and manufacturing method of connection structure
TW201717216A (zh) 異向導電性膜及連接構造體
KR102240963B1 (ko) 이방성 도전 필름, 그 제조 방법, 및 접속 구조체
KR20220029770A (ko) 접속체 및 접속체의 제조 방법
JP7348563B2 (ja) 異方性導電フィルム
JP2005251654A (ja) 異方導電性シート及びその製造方法
JP2012015544A (ja) 接続構造体の製造方法及び接続構造体並びに接続方法
JP2005116718A (ja) 電子部品の実装方法
JP2020109763A (ja) 異方性導電フィルム