TWI578417B - 將一高密度多層薄膜轉移及電接合至一電路化及有彈性的有機基板之方法及其相關裝置 - Google Patents
將一高密度多層薄膜轉移及電接合至一電路化及有彈性的有機基板之方法及其相關裝置 Download PDFInfo
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- TWI578417B TWI578417B TW100147174A TW100147174A TWI578417B TW I578417 B TWI578417 B TW I578417B TW 100147174 A TW100147174 A TW 100147174A TW 100147174 A TW100147174 A TW 100147174A TW I578417 B TWI578417 B TW I578417B
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Description
本發明係關於電子裝置製造之領域,且更特定而言,係關於在犧牲基板上形成電子裝置之部分且將電子裝置之部分電接合至電路化之薄的有彈性的有機基板之方法。
隨著半導體及積體電路技術進步,已存在朝著具有眾多輸入及輸出(I/O)襯墊之高功能性積體電路組件發展的趨勢,以及對減小之晶片大小、重量及功率消耗的需求。因此,隨著積體電路變得更小,積體電路日益具有比先前更緊密地配置在一起之更小I/O襯墊。
為了匹配此等高功能性積體電路,存在對具有用於積體電路組件附接之緊密配置之襯墊的印刷線路板的需求。至今,製造具有足夠細微之間距之組件附接襯墊的基板的能力已不能夠跟上積體電路組件之小型化。因此,對於一些現代裝置而言,存在互連技術差距。
為了使該等裝置起作用,印刷線路板可具有用以處置積體電路之襯墊之額外佈線層或利用扇出封裝。此情形導致積體電路之封裝大小比積體電路自身大,此情形可限制系統小型化。除對小型化裝置之此等需求之外,在一些狀況下亦需要由有彈性而非硬質之基板來建構此等裝置。
現用作基板(由該基板來建構薄的且有彈性之印刷線路板)的一材料為雙軸定向之液晶聚合物(LCP)。LCP中之分子具有硬質、桿狀形狀,且在處於液相中時或在加熱及熔化時維持一結晶次序。液晶聚合物印刷電路之處理及組裝(The Processing and Assembly of Liquid Crystalline Polymer Printed Circuits)(T. Zhang、W. Johnson、B. Farrell及M. St. Lawrence,「液晶聚合物印刷電路之處理及組裝(The processing and assembly of liquid crystalline polymer printed circuits)」,2002年,國際微電子研討會2002)論述了使用LCP作為基板之印刷電路板的建構。首先將光阻劑塗覆至覆銅疊層,將該光阻劑曝露且顯影以界定所要之電路圖案。藉由任何經曝露之銅的蝕刻移除來界定實際電路。經由機械或雷射鑽孔在基板中形成孔或介層孔。執行去汙步驟以自介層孔或孔移除碎片,藉此製備用於金屬沈積之LCP材料。接下來執行金屬化步驟,且將習知焊料光罩塗覆至LCP基板。接著經由習知焊料光罩塗覆焊料以完成LCP印刷電路板之建構。
雖然此設計確實考慮到薄的有彈性的印刷電路板之形成,但其仍遭受與上文關於具有緊密隔開之襯墊之積體電路的附接所描述之缺點相同的缺點。
傳統半導體處理技術考慮到硬質晶圓基板之製造,該等硬質晶圓基板將支撐上文所參考之所附接組件的層級。在此製程中,將金屬自氣相沈積為極薄之膜且以類似於針對印刷電路板所描述之方式的方式來微影圖案化及蝕刻該等金屬。經由旋塗或氣相沈積製程在金屬層之間形成介電層。雖然考慮到細微間距之組件的附接,但此方法歸因於用於半導體處理之硬質晶圓基板要求而缺乏達成有彈性的電路的能力。因而,需要將積體電路連接至有彈性的印刷電路板之額外方法。
鑒於前述背景,因此,本發明之一目標為提供一種將製造於一犧牲之硬質晶圓基板上之一高密度多層薄膜轉移及電接合至一有彈性之電路化液晶聚合物基板的方法。
藉由一種製造一電子裝置之方法來提供根據本發明之此目標、特徵及優點及其他目標、特徵及優點,該方法包括在一犧牲基板上形成一互連層堆疊,該互連層堆疊包含複數個交替圖案化之導電層及介電層。該方法亦包括在該互連層堆疊之與該犧牲基板相反之一側上將一電路化之液晶聚合物(LCP)基板層疊至且電接合至該互連層堆疊,及移除該犧牲基板以曝露一最下的經圖案化之電導體層。該方法進一步包括將至少一第一裝置電耦接至該最下的經圖案化之電導體層。此方法有利地允許在難以形成於一電路化之LCP基板上之一互連層堆疊上形成一電子裝置。
將該LCP基板與該互連層堆疊層疊在一起可包含將熱及壓力施加至該LCP基板及該互連層堆疊。該熱及壓力可在一高壓釜中施加。
形成該互連層堆疊可藉由以薄膜沈積形成該複數個經圖案化之電導體層來執行。另外,該LCP基板可相對較薄,亦即,該LCP基板可具有一小於0.0025吋之厚度。另外,在一覆晶配置中,該至少一第一裝置可包括一第一積體電路(IC)晶粒。
可在該LCP基板中形成至少一電導體介層孔。可將至少一第二裝置連接至該LCP基板,且可使用該至少一電導體介層孔將該至少一第二裝置電耦接至最上的經圖案化之電導體層。
該犧牲基板可為玻璃或任何原子能平滑之材料。該LCP基板中可具有至少一電導體介層孔,且該方法亦可包括形成另一互連層堆疊,該另一互連層堆疊在另一犧牲基板上且包含複數個經圖案化之電導體層及在鄰近之經圖案化之電導體層之間的一介電層。可在該LCP基板之與該另一犧牲基板相反之一側上將該另一互連層堆疊層疊至且電接合至該LCP基板。
可移除該另一犧牲基板以曝露一最下的經圖案化之電導體層。該方法可進一步包括將至少一其他裝置電耦接至該最下的經圖案化之電導體層,及將該互連層堆疊與該另一互連層堆疊電耦接在一起。
在一些應用中,該LCP基板可具有大於該犧牲基板之一面積的一面積,且可將至少一其他LCP基板層疊至該LCP基板,該至少一其他LCP基板中具有與該至少一第一裝置對準之一孔隙。
可在該至少一額外LCP基板中形成至少一電導體介層孔。可形成另一互連層堆疊,該另一互連層堆疊在另一犧牲基板上且包含複數個經圖案化之電導體層,及在鄰近之經圖案化之電導體層之間的一介電層。可在另一LCP基板之與該另一犧牲基板相反之一側上將該另一互連層堆疊層疊至且電接合至該另一LCP基板,且可移除該另一犧牲基板以曝露一最下的經圖案化之電導體層。
可將至少一其他裝置電耦接至該最下的經圖案化之電導體層。可將該另一LCP基板層疊至該至少一額外LCP基板。可使用該至少一額外LCP基板中之該至少一電導體介層孔來電耦接該互連層堆疊與該另一互連層堆疊。
該LCP基板可包含在複數個LCP層中之每一者中的至少一導體介層孔,且該方法可包含使該LCP基板與該互連層堆疊對準,將該LCP基板層疊至及電接合至該互連層堆疊。可將該複數個LCP層中之剩餘LCP層層疊至已層疊至該互連堆疊之該LCP層。可使用該複數個LCP層中之每一者之該至少一電導體介層孔將至少一第二裝置電耦接至該最上的經圖案化之電導體層。
一裝置態樣係有關一種電子裝置,該電子裝置包含一液晶聚合物(LCP)基板。在該LCP基板上存在一互連層堆疊,該互連層堆疊包含複數個經圖案化之電導體層及在鄰近之經圖案化之電導體層之間的一介電層,該介電層包含一不同於LCP之材料。在該LCP基板與該互連層堆疊之間存在一熔融接縫。另外,在該LCP基板與該所附接之互連層堆疊之間存在一電互連。至少一第一裝置電耦接至一最下的經圖案化之電導體層。
現將在下文中參看隨附圖式來更完全地描述本發明,本發明之較佳實施例展示於該等隨附圖式中。然而,本發明可以許多不同形式來體現且不應被解釋為限於本文中所闡述之實施例。實情為,提供此等實施例以使得本發明將為詳盡的及完整的,且將本發明之範疇完全地傳達給熟習此項技術者。貫穿始終相似數字指代相似元件。
最初參看圖1之流程圖50及圖2A至圖2D,現描述製造電子裝置之方法。如圖2A中所展示,在開始(區塊51)之後,在犧牲基板12上形成互連層堆疊14(在區塊52處)。該互連層堆疊14包含複數個交替圖案化之電導體層16,與在鄰近之經圖案化之電導體層之間的介電層17。介電層17可為聚醯亞胺。犧牲基板12提供用於形成互連層堆疊14之尺寸穩定性及原子能平滑度。
舉例而言,互連層堆疊14可薄於0.0004吋,其中經圖案化之電導體層16小至(或甚至小於)0.00004吋,且介電層17小至(或小於)0.00016吋。犧牲基板12較佳為玻璃,但亦可使用具有足夠平滑之表面的其他材料。可藉由半導體薄膜沈積製程來形成互連層堆疊14及(因此的)該複數個經圖案化之電導體層16。
如圖2B中所展示,在互連層堆疊14之與犧牲基板12相反之側上將液晶聚合物(LCP)基板18層疊至互連層堆疊14(在區塊53處)。舉例而言,LCP基板18可具有小於0.0025吋之厚度。此層疊係經由將熱及壓力施加至LCP基板18及互連層堆疊14(諸如,在高壓釜中)來執行。高壓釜有利地提供均衡壓力(亦即,來自所有方向之相等壓力),且幫助阻止LCP在層疊製程期間變形。雖然將高壓釜用於層疊係較佳的,但亦可使用按壓(有可能在惰性氣氛下)來執行層疊。該層疊較佳在約260℃及100 psi下執行。
出於多種原因,LCP為用以形成印刷電路板之特別有利之材料,該多種原因包括以下事實:LCP具有高拉伸強度,從而提供高耐磨損性及高耐損害性。通常,LCP亦具有高溫下之高機械強度、高耐化學性、固有之阻燃性及良好之耐氣候性。另外,LCP相對而言較具惰性。LCP耐受在高溫下在存在大多數化學物質之情況下的應力破裂性,該等化學物質包括芳族烴或鹵化烴、強酸、鹼、酮及其他侵蝕性工業物質。熟習此項技術者應理解,存在可用於生產根據本發明之電子裝置之多種LCP。將LCP用作基板18有利地允許在無黏著層之情況下的層疊,藉此減小所得電子裝置10之總厚度。
接下來,如圖2C中所展示,移除犧牲基板12,藉此曝露最下的經圖案化之電導體層16(區塊54)。舉例而言,此犧牲基板12之移除係藉由在氫氟酸中之溶解、機械拋光或化學機械拋光之組合來執行。
如圖2D中所展示,將至少一第一裝置20(說明性地為三個裝置)耦接至該最下的經圖案化之電導體層16(區塊55)。如熟習此項技術者將瞭解,此裝置20可為積體電路(IC)晶粒,且可耦接於覆晶配置中。區塊56指示該方法之結束。
該方法因此產生一電子裝置10,該電子裝置10包含LCP基板18與形成於LCP基板18上之互連層堆疊14。該互連層堆疊14包含複數個經圖案化之電導體層16,與在鄰近之經圖案化之電導體層之間的介電層17。在互連層堆疊14與LCP基板18之間存在熔融接縫。此熔融接縫係在LCP基板及互連層堆疊14之軟化及接合期間形成,且在經橫截之裝置的像片中可容易地見到。在覆晶配置中,三個積體電路晶粒20耦接至最下的經圖案化之電導體層16。應瞭解,可改為存在任何數目個裝置20,且該等裝置20不需為積體電路晶粒。
參看圖3之流程圖150及圖4A至圖4E,現描述根據本發明之製造電子裝置110之方法的另一實施例。應理解,可以類似於圖1之流程圖50中之步驟的方式來執行此方法中之步驟,且彼等步驟之詳細描述因此為不必要的。
如圖4A中所展示,在開始(區塊151)之後,使用薄膜沈積在犧牲基板112上形成互連層堆疊114(在區塊152處)。該互連層堆疊114包含複數個經圖案化之電導體層116,及在鄰近之經圖案化之電導體層之間的一介電層117。在最上的介電層117中界定孔隙,以便藉由該等孔隙曝露最上的經圖案化之電導體層116之襯墊。
接下來,如圖4B中所展示,在LCP基板118中形成至少一電導體介層孔122(說明性地為複數個電導體介層孔)(區塊153)。藉由對該LCP基板118進行機械或雷射鑽孔而形成電導體介層孔122,接著在所得孔中選擇性地沈積銅。接著在電導體介層孔122之最下層上沈積錫。
在層疊之前,可使LCP基板118與互連層堆疊114對準。將對準定義為:使導電介層孔122定中心於最上的經圖案化之電導體層116之襯墊處。此對準可藉由以下操作來執行:首先使用燈具或導引件來使LCP基板118與互連層堆疊114粗略對準,且接著在顯微鏡下精細地調整該對準以達到最終對準。此情形有利地允許在0.0005吋至0.001吋之範圍中的位置對準準確度。
如圖4C中所展示,接著在互連層堆疊114之與犧牲基板112相反之側上將LCP基板118層疊至且電接合至互連層堆疊114(區塊154)。在層疊製程步驟期間,溫度達到諸如260℃之合適位準,該溫度位準為錫之熔點且在該點處,銅及錫擴散且起反應以形成諸如Cu3Sn之金屬間化合物。負責建立LCP基板與互連層堆疊之間的電連接之此金屬間化合物在其至少600℃之熔點以下為熱穩定的。有利地,成功層疊及金屬間化合物形成所需要之溫度屬於相同範圍內。
如圖4D中所展示,接著移除犧牲基板112以曝露最下的經圖案化之電導體層116(區塊155)。如圖4E中所展示,將至少一第一裝置120(說明性地為三件組裝置)電耦接至該最下的經圖案化之電導體層116(區塊156)。在覆晶配置中,該三件組裝置120可為積體電路晶粒,但亦可為其他裝置。使用電導體介層孔122將至少一第二裝置124電耦接至互連層堆疊114之最上的經圖案化之電導體層116(區塊157)。此情形提供裝置120、124之間的連接性。
應瞭解,裝置120、124可為不同種類之裝置。舉例而言,裝置120可為數位邏輯電路,而裝置124可為類比射頻電路。區塊158指示該方法之結束。
此方法因此產生一電子裝置110,該電子裝置110包含一LCP基板118,該LCP基板118中形成有複數個導體介層孔122。互連層堆疊114形成於LCP基板118上。該互連層堆疊114包含複數個經圖案化之電導體層116,與在鄰近之經圖案化之電導體層之間的介電層117。在互連層堆疊114與LCP基板118之間存在熔融接縫。在覆晶配置中,三個積體電路晶粒120耦接至最下的經圖案化之電導體層116。射頻裝置124經由電導體介層孔122而電耦接至最上的經圖案化之電導體層116且電耦接至積體電路晶粒120。
參看圖5之流程圖250及圖6A至圖6E,現描述根據本發明之製造電子裝置210之方法的另一實施例。應理解,以類似於圖1及圖3之流程圖50及150中之步驟的方式來執行此方法中之步驟,且彼等步驟之詳細描述因此為不必要的。
如圖6A中所展示,在開始(區塊251)之後,使用薄膜沈積在犧牲基板212上形成互連層堆疊214(在區塊252處)。該互連層堆疊214包含複數個經圖案化之電導體層216,及在鄰近之經圖案化之電導體層之間的一介電層217。在最上的介電層217中界定孔隙,以便藉由該等孔隙曝露最上的經圖案化之電導體層216之襯墊。
接下來,如圖6B中所展示,在LCP基板218中形成至少一電導體介層孔222(說明性地為複數個電導體介層孔)(區塊253)。如圖6C中所展示,接著經由金屬間結合在互連層堆疊214之與犧牲基板212相反之側上將LCP基板218層疊至且電接合至互連層堆疊214(區塊254)。
如圖6C中所展示,在另一犧牲基板232上形成另一互連層堆疊234(區塊255)。此另一互連層堆疊234同樣包含複數個經圖案化之電導體層236,及在鄰近之經圖案化之電導體層之間的一介電層237。接著在LCP基板218之與互連層堆疊214相反之側上將此另一互連層堆疊235層疊至且電接合至LCP基板218(區塊256),藉此將該互連層堆疊與該另一互連層堆疊電耦接在一起。如圖6D中所展示,接著分別移除犧牲基板212、232兩者以曝露互連層堆疊214及互連層堆疊234之最下的經圖案化之電導體層216、236(區塊257)。
如圖6E中所展示,將至少一第一裝置220電耦接至互連層堆疊214之最下的經圖案化之電導體層216(區塊258)。接著將至少一其他裝置250(說明性地為兩個裝置)電耦接至互連層堆疊234之最上的經圖案化之電導體層236(區塊259)。
如圖6E中所展示,此方法因此產生一電子裝置210,該電子裝置210包含一LCP基板218,該LCP基板218中形成有複數個導體介層孔222。一互連層堆疊214及另一互連層堆疊234形成於LCP基板218之相對側上。該等互連層堆疊214、234各自包含複數個經圖案化之電導體層216、236,與在鄰近之經圖案化之電導體層之間的介電層217、237。在每一互連層堆疊214、234與LCP基板218之間存在熔融接縫。在覆晶配置中,積體電路晶粒220耦接至最下的經圖案化之電導體層216。一對積體電路晶粒250經由電導體介層孔222而電耦接至最上的經圖案化之電導體層236且電耦接至積體電路晶粒220。
參看圖7之流程圖350及圖8A至圖8E,現描述根據本發明之製造電子裝置310之方法的另一實施例。應理解,以類似於圖1、圖3、圖5之流程圖50、150、250中之步驟的方式來執行此方法中之步驟,且彼等步驟之詳細描述因此為不必要的。
如圖8A中所展示,在開始(區塊351)之後,使用薄膜沈積在犧牲基板312上形成互連層堆疊314(在區塊352處)。該互連層堆疊314包含複數個經圖案化之電導體層316,及在鄰近之經圖案化之電導體層之間的一介電層317。曝露最上的經圖案化之電導體層316。
如圖8B中所展示,形成液晶聚合物(LCP)基板318(區塊353)。在LCP基板318上選擇性地圖案化銅特徵,且接著在銅上選擇性地沈積錫以藉此形成電路層324。
如圖8C中所展示,層疊LCP基板318且在互連層堆疊314之與犧牲基板312相反之側上將LCP基板318之塗佈有錫之銅特徵以金屬間方式結合至互連層堆疊314(區塊354)。較佳在290℃及100 psi下執行層疊,但當然可使用其他溫度及壓力。
移除犧牲基板312以曝露最下的經圖案化之電導體層316(區塊355)。如圖8D中所展示,將至少一第一裝置320電耦接至該最下的經圖案化之電導體層316(區塊356)。
在至少一額外LCP基板328(說明性地為三個額外LCP基板)中形成至少一電導體介層孔326(區塊357)。該等額外LCP基板328中具有一與裝置320對準之孔隙,該孔隙係藉由雷射研磨或機械衝壓而形成。將該等額外LCP基板328層疊至LCP基板318(區塊358),較佳在270℃及200 psi下進行,但可使用其他溫度及壓力。
在另一犧牲基板350上形成另一互連層堆疊334。此另一互連層堆疊334亦包含複數個經圖案化之電導體層336及在鄰近之經圖案化之電導體層之間的一介電層337(區塊359)。接著將該另一互連層堆疊334層疊至形成有電路層344之另一LCP基板338且使該另一互連層堆疊334與該另一LCP基板338以金屬間方式結合(區塊360)。接著移除犧牲基板以曝露最下的經圖案化之電導體層336(區塊361)。
接著將該另一LCP基板338層疊(區塊362)至最底的額外LCP基板328,藉此經由電導體介層孔326及電路層324、344使互連層堆疊314與該另一互連層堆疊334電耦接。此情形氣密地密封裝置320使其免受濕氣、灰塵及碎片影響。接著將至少一其他裝置350耦接至最下的經圖案化之電導體層(區塊363)。
如圖8E中所展示,此方法因此產生一電子裝置310,該電子裝置310包含一LCP基板318,該LCP基板318上形成有電路層324。互連層堆疊314與LCP基板318耦接。該互連層堆疊314包含複數個經圖案化之電導體層316,與在鄰近之經圖案化之電導體層之間的一介電層317。在每一互連層堆疊314與LCP基板318之間存在熔融接縫。在覆晶配置中,積體電路晶粒320耦接至最下的經圖案化之電導體層316。
三個額外LCP基板層328在與互連層堆疊314相同之側上層疊至LCP基板318且該三個額外LCP基板層328中界定有與積體電路晶粒320對準之孔隙。LCP基板層328中形成有電導體介層孔326。在該三個額外LCP基板層328中之每一者之間且在最頂的額外LCP基板層與LCP基板318之間存在熔融接縫。
另一LCP基板338層疊至最底的額外LCP基板層328,且在該另一LCP基板338與最底的額外LCP基板層328之間存在熔融接縫。另一互連層堆疊334層疊至該另一LCP基板338,且在該另一互連層堆疊334與該另一LCP基板338之間亦存在熔融接縫。該另一互連層堆疊334包含複數個經圖案化之電導體層336,與在鄰近之經圖案化之電導體層之間的一介電層337。另一積體電路晶粒350耦接至最下的經圖案化之電導體層336。因此,積體電路晶粒320與另一積體電路晶粒350經由電路層324、344及電導體介層孔326而電耦接。積體電路晶粒320因此藉由環繞之LCP基板318、328、338而氣密地密封。
參看圖9之流程圖450及圖10A至圖10E,現描述根據本發明之製造電子裝置410之方法的另一實施例。應理解,以類似於圖1、圖3、圖5、圖7之流程圖50、150、250、350中之步驟的方式來執行此方法中之步驟,且彼等步驟之詳細描述因此為不必要的。
如圖10A中所展示,在開始(區塊451)之後,使用薄膜沈積在犧牲基板412上形成互連層堆疊414(在區塊452處)。該互連層堆疊414包含複數個經圖案化之電導體層416,及在鄰近之經圖案化之電導體層之間的一介電層417。在最上的介電層417中界定孔隙,以便藉由該等孔隙曝露最上的經圖案化之電導體層416之襯墊。
接下來,如圖10B中所展示,在LCP基板418之複數個LCP層中之每一者中形成至少一電導體介層孔422(說明性地為複數個電導體介層孔)(區塊453)。
如圖10C中所展示,在互連層堆疊414之與犧牲基板412相反之側上將LCP基板之一層418層疊至互連層堆疊414(區塊454)。此結合製程亦用以以金屬間方式結合介層孔422與經圖案化之電導體層416。在層疊之前,可使LCP基板418與互連層堆疊414對準。接著將剩餘LCP層418層疊至已層疊至互連層堆疊414之LCP層(區塊455)。
如圖10D中所展示,接著移除犧牲基板412以曝露最下的經圖案化之電導體層416(區塊456)。如圖10E中所展示,將至少一第一裝置420(說明性地為三件組積體電路晶粒)電耦接至最下的經圖案化之電導體層416(區塊457)。將至少一第二裝置429(說明性地為RF裝置)電耦接至LCP基板418之導體介層孔422,且該至少一第二裝置429駐留於LCP基板418之與互連層堆疊414相反之側上(區塊458)。區塊459指示該方法之結束。
此方法因此產生一電子裝置410,該電子裝置410包含一LCP基板418,該LCP基板418中形成有複數個導體介層孔422。LCP基板418包含一對LCP層。互連層堆疊414形成於LCP基板418上。該互連層堆疊414包含複數個經圖案化之電導體層416,與在鄰近之經圖案化之導電層之間的介電層417。在互連層堆疊414與LCP基板418之間及在LCP層之間存在熔融接縫。
在覆晶配置中,三個積體電路晶粒420耦接至最下的經圖案化之電導體層416。射頻裝置429耦接至LCP基板418之與互連層堆疊414相反之側,且經由電導體介層孔422而電耦接至最上的經圖案化之電導體層416及積體電路晶粒420。在LCP基板418與第二裝置429之間亦存在熔融接縫。
10...電子裝置
12...犧牲基板
14...互連層堆疊
16...經圖案化之電導體層
17...介電層
18...液晶聚合物(LCP)基板
20...第一裝置/積體電路晶粒
50...流程圖
110...電子裝置
112...犧牲基板
114...互連層堆疊
116...經圖案化之電導體層
117...介電層
118...液晶聚合物(LCP)基板
120...第一裝置/積體電路晶粒
122...電導體介層孔
124...第二裝置
150...流程圖
210...電子裝置
212...犧牲基板
214...互連層堆疊
216...經圖案化之電導體層
217...介電層
218...液晶聚合物(LCP)基板
220...第一裝置/積體電路晶粒
222...電導體介層孔
232...另一犧牲基板
234...另一互連層堆疊
236...經圖案化之電導體層
237...介電層
250...流程圖/其他裝置/積體電路晶粒
310...電子裝置
312...犧牲基板
314...互連層堆疊
316...經圖案化之電導體層
317...介電層
318...液晶聚合物(LCP)基板
320...第一裝置/積體電路晶粒
324...電路層
326...電導體介層孔
328...額外液晶聚合物(LCP)基板
334...另一互連層堆疊
336...經圖案化之電導體層
337...介電層
338...另一液晶聚合物(LCP)基板
344...電路層
350...流程圖/另一犧牲基板/其他裝置/另一積體電路晶粒
410...電子裝置
412...犧牲基板
414...互連層堆疊
416...經圖案化之電導體層
417...介電層
418...液晶聚合物(LCP)基板
420...第一裝置/積體電路晶粒
422...電導體介層孔
429...第二裝置
450...流程圖
圖1為根據本發明之製造電子裝置之方法的流程圖。
圖2A至圖2D為如經由圖1中所展示之方法所形成的本發明之電子裝置的連續示意性橫截面圖。
圖3為根據本發明之製造電子裝置之方法的另一實施例的流程圖。
圖4A至圖4E為如經由圖3中所展示之方法所形成的本發明之電子裝置的連續示意性橫截面圖。
圖5為根據本發明之製造電子裝置之方法的另一實施例的流程圖。
圖6A至圖6E為如經由圖5中所展示之方法所形成的本發明之電子裝置的連續示意性橫截面圖。
圖7為根據本發明之製造電子裝置之方法的又一實施例的流程圖。
圖8A至圖8E為如經由圖7中所展示之方法所形成的本發明之電子裝置的連續示意性橫截面圖。
圖9為根據本發明之製造電子裝置之方法的再一實施例的流程圖。
圖10A至圖10E為如經由圖9中所展示之方法所形成的本發明之電子裝置的連續示意性橫截面圖。
50...流程圖
Claims (10)
- 一種製造一電子裝置之方法,其包含:形成一互連層堆疊,該互連層堆疊在一犧牲基板上且包含複數個經圖案化之電導體層,及在鄰近之經圖案化之電導體層之間的一介電層;形成一液晶聚合物(LCP)基板且包含至少一電導體介層孔;在該互連層堆疊之與該犧牲基板相反之一側上將該LCP基板對準至該互連層堆疊;層疊該LCP基板至該互連層堆疊以形成直接在該互連層堆疊及該LCP基板之間之一熔融接縫,該至少一電導體介層孔係金屬間地被結合至一最上的經圖案化之電導體層;移除該犧牲基板以曝露一最下的經圖案化之電導體層;及將至少一第一裝置電耦接至該最下的經圖案化之電導體層。
- 如請求項1之方法,其中將該LCP基板與該互連層堆疊層疊在一起包含將熱及壓力施加至該LCP基板及該互連層堆疊。
- 如請求項2之方法,其中施加熱及壓力係在一高壓釜中執行。
- 如請求項1之方法,其中形成該互連層堆疊包含藉由薄膜沈積形成該複數個經圖案化之電導體層。
- 如請求項1之方法,其中該LCP基板具有一小於0.0025吋之厚度。
- 如請求項1之方法,其中在一覆晶配置中,該至少一第一裝置包含一第一積體電路(IC)晶粒。
- 一種電子裝置,其包含:一液晶聚合物(LCP)基板,其包含至少一電導體介層孔;一互連層堆疊,其對準並層疊在該LCP基板上且包含複數個經圖案化之電導體層及在鄰近之經圖案化之電導體層之間的一介電層,該介電層包含一不同於LCP之材料;直接在該LCP基板與該互連層堆疊之間的一熔融接縫;在該LCP基板中之該至少一電導體介層孔與該互連層堆疊中之一最上的經圖案化之電導體層之間的一金屬間結合;及至少一第一裝置,其電耦接至一最下的經圖案化之電導體層。
- 如請求項7之電子裝置,其中該LCP基板具有一小於0.0025吋之厚度。
- 如請求項7之電子裝置,其中在一覆晶配置中,該至少一第一裝置包含一第一積體電路(IC)晶粒。
- 如請求項7之電子裝置,該電子裝置進一步包含至少一第二裝置,該至少一第二裝置在該LCP基板上且使用該 至少一電導體介層孔而電耦接至該最上的經圖案化之電導體層。
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US13/006,973 US8867219B2 (en) | 2011-01-14 | 2011-01-14 | Method of transferring and electrically joining a high density multilevel thin film to a circuitized and flexible organic substrate and associated devices |
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WO2012096774A1 (en) | 2012-07-19 |
US20160322284A1 (en) | 2016-11-03 |
CN103314649A (zh) | 2013-09-18 |
CN103314649B (zh) | 2016-06-01 |
EP2664224A1 (en) | 2013-11-20 |
US9691698B2 (en) | 2017-06-27 |
US9420687B2 (en) | 2016-08-16 |
US20140376197A1 (en) | 2014-12-25 |
US8867219B2 (en) | 2014-10-21 |
US20120182701A1 (en) | 2012-07-19 |
KR101494988B1 (ko) | 2015-02-23 |
TW201230222A (en) | 2012-07-16 |
KR20130115323A (ko) | 2013-10-21 |
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