TWI548319B - 提供可撓性結構的方法及可撓性裝置 - Google Patents

提供可撓性結構的方法及可撓性裝置 Download PDF

Info

Publication number
TWI548319B
TWI548319B TW102140426A TW102140426A TWI548319B TW I548319 B TWI548319 B TW I548319B TW 102140426 A TW102140426 A TW 102140426A TW 102140426 A TW102140426 A TW 102140426A TW I548319 B TWI548319 B TW I548319B
Authority
TW
Taiwan
Prior art keywords
flexible substrate
adhesive layer
flexible
layer
hard layer
Prior art date
Application number
TW102140426A
Other languages
English (en)
Other versions
TW201419973A (zh
Inventor
余振華
林士庭
林俊成
侯上勇
盧思維
Original Assignee
台灣積體電路製造股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 台灣積體電路製造股份有限公司 filed Critical 台灣積體電路製造股份有限公司
Publication of TW201419973A publication Critical patent/TW201419973A/zh
Application granted granted Critical
Publication of TWI548319B publication Critical patent/TWI548319B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05609—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05611—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/05698—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/05699—Material of the matrix
    • H01L2224/05794—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/057 - H01L2224/05791
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/05698—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/05798—Fillers
    • H01L2224/05799—Base material
    • H01L2224/058—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13109—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13199—Material of the matrix
    • H01L2224/13294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/132 - H01L2224/13291
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298—Fillers
    • H01L2224/13299—Base material
    • H01L2224/133—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the bump connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81401—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/81409—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81401—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/81411—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/81424—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81444—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Combinations Of Printed Boards (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)

Description

提供可撓性結構的方法及可撓性裝置
本發明係有關於半導體元件的封裝技術，特別有關於可撓性基板上的晶片接合結構及其形成方法。
可撓性基板(flexible substrate)(在此也稱為軟性基板(flex substrate))為針對可撓性動作提供的基板，可撓性基板提供的優點在應用上超過非可撓性基板，在可撓性基板上，元件可承受例如彎曲(bending)、扭轉(twisting)或類似的動作。半導體元件、積體電路或類似的元件可以電性耦接至軟性基板，軟性基板與耦接至此軟性基板的元件之間在材料特性上的差異會使得元件與軟性基板之間的電性連接品質降低，例如，軟性基板與電性耦接至此軟性基板的元件之間在熱膨脹係數上的差異會在元件與軟性基板之間的電性連接器上造成應變(strain)。
在一實施例中，提供可撓性結構的方法可包含提供軟性基板，其具有複數個電性連接器形成於軟性基板的第一側上；以及將黏著層和堅硬層附著於軟性基板的第二側，其中黏著層和堅硬層附著至軟性基板第二側的一區域，此區域背對軟性基板第一側上的前述之一個或多個電性連接器。
在另一實施例中，提供可撓性結構的另一方法可包含將元件附著至位於軟性基板第一側上的一個或超過一個以上的電性連接器；以及將黏著層和堅硬層附著在軟性基板的第二側上，其中黏著層附著至軟性基板第二側的一區域，此區域背對前述之一個或超過一個以上的電性連接器。
在一實施例中，提供可撓性裝置，此裝置可包含軟性基板，其具有第一側和第二側；一個或超過一個以上的電性連接器設置在軟性基板的第一側上；第一堅硬層設置在軟性基板的第二側上，其中第一堅硬層位於第二側的一區域內，此區域背對軟性基板第一側上的前述之一個或超過一個以上的電性連接器；以及第一黏著層設置於第一堅硬層與軟性基板的第二側之間。
110、210、310‧‧‧軟性基板
110a、210a、310a‧‧‧軟性基板的第一側
110b、210b、310b‧‧‧軟性基板的第二側
112、152‧‧‧焊料凸塊以及/或接合墊
120、250、314、331、341‧‧‧黏著層
130、260、315.1、315.2、332、342‧‧‧堅硬層
140、270、316、330、340‧‧‧控制翹曲的元件
150、220、312、322‧‧‧元件
160、240、313、323‧‧‧成型底部填充膠
170、230、311、321‧‧‧電性連接器
為了讓本揭示之目的、特徵、及優點能更明顯易懂，以下配合所附圖式作詳細說明如下：第1A-1D圖顯示依據一實施例，形成控制翹曲的元件之各中間階段的剖面示意圖；第2A-2D圖顯示依據另一實施例，形成控制翹曲的元件之各中間階段的剖面示意圖；以及第3A-3B圖顯示依據各種實施例，各種控制翹曲的元件之剖面示意圖。
以下詳述實施例的製造與使用，然而，可以理解 的是，本揭示提供許多可應用的發明概念，其可以在廣泛的各種特定背景中實施，在此所討論的特定實施例僅用於說明本揭示之製造與使用的特定方式，並非用於限定本揭示的範圍。
一般而言，在此所述之實施例提供控制翹曲的元件(warpage control device)，其限制了軟性基板的翹曲(warpage)或彎曲(bow)。控制翹曲的元件可在回焊製程之前或之後應用，在回焊製程中元件可電性耦接至軟性基板，控制翹曲的元件可提供對軟性基板的支撐，其有助於在各種製造、組裝以及/或測試製程的全部過程中維持元件與軟性基板之間電性連接的完整性，控制翹曲的元件對軟性基板提供的支撐也可有助於在各種操作環境、條件或應用中，維持元件與軟性基板之間電性連接的完整性。
第1A-1D圖說明依據一實施例，形成控制翹曲的元件140之中間階段的剖面示意圖，如第1A-1B圖所示，軟性基板110可包含第一側110a和第二側110b，在一實施例中，複數個焊料凸塊(solder bumps)以及/或接合墊(bonding pads)112可形成在軟性基板的第一側110a上，黏著層120和堅硬層(rigid layer)130一起可包括控制翹曲的元件140，並且可附著至軟性基板110的第二側110b。在一實施例中，控制翹曲的元件140可形成在第二側110b的一區域上，此區域背對形成在軟性基板110第一側110a上的這些焊料凸塊以及/或接合墊112。
在各種實施例中，軟性基板110可包括高分子膜，例如聚對苯二甲酸乙二酯(polyethylene terephthalate)、聚亞醯 胺類薄膜(kapton)、聚亞醯胺(polyimide)或類似的材料；軟性基板110還可包括可撓性塑膠基板(flexible plastic substrates)、透明導電聚酯膜(transparent conductive polyester films)或其他類似的材料。在各種實施例中，黏著層120可包括環氧樹脂(epoxy)、高分子、黏膠(glue)、黏著劑(adhesive agent)或類似的材料，黏著層120設置於堅硬層130與軟性基板110之間。在各種實施例中，堅硬層130可包括金屬、塑膠、高分子、半導體材料、石英、陶瓷或其他材料，堅硬層130可對軟性基板110提供堅硬或半堅硬(semi-rigid)的支撐，例如，可選擇相較於軟性基板110具有更高體積模數(bulk modulus)的材料作為堅硬層130，在一實施例中，堅硬層130可包括複數層(未繪出)的結構。
如第1A-1B圖所示，在一實施例中，可在電性耦接另一元件(如下所述)至軟性基板110之前，將控制翹曲的元件140附著至軟性基板110。在電性耦接其他元件(如下所述)至軟性基板110之前，將控制翹曲的元件140安置在軟性基板110上，其有助於在電性耦接其他元件(如下所述)的期間以及/或在後續的製造程序期間，讓軟性基板110的翹曲或彎曲最小化。
將控制翹曲的元件140附著在軟性基板110上的方法可以有很多種，在一實施例中，黏著層120可先形成在軟性基板110的第二側110b上，然後可將堅硬層施加至黏著層120。在各種實施例中，可使用各種製程，例如層壓(lamination)、噴灑(spraying)、浸泡(dipping)、刷塗(brushing) 或類似的方式，將黏著層120形成在軟性基板110的第二側110b上，在這些實施例中，例如可藉由壓製(pressed)、熔接(fused)、層壓(laminated)、貼附(affixed)或塗佈(applied)的方式將堅硬層130施加在黏著層120上，以形成控制翹曲的元件140。
在另一實施例中，黏著層120可先形成在堅硬層130上，然後組合在一起的黏著層120與堅硬層130可附著至軟性基板110的第二側110b，以形成控制翹曲的元件140。在各種實施例中，可使用各種製程，例如層壓(lamination)、噴灑(spraying)、浸泡(dipping)、刷塗(brushing)或類似的方式，將黏著層120先形成在堅硬層130上，在這些實施例中，可藉由壓製(pressed)、熔接(fused)、層壓(laminated)、貼附(affixed)或塗佈(applied)的方式，讓堅硬層130和黏著層120一起附著在軟性基板110的第二側110b上，以形成控制翹曲的元件140。
如第1C-1D圖所示，在控制翹曲的元件140附著至軟性基板110上之後，元件150可耦接至軟性基板110。如第1C圖所示，元件150可包含焊料凸塊或接合墊152形成於其上，元件150可對齊並放置在位於軟性基板110上相對應的焊料凸塊或接合墊112上。在各種實施例中，元件150可以是已封裝的半導體元件、中介層(interposer)、晶片、晶圓、另一個軟性基板、非可撓性基板或其他類似的元件。在各種實施例中，元件上的焊料凸塊或接合墊152可包括金屬，其包含但不限定於，共熔合金(eutectic alloy)，例如AlCu、AlGe；或者低熔點金屬層，例如In、Au、Sn、Cu、無鉛焊料、錫膏(solder paste) 或其他類似的材料。
如第1D圖所示，可經由複數個電性連接器170，進行回焊製程將元件150耦接至軟性基板110，在回焊製程期間，控制翹曲的元件140可有助於讓軟性基板110的翹曲或彎曲降到最低。如第1D圖所示，成型底部填充膠(molding underfill)160可在元件150與軟性基板的第一側110a之間形成，成型底部填充膠160可進一步在後續的製造程序期間讓軟性基板110的翹曲或彎曲降到最低。
在各種實施例中，位於軟性基板110的第一側110a上的焊料凸塊以及/或接合墊112可包括金屬，其包含但不限定於，共熔合金，例如AlCu、AlGe；或者低熔點金屬層，例如In、Au、Sn、Cu或其他類似的材料。
第2A-2D圖顯示依據另一實施例，形成控制翹曲的元件之各中間階段的剖面示意圖，如第2A-2B圖所示，軟性基板210可包含第一側210a和第二側210b，元件220可經由軟性基板210第一側210a上的複數個連接器230電性耦接至軟性基板210，第2B圖顯示成型底部填充膠240形成在第2A圖的元件220與軟性基板210的第一側210a之間後的狀態。
如第2C-2D圖所示，控制翹曲的元件270可附著在軟性基板210的第二側210b上，控制翹曲的元件270可包含黏著層250與堅硬層260。在一實施例中，控制翹曲的元件270可形成在第二側210b的一區域上，此區域可背對形成在軟性基板210第一側210a上的元件220。相較於第1A-1D圖中所示之實施例，其控制翹曲的元件140在元件150耦接至軟性 基板110之前就附著至軟性基板110，而第2A-2D圖中所示之實施例則是在元件220耦接至軟性基板210之後，才提供控制翹曲的元件270附著至軟性基板210。
將控制翹曲的元件270附著至軟性基板210上的方法可以改變，在一實施例中，黏著層250可先形成在軟性基板210的第二側210b上，然後堅硬層260再附著至黏著層250。在各種實施例中，可使用各種製程，例如層壓、噴灑、浸泡、刷塗或類似的方式，將黏著層形成在軟性基板210的第二側210b上，在這些實施例中，堅硬層260可經由壓製、熔接、層壓、貼附或塗佈等方式附著在黏著層250上，以形成控制翹曲的元件270。
在另一實施例中，黏著層250可先形成在堅硬層260上，然後結合在一起的黏著層250和堅硬層260再附著至軟性基板210的第二側210b，以形成控制翹曲的元件270。在各種實施例中，可使用各種製程，例如層壓、噴灑、浸泡、刷塗或類似的方式，將黏著層形成在堅硬層260上，在這些實施例中，堅硬層260和黏著層250可一起經由壓製、層壓、熔接、貼附或塗佈等方式附著在軟性基板210的第二側210b上，以形成控制翹曲的元件270。
如第2A-2D圖所示，元件220可在控制翹曲的元件270形成於軟性基板210上之前就耦接至軟性基板210。在軟性基板上形成控制翹曲的元件之順序可取決於製造程序，以及/或可耦接至軟性基板相反側上的元件種類，在第1A-1D圖及第2A-2D圖中所示之實施例的提供係說明在軟性基板上形 成控制翹曲的元件之順序可以改變，其係由包含軟性基板的設計以及/或製造程序而決定。
本揭示還提供其他控制翹曲的元件之型態，第3A-3B圖顯示依據各種實施例，各種控制翹曲的元件之剖面示意圖。如第3A圖所示，軟性基板310可包含第一側310a和第二側310b，複數個電性連接器311可形成在介於元件312與軟性基板310之間的第一側310a上，並且成型底部填充膠313可形成在元件312與軟性基板310的第一側310a之間，控制翹曲的元件316可附著至第二側310b的一區域，此區域背對形成在軟性基板310第一側310a上的元件312。控制翹曲的元件316可包含黏著層314以及複數層結構，例如在此所示之第一層315.1和第二層315.2。在各種實施例中，這些複數層可以是堅硬層、半堅硬層、散熱器(heat-sinks)或類似的元件，這些層可使用與在此所討論的黏著方法類似的方法黏著在一起。
第3B圖顯示依據一實施例，在軟性基板320上的複數個控制翹曲的元件之剖面示意圖，如第3B圖所示，軟性基板320可包含第一側320a和第二側320b，複數個電性連接器321可形成在元件322與軟性基板320之間，並且位於軟性基板320的第一側320a上，成型底部填充膠323可形成在元件322與軟性基板320的第一側320a之間。
第一控制翹曲的元件330可包含第一黏著層331和第一堅硬層332，其可附著於軟性基板320的第二側320b，第一控制翹曲的元件330可形成在第二側320b的一區域內，此區域可背對形成在軟性基板320第一側320a上的元件322。
如第3B圖所示，軟性基板320可以用一種方式折彎成雙背面(double-back)在其本身上，在一實施例中，第二控制翹曲的元件340可包含第二黏著層341和第二堅硬層342，第二控制翹曲的元件340也可以附著於軟性基板320的第二側320b，第二控制翹曲的元件340可形成在第二側320b的一區域內，當軟性基板320向後折彎在其本身上，如第3B圖所示，此區域大抵上可對齊第一控制翹曲的元件330。
第二控制翹曲的元件340可提供額外的支撐，在從頭至尾的應用期間，其有助於維持元件322與軟性基板320之間的電性連接器321之完整性，在應用時可能會有一種或多種力量施加在此，其可能會一起擠壓軟性基板320，這些應用可包含，例如觸控螢幕的應用、觸控板(touch pad)的應用、按鍵(press-key)的應用或其他應用，在一實施例中，第二控制翹曲的元件位於相似的區域中，但是第二控制翹曲的元件可能位於軟性基板的第一側320a上。
雖然本發明已揭露較佳實施例如上，然其並非用以限定本發明，在此技術領域中具有通常知識者當可瞭解，在不脫離本發明之精神和範圍內，當可做些許更動與潤飾。例如，在此技術領域中具有通常知識者當可瞭解，在不脫離本發明之精神和範圍內，上述的結構及步驟順序可以改變。因此，本發明之保護範圍當視後附之申請專利範圍所界定為準。
110‧‧‧軟性基板
110a‧‧‧軟性基板的第一側
140‧‧‧控制翹曲的元件
150‧‧‧元件
160‧‧‧成型底部填充膠
170‧‧‧電性連接器

Claims (9)

  1. 一種提供可撓性結構的方法，包括：提供一軟性基板，具有複數個電性連接器形成於該軟性基板的一第一側上；將一黏著層和一堅硬層附著於該軟性基板的一第二側，其中該黏著層和該堅硬層附著至該軟性基板的該第二側的一區域，該區域背對於該軟性基板的該第一側上的該些電性連接器的一個或多個電性連接器；將一元件附著至該軟性基板的該第一側上的該些電性連接器；以及形成一成型底部填充膠，介於該元件與該軟性基板之間。
  2. 如申請專利範圍第1項所述之提供可撓性結構的方法，其中該堅硬層為金屬、高分子或前述之組合。
  3. 如申請專利範圍第1項所述之提供可撓性結構的方法，其中將該元件附著至該軟性基板的該第一側上的該些電性連接器的該步驟是在將該黏著層和該堅硬層附著於該軟性基板的該第二側的該步驟之前或之後進行。
  4. 如申請專利範圍第3項所述之提供可撓性結構的方法，其中該元件為一封裝的半導體元件、一晶片或一中介層。
  5. 如申請專利範圍第1項所述之提供可撓性結構的方法，其中將該黏著層和該堅硬層附著於該軟性基板的該第二側的該步驟包括：將該黏著層附著於該軟性基板的該第二側；以及於該黏著層附著之後，將該堅硬層附著於該黏著層。
  6. 如申請專利範圍第1項所述之提供可撓性結構的方法，其中將該黏著層和該堅硬層附著於該軟性基板的該第二側的該步驟包括：在該堅硬層上形成該黏著層；以及於該堅硬層上形成該黏著層之後，將該黏著層和該堅硬層附著至該軟性基板的該第二側。
  7. 一種可撓性裝置，包括：一軟性基板，具有一第一側和一第二側；一個或超過一個以上的電性連接器，設置在該軟性基板的該第一側上；一第一堅硬層，設置在該軟性基板的該第二側上，其中該第一堅硬層位於該第二側的一區域內，該區域背對於該軟性基板的該第一側上的該一個或超過一個以上的電性連接器；一第一黏著層，設置於該第一堅硬層與該軟性基板的該第二側之間；一元件，電性耦接至該軟性基板的該第一側上的該一個或超過一個以上的電性連接器；以及一成型底部填充膠，介於該元件與該軟性基板的該第一側之間。
  8. 如申請專利範圍第7項所述之可撓性裝置，其中該第一堅硬層包括複數層。
  9. 如申請專利範圍第7項所述之可撓性裝置，更包括：一第二黏著層，設置於該軟性基板的該第二側上，其中該 第二黏著層位於該軟性基板的該第二側的一區域內，該區域面對該第一堅硬層；以及一第二堅硬層，設置於該第二黏著層上。
TW102140426A 2012-11-15 2013-11-07 提供可撓性結構的方法及可撓性裝置 TWI548319B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261726824P 2012-11-15 2012-11-15
US13/782,109 US20140131897A1 (en) 2012-11-15 2013-03-01 Warpage Control for Flexible Substrates

Publications (2)

Publication Number Publication Date
TW201419973A TW201419973A (zh) 2014-05-16
TWI548319B true TWI548319B (zh) 2016-09-01

Family

ID=50680954

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102140426A TWI548319B (zh) 2012-11-15 2013-11-07 提供可撓性結構的方法及可撓性裝置

Country Status (3)

Country Link
US (2) US20140131897A1 (zh)
KR (3) KR20140063388A (zh)
TW (1) TWI548319B (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9756733B2 (en) 2011-10-04 2017-09-05 Apple Inc. Display and multi-layer printed circuit board with shared flexible substrate
JP6170300B2 (ja) * 2013-01-08 2017-07-26 住友化学株式会社 窒化物半導体デバイス
TWI501713B (zh) * 2013-08-26 2015-09-21 Unimicron Technology Corp 軟硬板模組以及軟硬板模組的製造方法
JP6458493B2 (ja) * 2014-12-25 2019-01-30 大日本印刷株式会社 Ｌｅｄ素子用基板、及びそれを用いたｌｅｄ実装モジュールの製造方法
US9614168B2 (en) * 2015-01-12 2017-04-04 Apple Inc. Flexible display panel with bent substrate
CN105225972B (zh) * 2015-10-22 2017-09-26 长电科技（滁州）有限公司 一种半导体封装结构的制作方法
CN108417501B (zh) 2018-03-05 2020-03-24 台达电子企业管理（上海）有限公司 功率模块及其制备方法
KR20200041408A (ko) * 2018-10-11 2020-04-22 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법
TWI737312B (zh) * 2019-04-18 2021-08-21 台灣積體電路製造股份有限公司 回焊裝置以及接合方法
TWI697087B (zh) * 2019-04-18 2020-06-21 台灣積體電路製造股份有限公司 回焊裝置以及接合方法
US11721551B2 (en) * 2021-01-26 2023-08-08 Tokyo Electron Limited Localized stress regions for three-dimension chiplet formation

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM353605U (en) * 2008-10-29 2009-03-21 Inventec Appliances Corp Flexible printed circuit board with a reinforcing structure
CN202396084U (zh) * 2011-12-12 2012-08-22 嘉联益科技股份有限公司 可挠性电路板

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001510944A (ja) * 1997-07-21 2001-08-07 アギラ テクノロジーズ インコーポレイテッド 半導体フリップチップ・パッケージおよびその製造方法
US6163462A (en) 1997-12-08 2000-12-19 Analog Devices, Inc. Stress relief substrate for solder ball grid array mounted circuits and method of packaging
WO2001071806A1 (fr) * 2000-03-21 2001-09-27 Mitsubishi Denki Kabushiki Kaisha Dispositif a semi-conducteur, procede de realisation d'un dispositif electronique, dispositif electronique, et terminal d'informations portable
US7169685B2 (en) * 2002-02-25 2007-01-30 Micron Technology, Inc. Wafer back side coating to balance stress from passivation layer on front of wafer and be used as die attach adhesive
US20040155358A1 (en) 2003-02-07 2004-08-12 Toshitsune Iijima First and second level packaging assemblies and method of assembling package
US20060043603A1 (en) * 2004-08-31 2006-03-02 Lsi Logic Corporation Low temperature PB-free processing for semiconductor devices
KR100643756B1 (ko) 2004-09-10 2006-11-10 삼성전자주식회사 유연소자, 유연압력센서, 및 이들의 제조방법
US20060208365A1 (en) 2005-03-17 2006-09-21 Chipmos Technologies Inc. Flip-chip-on-film package structure
US7504718B2 (en) 2005-05-10 2009-03-17 International Business Machines Corporation Apparatus and methods for constructing balanced chip packages to reduce thermally induced mechanical strain
JP4585416B2 (ja) * 2005-09-22 2010-11-24 富士通株式会社 基板の反り低減構造および基板の反り低減方法
US8207607B2 (en) 2007-12-14 2012-06-26 Denso Corporation Semiconductor device with resin mold
WO2009122854A1 (ja) 2008-04-03 2009-10-08 シャープ株式会社 配線基板、その配線基板を用いた半導体装置。
JP5131023B2 (ja) 2008-05-15 2013-01-30 日立電線株式会社 光電気変換モジュール
US8237275B2 (en) 2010-06-21 2012-08-07 Aeroflex Colorado Springs Inc. Tungsten stiffener for flexible substrate assembly
JP2012146823A (ja) 2011-01-12 2012-08-02 Nippon Koden Corp シールド方法及電子機器

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM353605U (en) * 2008-10-29 2009-03-21 Inventec Appliances Corp Flexible printed circuit board with a reinforcing structure
CN202396084U (zh) * 2011-12-12 2012-08-22 嘉联益科技股份有限公司 可挠性电路板

Also Published As

Publication number Publication date
KR20160061935A (ko) 2016-06-01
KR20140063388A (ko) 2014-05-27
US20140131897A1 (en) 2014-05-15
US9502271B2 (en) 2016-11-22
TW201419973A (zh) 2014-05-16
KR101698720B1 (ko) 2017-01-20
KR20150103648A (ko) 2015-09-11
US20140302642A1 (en) 2014-10-09

Similar Documents

Publication Publication Date Title
TWI548319B (zh) 提供可撓性結構的方法及可撓性裝置
JP5378585B2 (ja) 半導体装置
JPWO2009038169A1 (ja) 半導体装置及びその製造方法
JP2011040749A (ja) 回路チップ・パッケージングのための方法及びパッケージ
TWI255488B (en) Semiconductor device and multilayer substrate therefor
KR20150015617A (ko) 휨 개선을 위한 반도체 칩 다이 구조 및 방법
JP7176048B2 (ja) 半導体ダイと受動熱交換器との間に熱界面接合を形成するための装置及び方法
JP2012009655A (ja) 半導体パッケージおよび半導体パッケージの製造方法
JP6036083B2 (ja) 半導体装置及びその製造方法並びに電子装置及びその製造方法
JP2011187635A (ja) 半導体装置およびその製造方法
JP4641551B2 (ja) 半導体装置の製造方法
JP5812123B2 (ja) 電子機器の製造方法
JP2010103270A (ja) 半導体装置および半導体装置の製造方法
JP4177198B2 (ja) 半導体装置の製造方法
JP3419398B2 (ja) 半導体装置の製造方法
JP4243077B2 (ja) 半導体装置およびその製造方法
JP4442426B2 (ja) 半導体装置及びその製造方法
TWI523165B (zh) 以異方性導電膠膜接合之半導體封裝結構
JP3598058B2 (ja) 回路基板
JP2002231879A (ja) 半導体装置の製造方法
JP2009094353A (ja) 半導体装置およびその製造方法
JP2008282941A (ja) 半導体装置
JP2006202996A (ja) 半導体チップの実装構造、及びその実装方法
JP2004207550A (ja) 半導体装置用テープキャリア
JPH11135672A (ja) 半導体パッケージ