TWI456653B - 電漿氮化處理方法,半導體裝置的製造方法及電漿處理裝置 - Google Patents
電漿氮化處理方法,半導體裝置的製造方法及電漿處理裝置 Download PDFInfo
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- TWI456653B TWI456653B TW095120439A TW95120439A TWI456653B TW I456653 B TWI456653 B TW I456653B TW 095120439 A TW095120439 A TW 095120439A TW 95120439 A TW95120439 A TW 95120439A TW I456653 B TWI456653 B TW I456653B
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- Prior art keywords
- plasma
- nitriding treatment
- cerium
- semiconductor device
- manufacturing
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- 238000005121 nitriding Methods 0.000 title claims 15
- 238000000034 method Methods 0.000 title claims 9
- 238000004519 manufacturing process Methods 0.000 title claims 7
- 239000004065 semiconductor Substances 0.000 title claims 7
- 239000007789 gas Substances 0.000 claims 8
- 229910052684 Cerium Inorganic materials 0.000 claims 5
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 claims 5
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims 4
- 229910052707 ruthenium Inorganic materials 0.000 claims 4
- BCZWPKDRLPGFFZ-UHFFFAOYSA-N azanylidynecerium Chemical compound [Ce]#N BCZWPKDRLPGFFZ-UHFFFAOYSA-N 0.000 claims 3
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 239000013078 crystal Substances 0.000 claims 2
- 229910001873 dinitrogen Inorganic materials 0.000 claims 2
- 229910052797 bismuth Inorganic materials 0.000 claims 1
- -1 bismuth nitride Chemical class 0.000 claims 1
- 239000002131 composite material Substances 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
- H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Formation Of Insulating Films (AREA)
- Thin Film Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Claims (13)
- 一種電漿氮化處理方法,係於電漿處理裝置的處理容器內使含氮氣體的電漿對被處理體表面的矽作用進行氮化處理,形成矽氮化膜之電漿氮化處理方法,其特徵為:上述電漿係於上述處理容器內導入稀有氣體及含氮氣體,藉由微波來激發該等而形成的微波激發高密度電漿,上述氮化處理的處理溫度為600℃以上800℃以下,上述稀有氣體的流量為250~2000mL/min,上述含氮氣體的流量為10~500mL/min,上述處理容器內的處理壓力為6.7~1333Pa。
- 如申請專利範圍第1項之電漿氮化處理方法,其中,上述微波激發高密度電漿係以具有複數個槽的平面天線來導入微波至上述處理容器內而形成者。
- 如申請專利範圍第1項之電漿氮化處理方法,其中,上述氮化處理的處理壓力為20Pa以上。
- 如申請專利範圍第1項之電漿氮化處理方法,其中,上述矽氮化膜的膜厚為0.5nm~3nm。
- 如申請專利範圍第4項之電漿氮化處理方法,其中,上述矽氮化膜為閘極絶緣膜。
- 如申請專利範圍第5項之電漿氮化處理方法,其中,上述矽為單結晶矽、多結晶矽或非晶質矽。
- 如申請專利範圍第1項之電漿氮化處理方法,其中,在形成比矽氮化膜更高介電常數的高介電常數材料與矽氮化膜的複合材料時,進行上述矽氮化膜的形成。
- 一種半導體裝置的製造方法,其特徵為包含:在電漿處理裝置的處理容器內使含氮氣體的電漿對被處理體表面的矽作用而進行氮化處理,形成含氮化矽的閘極絶緣膜之步驟,上述電漿係於上述處理容器內導入稀有氣體及含氮氣體,藉由微波來激發該等而形成的微波激發高密度電漿,上述氮化處理的處理溫度為600℃以上800℃以下,上述稀有氣體的流量為250~2000mL/min,上述含氮氣體的流量為10~500mL/min,上述處理容器內的處理壓力為6.7~1333Pa。
- 如申請專利範圍第8項之半導體裝置的製造方法,其中,更包含:在閘極絶緣膜的形成後,以500℃以上的温度來進行加熱處理之步驟。
- 如申請專利範圍第9項之半導體裝置的製造方法,其中,上述微波激發高密度電漿係以具有複數個槽的平面天線來導入微波至上述處理容器內而形成者。
- 如申請專利範圍第9項之半導體裝置的製造方法,其中,上述氮化處理的處理壓力為20Pa以上。
- 如申請專利範圍第9項之半導體裝置的製造方法,其中,上述矽為單結晶矽、多結晶矽或非晶質矽。
- 如申請專利範圍第10項之半導體裝置的製造方法,其中,上述閘極絶緣膜的膜厚為0.5nm~3nm。
Applications Claiming Priority (1)
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JP2005168094 | 2005-06-08 |
Publications (2)
Publication Number | Publication Date |
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TW200739725A TW200739725A (en) | 2007-10-16 |
TWI456653B true TWI456653B (zh) | 2014-10-11 |
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TW102133649A TW201403712A (zh) | 2005-06-08 | 2006-06-08 | 電漿氮化處理方法,半導體裝置的製造方法及電漿處理裝置 |
TW095120439A TWI456653B (zh) | 2005-06-08 | 2006-06-08 | 電漿氮化處理方法,半導體裝置的製造方法及電漿處理裝置 |
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TW102133649A TW201403712A (zh) | 2005-06-08 | 2006-06-08 | 電漿氮化處理方法,半導體裝置的製造方法及電漿處理裝置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7968470B2 (zh) |
EP (1) | EP1898456A4 (zh) |
JP (2) | JP5339327B2 (zh) |
KR (1) | KR100942106B1 (zh) |
CN (1) | CN101194345B (zh) |
TW (2) | TW201403712A (zh) |
WO (1) | WO2006132262A1 (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW200511430A (en) * | 2003-05-29 | 2005-03-16 | Tokyo Electron Ltd | Plasma processing apparatus and plasma processing method |
JP2007288069A (ja) * | 2006-04-19 | 2007-11-01 | Hitachi Kokusai Electric Inc | 半導体装置の製造方法 |
KR101063083B1 (ko) * | 2006-05-31 | 2011-09-07 | 도쿄엘렉트론가부시키가이샤 | 플라즈마 cvd 방법, 질화 규소막의 형성 방법, 반도체 장치의 제조 방법 및 플라즈마 cvd 장치 |
JP5608315B2 (ja) * | 2007-12-03 | 2014-10-15 | ピーエスフォー ルクスコ エスエイアールエル | キャパシタ用電極及びその製造方法、キャパシタ |
JP2010135812A (ja) * | 2010-01-13 | 2010-06-17 | Tokyo Electron Ltd | 半導体装置の製造方法 |
US9177787B2 (en) * | 2013-03-15 | 2015-11-03 | Applied Materials, Inc. | NH3 containing plasma nitridation of a layer of a three dimensional structure on a substrate |
CN105655398A (zh) * | 2014-11-10 | 2016-06-08 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
JP6996858B2 (ja) * | 2017-03-29 | 2022-01-17 | 旭化成エレクトロニクス株式会社 | 半導体装置及びその製造方法 |
US11049731B2 (en) | 2018-09-27 | 2021-06-29 | Applied Materials, Inc. | Methods for film modification |
US20200347493A1 (en) | 2019-05-05 | 2020-11-05 | Applied Materials, Inc. | Reverse Selective Deposition |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040119111A1 (en) * | 2002-12-12 | 2004-06-24 | Tadahiro Omi | Non-volatile semiconductor memory device and manufacturing method for the same |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11279773A (ja) * | 1998-03-27 | 1999-10-12 | Tomoo Ueno | 成膜方法 |
US20010052323A1 (en) * | 1999-02-17 | 2001-12-20 | Ellie Yieh | Method and apparatus for forming material layers from atomic gasses |
KR100745495B1 (ko) * | 1999-03-10 | 2007-08-03 | 동경 엘렉트론 주식회사 | 반도체 제조방법 및 반도체 제조장치 |
JP4255563B2 (ja) | 1999-04-05 | 2009-04-15 | 東京エレクトロン株式会社 | 半導体製造方法及び半導体製造装置 |
US6297103B1 (en) * | 2000-02-28 | 2001-10-02 | Micron Technology, Inc. | Structure and method for dual gate oxide thicknesses |
JP2001274148A (ja) | 2000-03-24 | 2001-10-05 | Tokyo Electron Ltd | プラズマ処理装置及び方法 |
CN101399198A (zh) * | 2001-01-22 | 2009-04-01 | 东京毅力科创株式会社 | 电子器件材料的制造方法 |
TW557514B (en) * | 2001-08-02 | 2003-10-11 | Tokyo Electron Ltd | Method for processing a substrate and material for electronic devices |
JP2003068850A (ja) * | 2001-08-29 | 2003-03-07 | Tokyo Electron Ltd | 半導体装置およびその製造方法 |
JP3823798B2 (ja) * | 2001-10-02 | 2006-09-20 | ソニー株式会社 | 窒化シリコン膜の形成方法、ゲート絶縁膜の形成方法及びp形半導体素子の形成方法 |
JP2003115587A (ja) * | 2001-10-03 | 2003-04-18 | Tadahiro Omi | <110>方位のシリコン表面上に形成された半導体装置およびその製造方法 |
JP4183934B2 (ja) * | 2001-10-19 | 2008-11-19 | 尚久 後藤 | マイクロ波プラズマ処理装置、マイクロ波プラズマ処理方法及びマイクロ波給電装置 |
KR100395507B1 (ko) * | 2001-11-27 | 2003-08-25 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조방법 |
CN1124364C (zh) * | 2001-12-07 | 2003-10-15 | 中国科学院长春光学精密机械与物理研究所 | 用电子回旋共振微波等离子体制备超薄氮化硅薄膜的方法 |
WO2004009861A2 (en) * | 2002-07-19 | 2004-01-29 | Asm America, Inc. | Method to form ultra high quality silicon-containing compound layers |
JP2004095889A (ja) * | 2002-08-30 | 2004-03-25 | Fasl Japan Ltd | 半導体記憶装置及びその製造方法 |
JP2004095918A (ja) * | 2002-08-30 | 2004-03-25 | Fasl Japan Ltd | 半導体記憶装置及び半導体装置の製造方法 |
JP4358504B2 (ja) * | 2002-12-12 | 2009-11-04 | 忠弘 大見 | 不揮発性半導体記憶装置の製造方法 |
JP2004356114A (ja) * | 2003-05-26 | 2004-12-16 | Tadahiro Omi | Pチャネルパワーmis電界効果トランジスタおよびスイッチング回路 |
JP2005150637A (ja) * | 2003-11-19 | 2005-06-09 | Canon Inc | 処理方法及び装置 |
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2006
- 2006-06-07 EP EP06757104A patent/EP1898456A4/en not_active Withdrawn
- 2006-06-07 JP JP2007520135A patent/JP5339327B2/ja active Active
- 2006-06-07 WO PCT/JP2006/311397 patent/WO2006132262A1/ja active Application Filing
- 2006-06-07 CN CN2006800202810A patent/CN101194345B/zh not_active Expired - Fee Related
- 2006-06-07 US US11/917,013 patent/US7968470B2/en not_active Expired - Fee Related
- 2006-06-07 KR KR1020077028517A patent/KR100942106B1/ko not_active IP Right Cessation
- 2006-06-08 TW TW102133649A patent/TW201403712A/zh unknown
- 2006-06-08 TW TW095120439A patent/TWI456653B/zh not_active IP Right Cessation
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2013
- 2013-06-05 JP JP2013118637A patent/JP2013225682A/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040119111A1 (en) * | 2002-12-12 | 2004-06-24 | Tadahiro Omi | Non-volatile semiconductor memory device and manufacturing method for the same |
JP2004193413A (ja) * | 2002-12-12 | 2004-07-08 | Tadahiro Omi | 不揮発性半導体記憶装置及びその製造方法 |
Also Published As
Publication number | Publication date |
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CN101194345B (zh) | 2010-05-19 |
JPWO2006132262A1 (ja) | 2009-01-08 |
WO2006132262A1 (ja) | 2006-12-14 |
JP2013225682A (ja) | 2013-10-31 |
CN101194345A (zh) | 2008-06-04 |
TW201403712A (zh) | 2014-01-16 |
EP1898456A4 (en) | 2009-11-18 |
US7968470B2 (en) | 2011-06-28 |
EP1898456A1 (en) | 2008-03-12 |
KR20080009740A (ko) | 2008-01-29 |
US20090104787A1 (en) | 2009-04-23 |
TW200739725A (en) | 2007-10-16 |
JP5339327B2 (ja) | 2013-11-13 |
KR100942106B1 (ko) | 2010-02-12 |
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