TWI452523B - 電子介面裝置及其製造方法與系統 - Google Patents

電子介面裝置及其製造方法與系統 Download PDF

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TWI452523B
TWI452523B TW096142616A TW96142616A TWI452523B TW I452523 B TWI452523 B TW I452523B TW 096142616 A TW096142616 A TW 096142616A TW 96142616 A TW96142616 A TW 96142616A TW I452523 B TWI452523 B TW I452523B
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layer
electronic interface
substrate
antenna
wires
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Guy Shafran
Oded Bashan
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Smartrac Ip Bv
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    • G06—COMPUTING; CALCULATING OR COUNTING
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
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    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
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    • G06K19/07773—Antenna details
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    • Y10T29/49016—Antenna or wave energy "plumbing" making
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49018—Antenna or wave energy "plumbing" making with other electrical component
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49117—Conductor or circuit manufacturing
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Description

電子介面裝置及其製造方法與系統
本發明一般是與電子介面卡(亦稱為"智慧卡")有關，且特別是與具有接觸性及/或非接觸性功能之電子介面卡有關。
下列美國專利可用來表示該領域技術的目前情況：7,278,580、7,271,039、7,269,021、7,243,840、7,240,847以及7,204,427。
本發明企圖提供改良之電子介面卡及其製造方法。
根據本發明一較佳具體實施例，其係提供了一種電子介面卡的製造方法，包括：在一基板層中定義一對孔洞；結合一天線與該基板層，使得天線之相對末端終止於該等孔洞；將一金屬元件放置在各該等孔洞中；將該天線的末端連接至該等金屬元件；將該基板層與一頂層及一底層層壓在一起；在該頂層與該基板層中形成一凹槽；將連接接線的末端貼附至該等金屬元件；將該等連接接線的相對末端貼附至一晶片模組；以及將該晶片模組密封於該凹槽中。
較佳地，該方法也包括：在進行層壓之前，先於該基板層下側上提供一第一附加基板層與一第二附加基板層。或者是，該頂層包括一第一頂部基板層與一第二頂部基板層。此外，該方法也包括暴露該第二頂部層鄰近該凹槽之一凹陷表面，而所述密封包括於該晶片模組之一下側上放置一黏接劑，並將該晶片模組插入該凹槽中，以使該下側與該凹陷表面接合。
較佳地，該方法也包括將該等接線摺到該晶片模組下方。且或者是，該方法係自動化。
較佳地，所述將連接接線的末端貼附至該等金屬元件係包括雷射接合。或者是，所述將該等連接接線的相對末端貼附至一晶片模組係包括焊接。
較佳地，該等接線具有實質上大於該電子介面卡中其個別相對末端間距離之一長度。
根據本發明之另一較佳具體實施例，提供了一種用於製造一電子介面卡的方法，其包括形成具有至少一層之一基板、於該至少一層中形成一天線、於該至少一層中形成一凹槽、連接一晶片模組與該天線之間的接線、以及將該晶片模組裝設於該凹槽中。
較佳地，該等接線具有實質上大於該電子介面卡中其個別相對末端間距離之一長度。或者是，所述連接接線包括將天線連接至金屬元件並將該等接線連接至該等金屬元件。或者是，所述裝設包括將該等接線摺到該晶片模組下方。
較佳地，該方法係自動化。
根據本發明之另一較佳具體實施例，提供了一種電子介面卡，其包括一基板、與該基板結合之一接線天線、裝設在該基板中所形成之一凹槽中的一晶片模組、以及提供該晶片模組與該接線天線之間電性連接的接線。
較佳地，該晶片模組包括一封裝之智慧卡晶片。或者是，該等接線係摺到該凹槽中該晶片模組下方。或者是，該等接線具有實質上大於該電子介面卡中其個別相對末端間距離之一長度。
根據本發明之另一較佳具體實施例，提供了一種用於根據一電子介面組裝件來製造一電子介面卡的系統，該電子介面組裝件包括具有至少一層之一基板、位於該至少一層中之至少兩金屬元件、以及與該基板結合之一接線天線並具有與該至少兩金屬元件電耦接之末端，該系統包括：一層壓器，其可運作以將該基板層與一頂層及一底層層壓在一起；一凹槽形成器，其可運作以在該頂層與該基板層中形成一凹槽；一第一接線貼附器，其可運作以將連接接線的末端貼附至該等金屬元件；一第二接線貼附器，其可運作以將該等連接接線的相對末端貼附至一晶片模組；以及一密封器，其可運作以將該晶片模組密封於該凹槽中。
較佳地，該第一接線貼附器係一雷射接合接線貼附器。或者是，該第二接線貼附器係一焊接接線貼附器。
根據本發明之另一較佳具體實施例，甚至還提供了一種電子介面組裝件，其包括具有至少一層之一基板、位於該至少一層中之至少兩金屬元件、以及與該基板結合且具有電耦接至該至少兩金屬元件之末端的一接線天線。
根據本發明之另一較佳具體實施例，提供了一種用於製造一電子介面組裝件的方法，其包括提供具有至少一基板層之一基板、將一天線與該至少一基板層結合、以及連接該天線的相對末段至與該基板結合之金屬元件。
較佳地，該方法也包括於一基板層中界定一對孔洞，使該天線的相對末端終止於該等孔洞，以及在連接之前先將該等金屬元件放置在各該等孔洞中。或者是，該方法也包括將該基板層與一頂層及一底層層壓在一起。此外，該方法也包括在該頂層與該基板層中形成一凹槽、將連接接線的末端貼附至該等金屬元件、將該等連接接線的相對末端貼附至一晶片模組、並將該晶片模組密封於該凹槽中。
較佳地，所述將連接接線之末端貼附至該等金屬元件係包括雷射接合。或者是，所述將該等連接接線的相對末端貼附至一晶片模組係包括焊接。
較佳地，該方法係自動化。
根據本發明之另一較佳具體實施例，提供了一種電子介面組裝件，其包括具有至少一層之一基板、位於該至少一層中之至少兩終端、與該基板結合且具有電耦接至該至少兩終端之末端的一接線天線、裝設在形成於該基板中之一凹槽的晶片模組、以及在該晶片模組與接線天線之間提供電性連接之接線；該等接線具有實質上大於該電子介面組裝件中其個別相對末端間距離之一長度。
較佳地，該晶片模組包括一封裝之智慧卡晶片。或者是，該等接線係摺到該凹槽中之該晶片模組下方。
參照圖1，其說明了根據本發明之一較佳具體實施例而構成且可運作以具有接觸式及/或非接觸式功能的電子介面卡100。如圖1所示，電子介面卡100較佳為包括一多層基板，其包含頂部與底部保護層102及104，其一般是由PVC(聚氯乙烯)所形成，各具有厚度0.05 mm。或者是，保護層102及104可由任何適當材料所形成，例如Teslin、PET－G(乙二醇改性－聚對苯二甲酸乙二醇酯)、PET－F(聚對苯二甲酸乙二醇酯膜)、聚碳酸酯或ABS。
較佳地，在朝保護層102與104內部佈置圖像底稿層106及108，其一般由PVC所形成，各具有厚度為0.15 mm，其具有經由各保護層102與104可見之圖像。或者是，圖像底稿層106與108可由任何適當材料所形成，例如Teslin、PET－G(乙二醇改性－聚對苯二甲酸乙二醇酯)、PET－F(聚對苯二甲酸乙二醇酯膜)、聚碳酸酯或ABS。或者是，可排除圖像底稿層106與108。
較佳地，在朝圖像底稿層106與108內部佈置一鑲嵌體110，其包括嵌入一第一鑲嵌層114之接線天線112，接線天線112的接線直徑較佳為0.1 mm，而第一鑲嵌層114一般是由PVC形成，較佳為具有厚度0.15 mm。鑲嵌體110也包括第二與第三鑲嵌層116及118，其同樣較佳為由PVC所形成，分別具有厚度為0.1 mm與0.15 mm。或者是，第一、第二與第三鑲嵌層114、116及118是由任何適當材料所形成，例如Teslin、PET－G(乙二醇改性－聚對苯二甲酸乙二醇酯)、PET－F(聚對苯二甲酸乙二醇酯膜)、聚碳酸酯或ABS。
晶片模組120係裝設於電子介面卡100中所形成之一凹槽122中，該晶片模組較佳為包括一封裝之智慧卡晶片124，其具有墊片126與一接觸陣列128，較佳為具有厚度0.06 mm。或者是，可排除接觸128，而智慧卡晶片124則提供非接觸式功能。
在晶片模組120與嵌入之天線112間的電性連接是由接線130所提供，較佳為具有厚度0.1 mm，其較佳為於其第一末端焊接至墊片126，並於其相對末端雷射接合至金屬元件132，其中金屬元件132係分別接合至接線天線112的個別末端。本發明之一特定特徵在於墊片126與個別金屬元件132之間的接線130之長度在實質上比組裝卡中墊片126及金屬元件132之間的距離長。此特徵提供了增大的可靠度。
佈置在接觸陣列128下側周圍之熱熔化黏接層134藉由接合圖像底稿層106之一對應凹陷周圍相對面表面136而使晶片模組120保持在凹槽122中。
現參照圖2，其係一簡化圖式，說明圖1之電子介面卡的製造方法的第一步驟；其中對鑲嵌層114鑿孔以界定一對孔洞150。如圖3A與3B所示，天線112係藉由習知的嵌入技術而與鑲嵌層114結合，其一般係利用美國紐約Islip之PCK技術公司商用超音波頭而進行。天線112的相對末端152係終止於孔洞150，如圖3A與3B所示。
或者是，天線112係藉由適當的印刷技術而形成於基板114上的印刷天線，或藉由適當的貼附方法貼附在基板114上的天線。
現參照圖4A與4B，可見黏接墊片154係嵌合在鑲嵌層114上孔洞150的對應邊緣156處。如圖5A與5B所示，金屬元件132係放置在孔洞l50中，並藉由黏接墊片154而保持其位置。較佳地，天線112的末端152係藉由熱壓接合或任何其他的適當技術而連接至金屬元件132，在此連接步驟之後，便不再需要以黏接墊片154來保持金屬元件132的位置，且可移除這些墊片154。或者是，也可不需移除黏接墊片154。
在此階段中，如圖6A與6B所示，在層114下側上提供層116及118，且層102、104、106與108都被層壓在一起，而產生如圖7A與7B所示之層狀結構。
現參照圖8A與8B，可見凹槽122係形成於層102、106與114以及金屬元件132中，層106的凹陷周圍相對面表面136係暴露，較佳為藉由研磨方式。或者是，可知凹槽也可形成在卡的相對表面上。如圖9A與9B所示，薄接線130係較佳為經由雷射接合方式貼附至金屬元件132上。該等接線130係經修整且較佳地是與層102垂直延伸而加以排列。
現參照圖10A與10B，可知接下來是將接線130貼附至晶片模組120的對應墊片126，並在陣列128下側周圍放置熱熔化黏接劑134，將晶片模組120插入凹槽122中，使陣列128的周圍與層106的凹陷周圍相對面表面136密封接合。插入的方法例如將接線130摺到晶片模組120的下方，如圖1所示。
較佳地，可知關於圖1至圖10B所示之上述方法皆可高度自動化。
可知此處說明之具體實施例包括基板層102、104、106、108、114、116與118，電子介面卡100的多層基板可包括任何適當數目的膜層及任何適當的厚度。
亦可知電子介面卡100的多層基板中任一層或所有層可由上述任何一種材料、或任何其他適當材料(例如複合材料)所形成。此外，電子介面卡100的多層基板的膜層不需由相同的材料所形成，各層可由不同材料或多種相異材料所形成。
熟悉本技術人士應明白，本發明不限於前文所特定顯示及說明的內容。更確切而言，本發明包括了上述各種特徵的組合與次要組合，且熟知本項技術者人士在配合圖式研讀前述說明之後可對其加以修飾與變化，其皆不屬先前技術內。
100．．．電子介面卡
102．．．保護層
104．．．保護層
106．．．圖像底稿層
108．．．圖像底稿層
110．．．鑲嵌體
112．．．接線天線
114．．．鑲嵌層
116．．．鑲嵌層
118．．．鑲嵌層
120．．．晶片模組
122．．．凹槽
124．．．智慧卡晶片
126．．．墊片
128．．．接觸陣列
130．．．接線
132．．．金屬元件
134．．．黏接層
136．．．凹陷周圍相對表面
150．．．孔洞
152．．．末端
154．．．黏接墊片
156．．．對應邊緣
從下列詳細說明並結合圖示即可更完整瞭解本發明，其中：圖1係一簡化之截面圖，其說明根據本發明之一較佳具體實施例而構成且可運作以具有接觸式與非接觸式功能的電子介面卡；圖2係一簡化圖式，說明圖1之電子介面卡的製造方法的第一步驟；圖3A與3B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的另一步驟；圖4A與4B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的次一步驟；圖5A與5B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的下一步驟；圖6A與6B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的一附加步驟圖7A與7B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的另一附加步驟；圖8A與8B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的次一附加步驟；圖9A與9B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的下一附加步驟；以及圖10A與10B係簡化之截面圖，分別說明圖1之電子介面卡的製造方法的最終步驟。
100．．．電子介面卡
102．．．保護層
112．．．接線天線
120．．．晶片模組
128．．．接觸陣列

Claims (26)

  1. 一種用於製造一電子介面卡的方法，其包括：於一基板層中界定一對孔洞；結合一天線與該基板層，使該天線的相對末端終止於該等孔洞；在各該等孔洞中放置一金屬元件；將該天線的該等末端連接至該等金屬元件；將該基板層與一頂層及一底層層壓在一起；於該頂層與該基板層中形成一凹槽；將連接接線的末端貼附至該等金屬元件；將該等連接接線的相對末端貼附至一晶片模組；以及將該晶片模組密封於該凹槽中。
  2. 如請求項1之方法，進一步包括：在該層壓之前於該基板層之下側上提供一第一附加基板層與一第二附加基板層。
  3. 如請求項1或2之方法，其中該頂層包括一第一頂部基板層與一第二頂部基板層。
  4. 如請求項3之方法，進一步包括暴露該第二頂部層鄰近該凹槽之一凹陷表面，且其中該密封包括：在該晶片模組的一下側上放置一黏接劑；以及將該晶片模組插入該凹槽中，使該下側與該凹陷表面接合。
  5. 如請求項1或2之方法，進一步包括將該等接線摺到該晶片模組下方。
  6. 如請求項1或2之方法，其中該方法係自動化的。
  7. 如請求項1或2之方法，其中該將連接接線的末端貼附至該等金屬元件包括雷射接合。
  8. 如請求項1或2之方法，其中該將該等連接接線的相對末端貼附至一晶片模組包括焊接。
  9. 如請求項1或2之方法，其中該等接線具有實質上大於該電子介面卡中其個別相對末端間距離之一長度。
  10. 一種用於製造一電子介面卡的方法，其包括：形成具有至少一層之一基板；於該至少一層中形成一天線；於該至少一層中形成一凹槽；連接一晶片模組與該天線之間的接線，其中該連接接線包括將該天線連接至金屬元件並將該等接線連接至該等金屬元件；以及將該晶片模組裝設於該凹槽中。
  11. 如請求項10之用於製造一電子介面卡的方法，其中該等接線具有實質上大於該電子介面卡中其個別相對末端間距離之一長度。
  12. 如請求項10或11之方法，其中該裝設包括將該等接線摺到該晶片模組下方。
  13. 如請求項10或11之方法，其中該方法係自動化的。
  14. 一種用於根據一電子介面組裝件來製造一電子介面卡的系統，該電子介面組裝件包括具有至少一層之一基板、位於該至少一層中之至少兩金屬元件、以及與該基板結 合之一接線天線，並具有與該至少兩金屬元件電耦接之末端，該系統包括：一層壓器，其運作以將該基板層與一頂層及一底層層壓在一起；一凹槽形成器，其運作以在該頂層與該基板層中形成一凹槽；一第一接線貼附器，其運作以將連接接線的末端貼附至該等金屬元件；一第二接線貼附器，其運作以將該等連接接線的相對末端貼附至一晶片模組；以及一密封器，其運作以將該晶片模組密封於該凹槽中。
  15. 如請求項14之用於製造一電子介面卡之系統，其中該第一接線貼附器係一雷射接合接線貼附器。
  16. 如請求項14或15之用於製造一電子介面卡之系統，其中該第二接線貼附器係一焊接接線貼附器。
  17. 一種用於製造一電子介面組裝件的方法，其包括：提供具有至少一基板層之一基板；結合由接線之一整體部分形成之一天線與該至少一基板層；以及將該天線的相對末端連接至與該基板結合的固體金屬元件。
  18. 如請求項17之用於製造一電子介面組裝件的方法，進一步包括：於一基板層中界定一對孔洞，使該天線的相對末端終 止於該等孔洞；以及在該連接之前，將該等金屬元件放置在各該等孔洞中。
  19. 如請求項17與18中任一項之用於製造一電子介面組裝件的方法，進一步包括將該基板層與一頂層及一底層層壓在一起。
  20. 如請求項19之用於製造一電子介面組裝件的方法，進一步包括：於該頂層與該基板層中形成一凹槽；將連接接線的末端貼附至該等金屬元件；將該等連接接線之相對末端貼附至一晶片模組；以及密封該晶片模組於該凹槽中。
  21. 如請求項20之方法，其中該將連接接線的末端貼附至該等金屬元件包括雷射接合。
  22. 如請求項20之方法，其中該將該等連接接線之相對末端貼附至一晶片模組包括焊接。
  23. 如請求項17或18之方法，其中該方法係自動化的。
  24. 一種電子介面組裝件，其包括：一基板，其具有至少一層；至少兩金屬元件，其位於該至少一層中；一接線天線，其與該基板結合且具有電耦接至該至少兩金屬元件之末端；一晶片模組，其裝設於形成於該基板中之一凹槽中；以及 連接接線，其提供該晶片模組與該接線天線之間的電性連接，其中該等連接接線之每一者係一單一整體部分且在貼附該等連接接線之該等末端至該等金屬元件及貼附該等連接接線之相對末端至該晶片模組之後具有足夠延伸至該凹槽外之長度。
  25. 如請求項24之電子介面組裝件，其中該晶片模組包括一封裝之智慧卡晶片。
  26. 如請求項24或25之電子介面組裝件，其中該等接線係摺到該凹槽中該晶片模組下方。
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