TWI436509B - Led模組 - Google Patents
Led模組 Download PDFInfo
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- TWI436509B TWI436509B TW100134804A TW100134804A TWI436509B TW I436509 B TWI436509 B TW I436509B TW 100134804 A TW100134804 A TW 100134804A TW 100134804 A TW100134804 A TW 100134804A TW I436509 B TWI436509 B TW I436509B
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- 229910000679 solder Inorganic materials 0.000 claims description 17
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- 230000017525 heat dissipation Effects 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 239000011810 insulating material Substances 0.000 claims description 2
- 238000005476 soldering Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 description 31
- 230000003014 reinforcing effect Effects 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 6
- 230000035515 penetration Effects 0.000 description 5
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 239000003973 paint Substances 0.000 description 2
- 239000000049 pigment Substances 0.000 description 2
- 230000000191 radiation effect Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229920002379 silicone rubber Polymers 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/732—Location after the connecting process
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H01L2924/11—Device type
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- H01L2924/1203—Rectifying Diode
- H01L2924/12035—Zener diode
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- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- Engineering & Computer Science (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
本發明是有關於一種發光二極體(Light Emitting Diode,LED)模組(module),該LED模組於封裝(package)內搭載有LED晶片(chip)。
先前,已提供了一種光源裝置,該光源裝置使用放電燈(lamp)或雷射(laser)振盪器等作為光源,但近年來,以低耗電化或長壽命化等為目的,已提出各種以LED(發光二極體(diode))模組為光源的光源裝置。例如,使用將發光波長設定至紫外線區域的LED模組作為紫外線照射裝置的紫外線照射源,上述紫外線照射裝置將紫外線照射至塗料、黏著劑或顏料等的紫外線硬化樹脂,從而使樹脂硬化、乾燥。
對於此種光源裝置中所使用的LED模組而言,將LED晶片搭載於封裝內,為了使該封裝獲得所需的光量,排列多個LED晶片而構成LED模組。又,使用輸出大的LED晶片作為各LED晶片,且以獲得所需的光量的方式進行設定。
對上述LED模組通電,使LED晶片發光之後,LED晶片會發熱。如上所述,於此種LED模組中,使用有多個輸出大的LED晶片,LED模組所產生的熱亦大。又,LED晶片的發光效率具有負的溫度係數,因此,存在如下的問題,即,若LED晶片的發熱量增大,則LED模組的發光效率會下降。
因此,如例如專利文獻1所揭示的發光二極體的安裝構造般,已提出有使散熱效果提高的LED模組以及該LED模組的安裝構造。對於該專利文獻1所揭示的發光二極體的安裝構造而言,將絕緣層、配線圖案(pattern)、以及抗蝕劑(resist)分別積層於熱導率高的金屬製的基座(base)構件的上表面而形成基板,將配置有LED晶片的封裝安裝於上述基板的表面。此時,將位於封裝的背面側的基板的絕緣層或抗蝕劑予以除去,將矽橡膠(silicon rubber)等的導熱構件配置於封裝與基座構件之間。藉此,LED晶片所產生的熱經由導熱構件以及基座構件而被釋放,散熱效果提高。
[專利文獻1]日本專利特開2006-100687號公報
然而,為了製造上述專利文獻1所揭示的LED模組,首先,將絕緣層、配線圖案、以及抗蝕劑分別積層於基座構件上,然後,將安裝有封裝的部位的絕緣層、配線圖案、以及抗蝕劑分別予以除去。將導熱構件配置於已將絕緣層、配線圖案、以及抗蝕劑予以除去的部位,自該部位的上方配置已配置有LED晶片的封裝,對設置於封裝的電極與配線圖案進行焊接。如此,製造上述專利文獻1所揭示的LED模組,但製造步驟多且複雜。
本發明是鑒於上述事由而成的發明,本發明提供如下的LED模組,該LED模組能夠確實地將來自LED晶片的熱予以釋放,並且能夠使製造步驟減少。
本發明的一個實施形態的LED模組包括:封裝,於相對向的側壁的外周面具有電極,且搭載有連接於電極的發光元件;包含銅系金屬的基座構件;絕緣層,包含絕緣材料且積層於基座構件的表面;以及導電性的配線圖案,形成於絕緣層的表面且藉由焊錫而連接於電極,絕緣層包括將配置有封裝的部位的一部分予以除去而成的貫通部,在隔著貫通部而相對向的封裝的背面與基座構件之間,配置有包含焊錫的散熱部。
對於上述LED模組而言,較佳為於封裝的背面設置金屬製的散熱層。
發明的效果
根據本發明的一個實施形態的LED模組,無需如下的步驟,該步驟是指在將絕緣層等予以除去而成的部位配置導熱構件,從而可確實地將來自發光元件的熱予以釋放,並且可使與製造相關的步驟減少。
以下,參照構成本說明書的一部分的隨附圖式,更詳細地對本發明的實施形態進行說明。於整個圖式中,對相同或類似的部分附上相同的參照符號且省略說明。
以下,基於圖式來對本發明的實施形態進行說明。
本實施形態的LED模組1是作為紫外線的照射源而使用於紫外線照射裝置,該紫外線照射裝置將紫外線照射至例如塗料、黏著劑或顏料等的紫外線硬化樹脂,使樹脂硬化、乾燥。再者,於以下的說明中,只要無特別說明,則將圖2(a)中的上下作為LED模組1的前後,將圖2(a)中的左右作為LED模組1的左右,將圖1中的上下作為LED模組1的上下來進行說明。
如圖1以及圖2(a)所示,於基板10的上表面,沿著左右方向排列多個封裝2,從而構成上述LED模組1,基板10形成為以左右方向為長度方向的矩形平板狀。於上述紫外線照射裝置中,沿著左右方向排列多個上述LED模組1,然後沿著前後方向排列且配置多行上述LED模組1,藉此,以可獲得所需的光量的方式而設定於規定的區域。
如圖3(a)~圖3(b)所示,封裝2是將LED晶片3、與過電壓保護用的曾納二極體晶片(zener diode chip)6收納於凹部21內而構成,上述過電壓保護用的曾納二極體晶片6對施加於上述LED晶片3的電壓進行限制,上述凹部21設置於封裝本體20的表面。
封裝本體20包含射出成形品,該射出成形品例如是藉由氧化鋁、氮化鋁等的高散熱性陶瓷(ceramic)材料,形成為以前後方向為長度方向的大致長方體狀。於上述封裝本體20的表面,例如使用MID(三維射出成形電路零件)技術來將導電圖案26、27或電極墊(pad)4a、4b予以圖案化。
又,於封裝本體20的表面(圖3(d)的上表面)設置有凹部21,該凹部21的自上側觀察所見的形狀是形成為以前後方向為長邊方向的長孔狀。於上述凹部21的底部,在封裝本體20的左右方向以及前後方向的中央位置配置有LED晶片3。又,於凹部21的底部,相對於LED晶片3而在前後方向的一端側(例如前側)配置有曾納二極體晶片6,在前後方向的另一端側(後側)設置有後述的通孔(through hole)22。
此處,於凹部21的底部設置有肋部(rib)23a、23b,該肋部23a、23b自LED晶片3與曾納二極體晶片6之間的部位、以及LED晶片3與通孔22之間的部位,分別朝凹部21的開口側(上側)突出。亦即,於封裝本體20的凹部21內部,LED晶片3、曾納二極體晶片6、以及通孔22在因肋部23a、23b而分離的狀態下,沿著前後方向排列地設置。再者,肋部23a、23b的上表面位於比安裝於凹部21a的LED晶片3的上表面更靠上側處。
又,於封裝本體20的表面,遍及凹部21的周緣的整個圓周而形成有框狀的導電圖案26。該導電圖案26是與形成於凹部21a、21c的晶片座(die pad)部50、52相連續地設置,且與LED晶片3及曾納二極體晶片6的下表面側的電極(未圖示)形成電性連接。又,於封裝本體20的長度方向的一側的端面(例如前方側的端面)形成有電極墊4b,該電極墊4b自導電圖案26朝封裝本體20的背面延長。
又,於封裝本體20的背面(圖2(d)中的下表面),自封裝本體20的後端直至越過通孔22的附近為止,設置有凹處24。於封裝本體20的背面,在凹處24與其他部位之間設置有階差,凹處24的底面位於比除了凹處24之外的封裝本體20的背面更靠上側處。對在上述凹處24形成開口的通孔22的內周面實施鍍敷加工,該通孔22與電極墊4a形成電性連接,該電極墊4a形成於與形成有電極墊4b的一側相反的端面(例如後方側的端面)。
又,於封裝本體20的大致整個凹部21b中形成有導電圖案27,該導電圖案27電性連接於通孔22。形成於肋部23a、23b的接合墊(bonding pad)28a、28b連續地設置於上述導電圖案27。接合墊28a經由接合線(bonding wire)(金屬細線)25a、25b而分別連接於LED晶片3的上表面側的電極(例如陰極(cathode)電極)、與曾納二極體晶片6的上表面側的電極。同樣地,接合墊28b、LED晶片3的上表面側的電極經由接合線(金屬細線)25c而被連接。
又,於封裝本體20的背面,在左右方向的中央部設置有接合用墊5,該接合用墊5被鍍敷加工為矩形板狀。
如上所述,封裝2將設置於封裝本體20的前後的側壁的電極墊4a、4b、與LED晶片3及曾納二極體晶片6予以電性連接。藉此,藉由將電力供給至電極墊4a、4b之間,LED晶片3會發光而照射出紫外線。
將絕緣層12、配線圖案13、以及抗蝕劑層14積層於包含導熱性高的銅系金屬的基座構件11的上方側的表面,從而構成基板10。又,於基板10的四個角落設置有螺釘孔10a,該螺釘孔10a用以將基板10安裝於紫外線照射裝置。
而且,於基板10的表面的前後方向的兩緣,電流加強條(bar)18、18安裝於基板10的上表面側,該電流加強條18、18是形成為以左右方向為長度方向的矩形板狀,且包含銅等的導電性高的金屬。電流加強條18、18藉由後述的回焊(reflow)處理而與封裝2一併安裝於基板10。上述電流加強條18電性連接於基板10的配線圖案13,將自紫外線照射裝置供給的電力經由配線圖案13而供給至各封裝2。此處,自紫外線照射裝置供給有電流值大的電力,但藉由將上述電流加強條18安裝於基板10,可使相對於所供給的電流的電阻值減小,從而能夠以少損失來將電流值大的電力供給至各封裝2。
基板10的絕緣層12是使具有耐熱性及絕緣性的聚醯亞胺成形為薄膜狀(例如約14 μm左右的厚度)而成的層,藉由黏著劑等來將基座構件11的整個表面予以覆蓋,將上述絕緣層12形成於基座構件11的表面。
又,基板10的配線圖案13包含使導電性能高的金屬形成為薄膜狀(例如約18 μm左右的厚度)而成的銅箔等。如圖2(b)的斜線部所示,上述配線圖案13設置於絕緣層12的上表面中的除了前後方向的中央部及螺釘孔10a的周圍之外的部位。又,藉由焊錫17來將配線圖案13、與配置於基板10的上表面側的封裝2的電極墊4a、4b予以連接(參照圖1)。
又,基板10的抗蝕劑層14是抑制焊錫的附著的阻焊劑(solder resist),如圖2(c)的斜線部所示,該抗蝕劑層14形成於基板10的前後方向的中央部以及周緣部的必需部位。又,於抗蝕劑層14中,沿著封裝2的排列方向即左右方向,以與對封裝2進行配置的間隔相對應的規定的間隔,形成有朝前後方向的中央側凹陷的槽部14a、14b。此處,當對封裝2進行配置時,基於設置於封裝2的電極墊4a、4b的配置位置或大小,對各槽部14a、14b的寬度進行設定。於本實施形態中,配置有電極墊4b的一側的槽部14a在封裝2的左右方向的中央位置,被設定為比槽部14b更狹窄的寬度。又,配置有電極墊4a的一側的槽部14b被設定為與封裝2的左右方向的尺寸大致相等的尺寸。藉此,防止焊錫附著於相鄰的封裝2的電極墊4a、4b彼此之間。
又,對於基板10的絕緣層12以及抗蝕劑層14的各層而言,如圖2(d)所示,除了配置有封裝2的部位(基板10的前後方向的大致中央)之外,形成有貫通部15。該貫通部15被設定為如下的形狀,即,至少前後方向的大小比封裝2的外周更小(參照圖1)。
又,於基板10的貫通部15的中央部設置有焊錫(散熱部)16,將配置於封裝2的背面的接合用墊(散熱層)5與基座構件11予以熱連接,上述焊錫(散熱部)16用以將封裝2所產生熱予以釋放(參照圖1)。
此處,對本實例的LED封裝1的製造方法進行說明。首先,於包含銅系金屬的基座構件11的整個上表面形成絕緣層12,將絕緣層12予以貫通而設置貫通部15。接著,於上述絕緣層12的上表面形成配線圖案13,以將絕緣層12以及配線圖案13予以覆蓋的方式形成抗蝕劑層14。接著,於配線圖案13表面的基板10的前後方向的中央側的緣部、配線圖案13表面的與電流加強條18抵接的部位、以及基座構件11表面的貫通部15的大致中央部的各部位,藉由網版(screen)印刷等而形成膏狀焊錫(cream solder)。然後,將電流加強條18、18以及多個封裝2配置於基板10,藉由回焊處理來使上述膏狀焊錫熔融。藉此,封裝2安裝於基板10,封裝2的電極墊4a、4b與基板10的配線圖案13形成電性連接,封裝2的接合用墊5與基板10的基座構件11形成熱連接。同時,電流加強條18、18安裝於基板10,電流加強條18、18與配線圖案13形成電性連接。
如此,封裝2的LED晶片3所產生的熱經由焊錫16以及基座構件11而被釋放,從而可確實地將來自LED晶片3的熱予以釋放。又,當使封裝2的電極墊4a、4b與配線圖案13形成電性連接時,可同時形成使接合用墊5與基座構件11熱耦合的焊錫16,因此,無需對導熱構件進行配置的步驟,從而可使製造步驟減少。
又,於封裝2的背面設置有接合用墊5,因此,可更確實地將封裝2的LED晶片3所產生的熱予以釋放。
又,於抗蝕劑層14中設置有槽部14a、14b,該槽部14a、14b的寬度已配合封裝2的電極墊4b、4a的配置位置而被設定,可防止焊錫附著於相鄰的封裝2的電極墊4a、4b之間。
以上,對本發明的較佳實施形態進行了說明,但本發明並不限定於上述特定實施形態,可於後續的申請專利範圍的範疇內進行各種變更以及修正,各種變更以及修正亦屬於本發明的範疇。
1...LED模組/LED封裝
2...封裝
3...LED晶片
4a、4b‧‧‧電極墊
5‧‧‧接合用墊/散熱層
6‧‧‧曾納二極體晶片
10‧‧‧基板
10a‧‧‧螺釘孔
11‧‧‧基座構件
12‧‧‧絕緣層
13‧‧‧配線圖案
14‧‧‧抗蝕劑層
14a、14b‧‧‧槽部
15‧‧‧貫通部
16‧‧‧焊錫/散熱部
17‧‧‧焊錫
18‧‧‧電流加強條
20‧‧‧封裝本體
21、21a、21b、21c‧‧‧凹部
22‧‧‧通孔
23a、23b‧‧‧肋部
24‧‧‧凹處
25a、25b、25c‧‧‧接合線/金屬細線
26、27‧‧‧導電圖案
28a、28b‧‧‧接合墊
50、52‧‧‧晶片座部
藉由如下所述的隨附圖式與較佳實例的說明,使本發明的目的以及特徵變得明確。
圖1是表示本實施形態的LED模組的要部的概略剖面圖。
圖2(a)~圖2(d)表示構成本發明的一個實施形態的LED模組的基板,圖2(a)是用以對整個基板進行說明的平面圖,圖2(b)是用以對配線圖案進行說明的平面圖,圖2(c)是用以對抗蝕劑層進行說明的平面圖,圖2(d)是用以對貫通孔進行說明的平面圖。
圖3(a)~圖3(d)表示構成本發明的一個實施形態的LED模組的封裝,圖3(a)是平面圖,圖3(b)是俯視圖,圖3(c)是側面圖,圖3(d)是圖3(a)的3D-3D剖面圖。
1...LED模組/LED封裝
2...封裝
3...LED晶片
4a、4b...電極墊
5...接合用墊/散熱層
6...曾納二極體晶片
10...基板
11...基座構件
12...絕緣層
13...配線圖案
14...抗蝕劑層
15...貫通部
16...焊錫/散熱部
17...焊錫
20...封裝本體
21a、21b、21c...凹部
22...通孔
23a、23b...肋部
24...凹處
25a、25b、25c...接合線/金屬細線
Claims (2)
- 一種LED模組,其特徵在於包括:封裝,於相對向的側壁的外周面具有電極,且搭載有連接於上述電極的發光元件;包含銅系金屬的基座構件;絕緣層,包含絕緣材料且積層於上述基座構件的表面;以及導電性的配線圖案,形成於上述絕緣層的表面且藉由焊錫而連接於上述電極,上述絕緣層包括將配置有上述封裝的部位的一部分予以除去而成的貫通部,在隔著上述貫通部而相對向的上述封裝的背面與上述基座構件之間,配置有包含焊錫的散熱部,且上述封裝具備電性連接上述電極的內周面經鍍敷加工的通孔。
- 如申請專利範圍第1項所述之LED模組,其中於上述封裝的背面設置有金屬製的散熱層。
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