TWI415255B - 形成具有中間層之半導體器件之方法及其結構 - Google Patents

形成具有中間層之半導體器件之方法及其結構 Download PDF

Info

Publication number
TWI415255B
TWI415255B TW096111431A TW96111431A TWI415255B TW I415255 B TWI415255 B TW I415255B TW 096111431 A TW096111431 A TW 096111431A TW 96111431 A TW96111431 A TW 96111431A TW I415255 B TWI415255 B TW I415255B
Authority
TW
Taiwan
Prior art keywords
layer
forming
stack
metal
substrate
Prior art date
Application number
TW096111431A
Other languages
English (en)
Chinese (zh)
Other versions
TW200746413A (en
Inventor
James K Schaeffer
Rama I Hegde
Srikanth B Samavedam
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200746413A publication Critical patent/TW200746413A/zh
Application granted granted Critical
Publication of TWI415255B publication Critical patent/TWI415255B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/014Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0177Manufacturing their gate conductors the gate conductors having different materials or different implants

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
TW096111431A 2006-05-26 2007-03-30 形成具有中間層之半導體器件之方法及其結構 TWI415255B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/420,525 US7445976B2 (en) 2006-05-26 2006-05-26 Method of forming a semiconductor device having an interlayer and structure therefor

Publications (2)

Publication Number Publication Date
TW200746413A TW200746413A (en) 2007-12-16
TWI415255B true TWI415255B (zh) 2013-11-11

Family

ID=38748748

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096111431A TWI415255B (zh) 2006-05-26 2007-03-30 形成具有中間層之半導體器件之方法及其結構

Country Status (5)

Country Link
US (1) US7445976B2 (enExample)
JP (1) JP5254220B2 (enExample)
CN (1) CN101569005B (enExample)
TW (1) TWI415255B (enExample)
WO (1) WO2007140037A2 (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7445976B2 (en) * 2006-05-26 2008-11-04 Freescale Semiconductor, Inc. Method of forming a semiconductor device having an interlayer and structure therefor
JP4271230B2 (ja) * 2006-12-06 2009-06-03 株式会社東芝 半導体装置
KR100954107B1 (ko) * 2006-12-27 2010-04-23 주식회사 하이닉스반도체 반도체 소자의 제조방법
US7612422B2 (en) * 2006-12-29 2009-11-03 Texas Instruments Incorporated Structure for dual work function metal gate electrodes by control of interface dipoles
US7812414B2 (en) * 2007-01-23 2010-10-12 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid process for forming metal gates
US7842977B2 (en) * 2007-02-15 2010-11-30 Qimonda Ag Gate electrode structure, MOS field effect transistors and methods of manufacturing the same
US7435652B1 (en) * 2007-03-30 2008-10-14 International Business Machines Corporation Integration schemes for fabricating polysilicon gate MOSFET and high-K dielectric metal gate MOSFET
US8734440B2 (en) * 2007-07-03 2014-05-27 St. Jude Medical, Atrial Fibrillation Division, Inc. Magnetically guided catheter
US20090008725A1 (en) * 2007-07-03 2009-01-08 International Business Machines Corporation Method for deposition of an ultra-thin electropositive metal-containing cap layer
US7625791B2 (en) * 2007-10-29 2009-12-01 Taiwan Semiconductor Manufacturing Co., Ltd. High-k dielectric metal gate device structure and method for forming the same
US20090152636A1 (en) * 2007-12-12 2009-06-18 International Business Machines Corporation High-k/metal gate stack using capping layer methods, ic and related transistors
US8030709B2 (en) * 2007-12-12 2011-10-04 International Business Machines Corporation Metal gate stack and semiconductor gate stack for CMOS devices
US8536660B2 (en) * 2008-03-12 2013-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid process for forming metal gates of MOS devices
EP2112687B1 (en) * 2008-04-22 2012-09-19 Imec Method for fabricating a dual workfunction semiconductor device and the device made thereof
US20090267130A1 (en) * 2008-04-28 2009-10-29 International Business Machines Corporation Structure and process integration for flash storage element and dual conductor complementary mosfets
US7821081B2 (en) * 2008-06-05 2010-10-26 International Business Machines Corporation Method and apparatus for flatband voltage tuning of high-k field effect transistors
US20110042759A1 (en) 2009-08-21 2011-02-24 International Business Machines Corporation Switching device having a molybdenum oxynitride metal gate
US8399344B2 (en) * 2009-10-07 2013-03-19 Asm International N.V. Method for adjusting the threshold voltage of a gate stack of a PMOS device
US8304842B2 (en) * 2010-07-14 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnection structure for N/P metal gates
US20120018813A1 (en) * 2010-07-22 2012-01-26 International Business Machines Corporation BARRIER COAT FOR ELIMINATION OF RESIST RESIDUES ON HIGH k/METAL GATE STACKS
US8691638B2 (en) * 2010-12-10 2014-04-08 Globalfoundries Singapore Pte. Ltd. High-K metal gate device
US9006092B2 (en) * 2011-11-03 2015-04-14 United Microelectronics Corp. Semiconductor structure having fluoride metal layer and process thereof
US9394609B2 (en) 2014-02-13 2016-07-19 Asm Ip Holding B.V. Atomic layer deposition of aluminum fluoride thin films
TWI625792B (zh) * 2014-06-09 2018-06-01 聯華電子股份有限公司 半導體元件及其製作方法
US9837487B2 (en) * 2015-11-30 2017-12-05 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device structure with gate stack
US9666574B1 (en) * 2015-11-30 2017-05-30 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device structure and manufacturing method thereof
US10686050B2 (en) 2018-09-26 2020-06-16 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5352917A (en) * 1990-07-04 1994-10-04 Tadahiro Ohmi Electronic device provided with metal fluoride film
US6933569B2 (en) * 2002-12-06 2005-08-23 Nec Corporation Soi mosfet
US20050233562A1 (en) * 2004-04-19 2005-10-20 Adetutu Olubunmi O Method for forming a gate electrode having a metal
US20050282326A1 (en) * 2003-03-27 2005-12-22 Gilmer David C Method for fabricating dual-metal gate device

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US675097A (en) * 1901-01-03 1901-05-28 Mortimer G Lewis Bench-vise.
CA2017284C (en) 1989-07-04 1995-10-03 Kazutomi Suzuki Optical recording medium
JP2746289B2 (ja) 1989-09-09 1998-05-06 忠弘 大見 素子の作製方法並びに半導体素子およびその作製方法
JP3689524B2 (ja) 1996-03-22 2005-08-31 キヤノン株式会社 酸化アルミニウム膜及びその形成方法
EP0860513A3 (en) 1997-02-19 2000-01-12 Canon Kabushiki Kaisha Thin film forming apparatus and process for forming thin film using same
TW396510B (en) 1998-06-03 2000-07-01 United Microelectronics Corp Shallow trench isolation formed by chemical mechanical polishing
JP2001257344A (ja) * 2000-03-10 2001-09-21 Toshiba Corp 半導体装置及び半導体装置の製造方法
EP1134303B1 (en) 2000-03-13 2010-06-09 Canon Kabushiki Kaisha Thin film production process
US6808806B2 (en) 2001-05-07 2004-10-26 Flex Products, Inc. Methods for producing imaged coated articles by using magnetic pigments
JP5118276B2 (ja) * 2001-09-05 2013-01-16 Jx日鉱日石金属株式会社 半導体装置用ゲート絶縁膜形成用スパッタリングターゲット、同製造方法及び半導体装置用ゲート絶縁膜
JP2003273350A (ja) * 2002-03-15 2003-09-26 Nec Corp 半導体装置及びその製造方法
US7087480B1 (en) * 2002-04-18 2006-08-08 Taiwan Semiconductor Manufacturing Company, Ltd. Process to make high-k transistor dielectrics
JP4524995B2 (ja) * 2003-03-25 2010-08-18 ルネサスエレクトロニクス株式会社 半導体装置
US6890807B2 (en) * 2003-05-06 2005-05-10 Intel Corporation Method for making a semiconductor device having a metal gate electrode
US7030430B2 (en) * 2003-08-15 2006-04-18 Intel Corporation Transition metal alloys for use as a gate electrode and devices incorporating these alloys
KR100741983B1 (ko) * 2004-07-05 2007-07-23 삼성전자주식회사 고유전율의 게이트 절연막을 갖는 반도체 장치 및 그 제조방법
US7514310B2 (en) * 2004-12-01 2009-04-07 Samsung Electronics Co., Ltd. Dual work function metal gate structure and related method of manufacture
US7745887B2 (en) * 2005-02-22 2010-06-29 Samsung Electronics Co., Ltd. Dual work function metal gate structure and related method of manufacture
US7332433B2 (en) * 2005-09-22 2008-02-19 Sematech Inc. Methods of modulating the work functions of film layers
US7445976B2 (en) * 2006-05-26 2008-11-04 Freescale Semiconductor, Inc. Method of forming a semiconductor device having an interlayer and structure therefor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5352917A (en) * 1990-07-04 1994-10-04 Tadahiro Ohmi Electronic device provided with metal fluoride film
US6933569B2 (en) * 2002-12-06 2005-08-23 Nec Corporation Soi mosfet
US20050282326A1 (en) * 2003-03-27 2005-12-22 Gilmer David C Method for fabricating dual-metal gate device
US20050233562A1 (en) * 2004-04-19 2005-10-20 Adetutu Olubunmi O Method for forming a gate electrode having a metal

Also Published As

Publication number Publication date
WO2007140037A2 (en) 2007-12-06
US20070272975A1 (en) 2007-11-29
US7445976B2 (en) 2008-11-04
JP2009538542A (ja) 2009-11-05
JP5254220B2 (ja) 2013-08-07
CN101569005B (zh) 2012-07-04
TW200746413A (en) 2007-12-16
CN101569005A (zh) 2009-10-28
WO2007140037A3 (en) 2008-12-24

Similar Documents

Publication Publication Date Title
TWI415255B (zh) 形成具有中間層之半導體器件之方法及其結構
JP5154222B2 (ja) 置換金属ゲート形成のための半導体構造の平坦化
KR102402943B1 (ko) 산화물 반도체를 포함하는 박막 트랜지스터를 포함하는 반도체 구조물을 형성하는 방법
US7084024B2 (en) Gate electrode forming methods using conductive hard mask
TWI443777B (zh) 形成mos元件的金屬閘的混合方法
TWI416667B (zh) 半導體元件及其製造方法
EP3200222A1 (en) Integrating n-type and p-type metal gate transistors field
KR101770476B1 (ko) 반도체 컴포넌트와 FinFET 디바이스의 제조 방법
TWI653762B (zh) 具有金屬閘極之半導體元件之製作方法
US8765588B2 (en) Semiconductor process
JP2007208260A (ja) 二重仕事関数金属ゲートスタックを備えるcmos半導体装置
KR20130069289A (ko) 복수의 임계 전압을 가진 finfet들
TWI663656B (zh) 具有金屬閘極之半導體元件及其製作方法
JP5090173B2 (ja) 高誘電率ゲート誘電体層及びシリサイドゲート電極を有する半導体デバイスの製造方法
TWI671805B (zh) 半導體元件及其製作方法
US7820555B2 (en) Method of patterning multilayer metal gate structures for CMOS devices
US20070059874A1 (en) Dual Metal Gate and Method of Manufacture
JPWO2004017418A1 (ja) 半導体集積回路装置およびその製造方法
US7767512B2 (en) Methods of manufacturing a semiconductor device including CMOS transistor having different PMOS and NMOS gate electrode structures
TWI625792B (zh) 半導體元件及其製作方法
CN104299994B (zh) 晶体管及晶体管的形成方法
TWI518795B (zh) 具有金屬閘極之半導體元件之製造方法
TWI518753B (zh) 金屬閘極之製作方法
KR20080077769A (ko) 비휘발성 메모리 소자의 제조방법
CN119300450A (zh) 半导体器件及其制作方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees