TWI390683B - 半導體封裝及其製造方法 - Google Patents

半導體封裝及其製造方法 Download PDF

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Publication number
TWI390683B
TWI390683B TW095130785A TW95130785A TWI390683B TW I390683 B TWI390683 B TW I390683B TW 095130785 A TW095130785 A TW 095130785A TW 95130785 A TW95130785 A TW 95130785A TW I390683 B TWI390683 B TW I390683B
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Taiwan
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sealing resin
semiconductor package
semiconductor wafer
electrode
wiring
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TW095130785A
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English (en)
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TW200717739A (en
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Kobayashi Tsuyoshi
Koyama Tetsuya
Yamano Takaharu
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Shinko Electric Ind Co
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Publication of TW200717739A publication Critical patent/TW200717739A/zh
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Publication of TWI390683B publication Critical patent/TWI390683B/zh

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Description

半導體封裝及其製造方法
本揭示內容係關於一種半導體封裝及其製造方法，及尤其係關於一種三維裝置之半導體封裝及其製造方法。
近年來在其中裝置半導體封裝的電子設備等等中亟需小型化及薄化。因此，已有人提出可藉由層合半導體封裝進行三維裝置以改良半導體封裝之裝置密度之被稱為所謂層疊封裝(package－on－package；POP)的封裝結構(例如，參見專利參考文獻1：日本專利未審查公告第2002－158312號)。
在此種半導體封裝中，先製造其中形成佈線的樹脂基板，再藉由線接合(wire bonding)或覆晶(flip chip)等等之方法將諸如半導體晶片之組件安裝於此樹脂基板上，其後再利用環氧模塑樹脂形成密封樹脂。
接著經由使密封樹脂照射雷射，而形成使樹脂基板上之佈線暴露的開口，且亦利用電鍍方法於開口中形成佈線。如此形成一端連接至樹脂基板之佈線及另一端暴露至樹脂基板之上表面的佈線。
藉由如此形成延伸通過密封樹脂之佈線，可將另一半導體封裝裝置於樹脂基板之上表面上。在相關技藝中，可藉由使用此一技術進行半導體封裝之三維裝置。
然而，在相關技藝的半導體封裝中，需要樹脂基板，因此會有半導體封裝變得較高(較厚)的問題。尤其當層合具有此樹脂基板之半導體封裝以進行三維裝置時，於層合後的整體高度變高，且很難降低其中裝設此半導體封裝之電子設備等等的高度。
此外，在相關技藝的半導體封裝中，利用雷射於密封樹脂中形成開口，以形成延伸通過密封樹脂之佈線，以致會有開口之形成準確度低的問題。結果，會有，例如，於此開口中形成之佈線之準確度亦降低，且在三維裝置時於上方及下方半導體封裝中發生不良連接的問題。
本發明之具體例提供一種可達成薄化且亦可改良經由延伸通過密封樹脂而形成之佈線之準確度的半導體封裝，以及此半導體封裝的製造方法。
為解決前述問題，本發明之特徵在於採取各以下之措施。
根據本發明之一或多個具體例之第一態樣，提供一種包括下列組件之半導體封裝：半導體晶片；用於密封半導體晶片之密封樹脂；及包括連接至半導體晶片且形成暴露至密封樹脂之第一表面之圖案佈線部分，及形成在密封樹脂之厚度方向中延伸之柱部分的佈線，此柱部分具有連接至圖案佈線部分之一端，及形成暴露至與密封樹脂之第一表面相對之第二表面的另一端。
根據本發明，免除對使用在相關技藝中所需之樹脂基板的需求，以致可達成成本降低及半導體封裝的薄化。此外，佈線的圖案佈線部分暴露至密封樹脂之第一表面，且佈線之柱部分的末端暴露至第二表面，以致可層合多個半導體封裝，而進行三維裝置。
此外，在第一態樣之半導體封裝中，本發明之一或多個具體例之第二態樣的特徵在於在圖案佈線部分上形成其上設置外部連接端子的第一電極及供測試用的第二電極。
根據本發明，將其上設置外部連接端子的第一電極以及供測試用的第二電極形成於圖案佈線部分上，因此可使用此第二電極進行半導體晶片之已知良品的測定。
此外，在第一或第二態樣的半導體封裝中，本發明之一或多個具體例之第三態樣的特徵在於柱部分具有圓柱形狀，且係利用電鍍方法形成。
根據本發明，柱部分具有截面直徑完全相同的圓柱形狀，因此可相較於圓錐形的電極等等改良電特性。
此外，根據本發明之一或多個具體例之第四態樣，提供一種將半導體晶片埋置於密封樹脂中之半導體封裝的製造方法，其特徵在於具有於支承基板上形成圖案佈線部分之第一步驟，使用光阻劑圖案利用電鍍方法於圖案佈線部分上形成柱部分之第二步驟，將半導體晶片設置於支承基板上以及使半導體晶片連接至圖案佈線部分之第三步驟，形成用於密封柱部分及半導體晶片之密封樹脂之第四步驟，及移除支承基板之第五步驟。
根據本發明，柱部分係使用光阻劑圖案利用電鍍方法所形成。因此，為形成柱部分而形成於光阻劑圖案中之圖案係利用微影(photolithography)技術形成，以致可以高準確度形成具高長寬比(aspect ratio)的圖案。因此，可藉由使用此光阻劑圖案電鍍及形成柱部分，而形成具高準確度的柱部分。
此外，在第四態樣之半導體封裝的製造方法中，本發明之一或多個具體例之第五態樣的特徵在於在第四步驟中，將液態樹脂使用作為密封樹脂之材料，及於將液態樹脂設置於支承基板上之後，使液態樹脂硬化而形成密封樹脂。
根據本發明，將液態樹脂使用作為密封樹脂之材料，藉此即使當將多個柱部分形成於圖案佈線部分上使其於厚度方向中延伸，亦可藉由密封樹脂確實地密封柱部分。
此外，在第四態樣之半導體封裝的製造方法中，本發明之一或多個具體例之第六態樣的特徵在於在第三步驟中，半導體晶片係藉由線接合連接至圖案佈線部分。
根據本發明，半導體晶片係藉由線接合連接至圖案佈線部分，藉此可以高可靠度進行連接。此外，將液態樹脂使用作為密封樹脂之材料，藉此即使當半導體晶片藉由線連接至圖案佈線部分時，亦可藉由在第四步驟中設置液態樹脂而防止線變形。
此外，在第四至第六態樣之半導體封裝的製造方法中，本發明之一或多個具體例之第七態樣的特徵在於在第一步驟中，圖案佈線部分係在將止擋層形成於支承基板上之後形成，及在第五步驟中，藉由止擋層終止支承基板之移除。
根據本發明，支承基板之移除藉由止擋層終止，以致可防止支承基板之移除程序對止擋層內側之層產生影響。此外，可使移除支承基板中之移除程序的管理容易，且可簡化半導體封裝的製造。
此外，在第七態樣之半導體封裝的製造方法中，本發明之一或多個具體例之第八態樣的特徵在於在第五步驟之後藉由將止擋層圖案化，而將其上設置外部連接端子的第一電極及供測試用的第二電極形成於圖案佈線部分上。
根據本發明，使用用於終止支承基板移除的止擋層形成第一及第二電極，以致可簡化製造步驟。
各種實行法可包括一或多個下述優點。舉例來說，免除對使用在相關技藝中所需之樹脂基板的需求，以致可達成成本降低及半導體封裝的薄化。此外，柱部分係使用光阻劑圖案利用電鍍方法形成，以致可以高準確度形成柱部分。
其他特徵及優點可由以下之詳細說明、附圖及申請專利範圍而明白。
接下來將連同圖式一起說明用於實施本發明之最佳方式。
圖1係概略顯示作為本發明之一具體例之半導體封裝100的剖面圖。圖1顯示經由層合兩半導體封裝100而進行三維裝置的狀態。此半導體封裝100大致係由佈線105、密封樹脂106、半導體晶片110及抗焊劑117、119等等所構成。
佈線105係經構造成整體形成柱部分105a及圖案佈線105b。在圖式中，說明兩佈線105，且對應於形成於半導體晶片110上之電極墊等等形成多個佈線105。此佈線105係由具良好傳導性的Cu(銅)所形成。
柱部分105a係經形成為在密封樹脂106的厚度方向(圖式中之上下方向)中延伸。此外，柱部分105a具有圓柱形狀，且係如下所述由電鍍方法所形成。電極118係經由連續層合Ni層118b及Au層118a而形成於此柱部分105a的上端之上。
此電極118係經構造為自密封樹脂106之上表面106a(對應於申請專利範圍中所說明的第二表面)暴露，且透過形成於設置在密封樹脂106之上表面上之抗焊劑117中之開口117A暴露至外部。另一方面，柱部分105a的下端係經構造成連接至圖案佈線105b。此外，在以下的說明中將圖式中由箭頭X1所示的方向定為向上方向，及將圖式中由箭頭X2所示的方向定為向下方向。
另一方面，圖案佈線105b係經形成為在密封樹脂106的表面方向(相對於紙面的上下方向及在圖式中的左右方向)中以預定圖案延伸。此圖案佈線105b的下表面係自密封樹脂106的下表面106b(對應於申請專利範圍中所說明的第一表面)暴露。
同樣地將其中連續層合Ni層102b及Au層102a之電極102及其中連續層合Ni層112b及Au層112a之測試墊112形成於自圖案佈線105b之下表面106b暴露的表面上。此電極102及測試墊112係如下所述整體形成。
電極102係透過形成於設置在密封樹脂106之下表面106b上的抗焊劑119中之開口119A暴露至外部。此外，測試墊112係透過形成於抗焊劑119中之開口119B暴露至外部。本具體例係經構造成將由焊料球所製成之外部連接端子120設置於電極102上。
此外，將接合墊108形成於圖案佈線105b之柱部分105a之形成位置內側的上表面位置中。此接合墊108係經構造成將Ni層108b及Au層108a層合於圖案佈線105b之上表面上。
半導體晶片110係經構造成埋置於密封樹脂106中。在此具體例中，半導體晶片110係經形成為面向上，且藉由線接合方法將線111設置於形成在半導體晶片110之上表面上之電極墊(未示於圖中)與形成於佈線105上之接合墊108之間。如此，半導體晶片110係經構造成透過線111電連接至佈線105(柱部分105a、圖案佈線105b)。
此外，將晶粒附著膜層110A設置於半導體晶片110之下部上，且此晶粒附著膜層110A之下表面係經構造成面對抗焊劑119。此外，此具體例係經構造成利用線接合方法將半導體晶片110連接至佈線105，但半導體晶片110亦可利用覆晶接合連接至佈線105。在此情況，可免除對晶粒附著膜層110A的需求。
密封樹脂106係其中之液態樹脂如下所述而硬化的物質。關於此密封樹脂106之材料，可使用，例如，環氧液態鑄封材料或液態模塑材料，且亦可使用液晶聚合物。
此密封樹脂106係經形成為覆蓋佈線105、半導體晶片110及線111。然而，構成佈線105之柱部分105a之上表面(其上形成電極118)、構成佈線105之圖案佈線105b之底表面及設置於半導體晶片 110之下部上之晶粒附著膜層110A之下表面係經構造成自密封樹脂106暴露。
如上所述將抗焊劑層117形成於密封樹脂106之上表面106a上，及將抗焊劑119形成於密封樹脂106之下表面106b上。此外，在此具體例中，將外部連接端子120形成於電極102上，但外部連接端子120可經構造為形成於電極118上。
在圖1所示的實例中，將一對半導體封裝100構造成藉由將位於上部之半導體封裝100之外部連接端子120結合至位於下部之半導體封裝100之電極118而進行三維裝置。在此情況，將由樹脂所製成之NCF 127(非傳導性膜)設置於位在上部的半導體封裝100與位在下部的半導體封裝100之間。
在結合一對上方及下方半導體封裝100的情況中，此NCF 127係預先設置於位在下部之半導體封裝100的抗焊劑117上，並在將位於上部之半導體封裝100之外部連接端子120結合至位於下部之半導體封裝100之電極118的情況中同時硬化。此外，此NCF 127的裝設並非絕對必要。
在如上述所構造的半導體封裝100中，不同於相關技藝的半導體封裝，並未使用樹脂基板，以致可達成成本降低及半導體封裝100的薄化。此外，將供測試用之測試墊112連同其上設置外部連接端子120之電極102一起形成於圖案佈線105b上，以致可使用此測試墊112進行經密封之半導體晶片110之可靠度(KGD：已知良品(Known Good Die))的測定。此外，在此具體例中，構成佈線105之柱部分105a具有截面直徑完全相同的圓柱形狀且係利用電鍍方法形成。如此，可相較於將通道揷塞形成於使用(例如)雷射所形成之圓錐形開口中之構造改良電特性。
接下來，將使用圖2至14說明構造如前所述之半導體封裝100的製造方法。
首先，在圖2所示之步驟中，製備由傳導性材料(例如，Cu)所製成之支承基板101。接著使用電解電鍍方法將止擋層121形成於此支承基板101上。
此止擋層121係經由使用電解電鍍方法使用支承基板101作為電極，連續層合厚度0.1至0.2微米之Au層121a及厚度0.1至3微米之Ni層121b而形成。在此情況，在以上之電解電鍍及後續步驟之電解電鍍中，支承基板101及止擋層121形成電流遞送路徑，因此支承基板101較佳係為傳導性材料，且為具低電阻之材料諸如Cu亦更佳。
在圖3所示之下一步驟中，將圖案佈線105b形成於其上經形成止擋層121的支承基板101上。具體言之，圖案佈線105b係經由利用微影方法形成光阻劑圖案(未示於圖中)及使用此光阻劑圖案作為遮罩利用電解電鍍沈澱Cu，然後再移除光阻劑圖案而形成。此外，在此具體例中，圖案佈線105b係形成於不包括其中裝設下述半導體晶片110之中心部分之中心部分的周圍。
然後在圖4所示之步驟中，將接合墊108形成於圖案佈線105b之內側位置(靠近中心之位置)中。此接合墊108係經由將光阻劑圖案形成於圖案佈線105b上，並使用電解電鍍方法使用此光阻劑圖案作為遮罩連續層合Ni層108b及Au層108a而形成。
然後在圖5所示之步驟中，將光阻劑圖案103形成於支承基板101上以覆蓋圖案佈線105b。在此光阻劑圖案103中，先使用旋塗器等等將光阻劑以預定厚度塗布至支承基板101，及利用微影方法將此光阻劑圖案化，藉此形成具有開口103A之光阻劑圖案103。
接著在圖6所示之步驟中，使用此光阻劑圖案103作為遮罩，利用電解電鍍沈澱Cu，及將柱部分105a沈澱於開口103A之內部。如此形成由柱部分105a及圖案佈線105b所製成的佈線105。
如此形成之柱部分105a係經構造成在圖式中之上下方向(製得半導體封裝100之厚度方向)中延伸。此外，柱部分105a之下端係經構造成整體連接至圖案佈線105b，及上端係經構造成自開口103A暴露至外部。
接著將電極118形成於自柱部分105a之開口103A暴露之端上。此電極118係經由使用電解電鍍方法連續層合Ni層118b及Au層118a而形成。當如上所述形成柱部分105a(佈線105)及電極118時，將光阻劑圖案103移除。圖7顯示光阻劑圖案103經移除的狀態。
接著在圖8所示之步驟中，進行將半導體晶片110裝設於止擋層121上之程序。具體言之，使用晶粒附著膜層110A將半導體晶片110面向上地固定至止擋層121。
隨後使用線接合裝置利用線111將形成於半導體晶片110上之電極墊連接至形成於佈線105上之接合墊108。如此其經構造成在半導體晶片110與佈線105之間產生電連接。在此具體例中，使用線接合方法於裝設半導體晶片110，因此半導體晶片110可廉價且高度可靠地連接至佈線105。
接著在圖9所示之步驟中，形成密封樹脂106。此具體例之特徵在於使用液態樹脂作為密封樹脂106之材料。關於液態樹脂，可使用環氧液態鑄封材料或液態模塑材料，且亦可使用液晶聚合物。此外，當使用液態鑄封材料或液態模塑材料作為液態樹脂時，於設置於支承基板101上之後進行硬化處理。
藉由如此使用液態樹脂作為密封樹脂106，即使當將多個柱部分105a形成於圖案佈線105b上使於厚度方向(圖式中之向上方向)中延伸時，亦可使液態樹脂於柱部分105a之間平順地移動。如此即使當存在多個柱部分105a時，亦不會於密封樹脂106內部形成氣隙，且佈線105及半導體晶片110等等可確實地密封。此外，藉由使用液態樹脂作為密封樹脂106之材料，即使當半導體晶片110經由線連接至圖案佈線部分105b時，線111亦不會於設置液態樹脂時變形，且可改良良率。
此外，可對密封樹脂106之上表面106a進行拋光處理，以於設置密封樹脂106之後使電極118確實地自密封樹脂106暴露。
接著在圖10所示之步驟中，進行經由蝕刻移除支承基板101的程序。在此情況，將可溶解支承基板101(Cu)但不溶解止擋層121的蝕刻溶液使用作為蝕刻溶液。如此，支承基板101之移除受到止擋層121終止，以致可防止蝕刻溶液對止擋層121內側之層(佈線105、密封樹脂106、半導體晶片110等等)產生影響。此外，可使移除支承基板101中之移除程序的管理容易，且可簡化半導體封裝100的製造。
此外，藉由移除支承基板101，形成不存在用於支承密封樹脂106之元件的構造，但在移除支承基板101時，使密封樹脂106硬化以確保預定的剛性。因此，即使當不存在支承基板101時，亦可進行在此之後的各步驟。
接著在圖11所示之步驟中，將光阻劑圖案125形成於密封樹脂106之上表面106a上，且亦將光阻劑圖案126形成於下表面106b上。光阻劑圖案125係形成於整個上表面106a上。另一方面，使用微影方法將形成於下表面106b上之光阻劑圖案126圖案化，藉此僅將其形成於測試墊112之形成位置及稍後連接外部連接端子120之電極102的形成位置中。
接著使用光阻劑圖案125、126作為遮罩進行止擋層121(Au層121a、Ni層121b)之蝕刻程序。如此使電極102及測試墊112留下，而將其餘部分的止擋層121移除。隨後將光阻劑圖案125、126移除。圖12顯示光阻劑圖案125、126經移除之狀態。
在如上所述之具體例中，在支承基板101之移除程序中，其係經構造成使用具有終止支承基板101移除之功能的止擋層121，且經由將此止擋層121圖案化而形成電極102及測試墊112。如此，相較於經由個別自止擋層121形成傳導性薄膜而形成電極102及測試墊112之方法，可簡化製造步驟。
此外，形成於柱部分105a之上端上的電極118(由Au層118a及Ni層118b所製成)受到光阻劑圖案125的保護。如此，在蝕刻止擋層121時，電極118未被移除。
接著在圖13所示之步驟中，將抗焊劑117形成於密封樹脂106之上表面106a上，且亦將抗焊劑119形成於密封樹脂106之下表面106b上。將上表面106a的實質上整個表面覆蓋抗焊劑117，但在相對於電極118的位置中形成開口117A。因此，電極118係經構造成透過開口117A暴露至外部。
此外，抗焊劑119係經形成為覆蓋密封樹脂106之下表面106b、圖案佈線105b之下表面及晶粒附著膜層110A。然而，在抗焊劑119之相對於電極102的位置中形成開口119A，及在相對於測試墊112的位置中形成開口119B。因此，電極102係經構造成透過開口119A暴露至外部，且測試墊112亦係經構造成透過開口119B暴露至外部。
接著在圖14所示之步驟中，可藉由結合焊料球及於電極102上形成外部連接端子120，而形成圖1所示的半導體封裝100。
在根據上述具體例的製造方法中，柱部分105a係如前所述使用光阻劑圖案103利用電鍍方法所形成。如此，使用微影技術形成為形成柱部分105a而形成於光阻劑圖案103中之開口103A，以致可以高準確度形成具高長徑比的圖案。
藉由如此使用光阻劑圖案103電鍍及形成柱部分105a，可以高準確度形成柱部分105a。因此，即使當如圖1所示層合多個半導體封裝100以進行三維裝置時，亦可確保外部連接端子120與電極118之間的連接。
此外，經由如上所述利用具高長徑比之開口103A形成柱部分105a，柱部分105a具有在厚度方向中完全均勻之截面的圓柱形狀，且可形成具良好電特性之佈線，且其亦可良好地處理高頻信號。
此外，在上述半導體封裝之製造方法中，已說明及為說明方便起見描述自一支承基板101製造一半導體封裝100之程序，但實際上製得所謂的多重封裝。換言之，將多個半導體封裝100形成於一支承基板101上，及在圖14所示之步驟後，將密封樹脂106或抗焊劑117、119揷入於預定位置中，及製得個別的半導體封裝100。
本發明已經由較佳具體例說明於上，但本發明並不限於上述的特定具體例，且可於申請專利範圍中所述的要旨內進行各種修改及變化。
具體言之，上述具體例係經構造為使用係為貴金屬之Au層112a連同Ni層112b作為止擋層121。然而，使用貴金屬諸如Au可能會提高半導體封裝100的製造成本。因此，其可經構造成僅使用Ni層作為止擋層121。然而，在此情況，舉例來說，在圖13所示之步驟中，於形成抗焊劑119後，經由進行無電極電鍍而將Au層121a形成於測試墊112及電極102的鎳(Ni)層121b上。
100．．．半導體封裝
101．．．支承基板
102．．．電極
102a．．．Au層
102b．．．Ni層
103．．．光阻劑圖案
103A．．．光阻劑圖案中之開口
105．．．佈線
105a．．．柱部分
105b．．．圖案佈線
106．．．密封樹脂
106a．．．密封樹脂之上表面
106b．．．密封樹脂之下表面
108．．．接合墊
108a．．．Au層
108b．．．Ni層
110．．．半導體晶片
110A．．．晶粒附著膜層
111．．．線
112．．．測試墊
112a．．．Au層
112b．．．Ni層
117．．．抗焊劑
117A．．．抗焊劑中之開口
118．．．電極
118a．．．Au層
118b．．．Ni層
119．．．抗焊劑
119A．．．抗焊劑中之開口
119B．．．抗焊劑中之開口
120．．．外部連接端子
121．．．止擋層
121a．．．Au層
121b．．．Ni層
125．．．光阻劑圖案
126．．．光阻劑圖案
127．．．非傳導性膜(NCF)
圖1係顯示利用作為本發明之一具體例之佈線基板製造方法所製得之佈線基板的剖面圖。
圖2係顯示作為本發明之一具體例之佈線基板製造方法在程序(第一)後的圖式。
圖3係顯示作為本發明之一具體例之佈線基板製造方法在程序(第二)後的圖式。
圖4係顯示作為本發明之一具體例之佈線基板製造方法在程序(第三)後的圖式。
圖5係顯示作為本發明之一具體例之佈線基板製造方法在程序(第四)後的圖式。
圖6係顯示作為本發明之一具體例之佈線基板製造方法在程序(第五)後的圖式。
圖7係顯示作為本發明之一具體例之佈線基板製造方法在程序(第六)後的圖式。
圖8係顯示作為本發明之一具體例之佈線基板製造方法在程序(第七)後的圖式。
圖9係顯示作為本發明之一具體例之佈線基板製造方法在程序(第八)後的圖式。
圖10係顯示作為本發明之一具體例之佈線基板製造方法在程序(第九)後的圖式。
圖11係顯示作為本發明之一具體例之佈線基板製造方法在程序(第十)後的圖式。
圖12係顯示作為本發明之一具體例之佈線基板製造方法在程序(第十一)後的圖式。
圖13係顯示作為本發明之一具體例之佈線基板製造方法在程序(第十二)後的圖式。
圖14係顯示作為本發明之一具體例之佈線基板製造方法在程序(第十三)後的圖式。
100．．．半導體封裝
102．．．電極
102a．．．Au層
102b．．．Ni層
105．．．佈線
105a．．．柱部分
105b．．．圖案佈線
106．．．密封樹脂
106a．．．密封樹脂之上表面
106b．．．密封樹脂之下表面
108．．．接合墊
108a．．．Au層
108b．．．Ni層
110．．．半導體晶片
110A．．．晶粒附著膜層
111．．．線
112．．．測試墊
112a．．．Au層
112b．．．Ni層
117．．．抗焊劑
117A．．．抗焊劑中之開口
118．．．電極
118a．．．Au層
118b．．．Ni層
119．．．抗焊劑
119A．．．抗焊劑中之開口
119B．．．抗焊劑中之開口
120．．．外部連接端子
127．．．非傳導性膜(NCF)

Claims (6)

  1. 一種半導體封裝，包括：一半導體晶片；一用於密封該半導體晶片之密封樹脂；及一佈線，其包括一連接至半導體晶片且形成暴露至密封樹脂之第一表面之圖案佈線部分，及一形成在密封樹脂之厚度方向中延伸之柱部分，該柱部分具有連接至圖案佈線部分之一端，及形成暴露至與密封樹脂之第一表面相對之第二表面的另一端，一設置有外部連接端子於其上的第一電極及一供測試用的第二電極係在該圖案佈線部分上形成。
  2. 如申請專利範圍第1項之半導體封裝，其中該柱部分具有圓柱形狀，且係利用電鍍方法形成。
  3. 一種將半導體晶片埋置於密封樹脂中的半導體封裝之製造方法，該方法包括：於一支承基板上形成圖案佈線部分之第一步驟；使用光阻劑圖案利用電鍍方法於圖案佈線部分上形成一柱部分之第二步驟；將半導體晶片設置於支承基板上以及使該半導體晶片連接至圖案佈線部分之第三步驟；形成一用於密封柱部分及半導體晶片之密封樹脂之第四步驟；及移除支承基板之第五步驟；在第五步驟之後藉由將止擋層圖案化，而將一設置有外 部連接端子於其上的第一電極及一供測試用的第二電極形成於圖案佈線部分上。
  4. 如申請專利範圍第3項之半導體封裝之製造方法，其中在第四步驟中，使用一液態樹脂作為密封樹脂之材料，及於將該液態樹脂設置於支承基板上之後，使液態樹脂硬化而形成密封樹脂。
  5. 如申請專利範圍第3項之半導體封裝之製造方法，其中在第三步驟中，半導體晶片係藉由線接合連接至圖案佈線部分。
  6. 如申請專利範圍第3至5項中任一項之半導體封裝之製造方法，其中在第一步驟中，圖案佈線部分係在將一止擋層形成於支承基板上之後形成，及在第五步驟中，藉由止擋層終止支承基板之移除。
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US20070052083A1 (en) 2007-03-08
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