CN104538370A - 一种基于预留槽塑封技术的pop封装结构及其制备方法 - Google Patents
一种基于预留槽塑封技术的pop封装结构及其制备方法 Download PDFInfo
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Abstract
本发明公开了一种基于预留槽塑封技术的POP封装结构及其制备方法,所述封装结构主要包括有基板、焊盘、凸点、芯片、塑封锡槽、塑封体、锡膏柱;所述塑封体上有塑封锡槽,塑封锡槽底部裸露有焊盘,塑封锡槽内部有锡膏柱,锡膏柱下端与焊盘连接。所述制备方法:基板上倒装上芯,塑封并制作塑封锡槽,塑封锡槽内印刷锡膏柱。该发明不需要完成封装后进行开孔过程;而且锡膏印刷,工艺简单。
Description
技术领域
本发明涉及半导体封装技术领域,具体是一种基于预留槽塑封技术的POP封装结构及其制备方法。
背景技术
当前半导体封装发展的趋势是越来越多的向高频、多芯片模块(MCM),系统集成(SiP)封装,堆叠封装(PiP,PoP)发展。
三维堆叠封装可以在更小的空间内集成更多的半导体芯片,采用三维堆叠封装的产品拥有更高的性能、更高的可靠性,以及更低的价格。目前,采用三维堆叠封装的产品,例如存储器,能实现更大的存储量,并且已经实现工业化生产。
目前pop制备技术有如下挑战:
(1)上封装体与下封装体互连方式;
(2)高温焊接翘曲控制;
(3)封装厚度控制。
优点:工艺成熟;
缺点:封装后需在封装体进行开孔;工序复杂。
发明内容
对于上述现有技术存在的问题,本发明公开了一种基于预留槽塑封技术的POP封装结构及其制备方法,其不需要完成封装后进行开孔过程;而且锡膏印刷,工艺简单。
一种基于预留槽塑封技术的POP封装结构,主要包括有基板、焊盘、凸点、芯片、塑封锡槽、塑封体、锡膏柱;所述基板通过焊盘、凸点连接芯片,所述塑封体包围芯片、焊盘、凸点、锡膏柱和基板的上表面,塑封体上有塑封锡槽,塑封锡槽底部裸露有焊盘,塑封锡槽内部有锡膏柱,锡膏柱下端与焊盘连接。
所述锡膏柱上端有锡膏球。
所述POP封装结构还连接有上封装体,所述上封装体主要包括有上封装体芯片、上封装体凸点、填充胶和上封装体基板;上封装体基板通过焊盘、上封装体凸点与上封装体芯片连接,填充胶填充四者连接部分;所述POP封装结构的锡膏柱与上封装体基板的下表面连接。
所述POP封装结构的锡膏柱上的锡膏球与上封装体基板的下表面连接。
一种基于预留槽塑封技术的POP封装结构的制备方法,其按照以下具体步骤进行:
步骤一:基板上倒装上芯有芯片;
步骤二:塑封体包围芯片、焊盘、凸点、锡膏柱和基板的上表面,塑封体上制作有塑封锡槽,塑封锡槽底部裸露出焊盘;
步骤三:在塑封锡槽内锡膏印刷和回流,形成锡膏柱,最终形成所述POP封装结构;
步骤四:上封装体与POP封装结构连接,POP封装结构的锡膏柱与上封装体基板的下表面连接,形成堆叠封装结构。
所述步骤三的锡膏柱上端还可以制作锡膏球;
所述步骤四可以替换为:上封装体与POP封装结构连接,所述POP封装结构的锡膏柱上的锡膏球与上封装体基板的下表面连接,形成堆叠封装结构。
附图说明
图1为倒装上芯完成的产品图;
图2为用特殊模具制作的塑封图;
图3为锡膏印刷和回流图;
图4为上层产品贴装和回流图。
图中,1为基板,2为焊盘,3为凸点,4为芯片,5为塑封锡槽,6为塑封体,7为锡膏柱,8为锡膏球,9为上封装体芯片,10为上封装体凸点,11为填充胶,12为上封装体基板。
具体实施方式
下面根据附图对该发明做一详细描述。
如图4所示,一种基于预留槽塑封技术的POP封装结构,主要包括有基板1、焊盘2、凸点3、芯片4、塑封锡槽5、塑封体6、锡膏柱7;所述基板1通过焊盘2、凸点3连接芯片4,所述塑封体6包围芯片4、焊盘2、凸点3、锡膏柱7和基板1的上表面,塑封体6上有塑封锡槽5,塑封锡槽5底部裸露有焊盘2,塑封锡槽5内部有锡膏柱7,锡膏柱7下端与焊盘2连接。
所述锡膏柱7上端有锡膏球8。
所述POP封装结构还连接有上封装体,所述上封装体主要包括有上封装体芯片9、上封装体凸点10、填充胶11和上封装体基板12;上封装体基板12通过焊盘、上封装体凸点10与上封装体芯片9连接,填充胶11填充四者连接部分;所述POP封装结构的锡膏柱7与上封装体基板12的下表面连接。
所述POP封装结构的锡膏柱7上的锡膏球8与上封装体基板12的下表面连接。
一种基于预留槽塑封技术的POP封装结构的制备方法,其按照以下具体步骤进行:
步骤一:基板1上倒装上芯有芯片4,如图1所示;
步骤二:塑封体6包围芯片4、焊盘2、凸点3、锡膏柱7和基板1的上表面,塑封体6上制作有塑封锡槽5,塑封锡槽5底部裸露出焊盘2,如图2所示;
步骤三:在塑封锡槽5内锡膏印刷和回流,形成锡膏柱7,最终形成所述POP封装结构,如图3所示;
步骤四:上封装体与POP封装结构连接,POP封装结构的锡膏柱7与上封装体基板12的下表面连接,形成堆叠封装结构,如图4所示。
所述步骤三的锡膏柱7上端还可以制作锡膏球8;
所述步骤四可以替换为:上封装体与POP封装结构连接,所述POP封装结构的锡膏柱7上的锡膏球8与上封装体基板12的下表面连接,形成堆叠封装结构。
Claims (8)
1.一种基于预留槽塑封技术的POP封装结构,其特征在于,所述封装结构主要包括有基板(1)、焊盘(2)、凸点(3)、芯片(4)、塑封锡槽(5)、塑封体(6)、锡膏柱(7);所述基板(1)通过焊盘(2)、凸点(3)连接芯片(4),所述塑封体(6)包围芯片(4)、焊盘(2)、凸点(3)、锡膏柱(7)和基板(1)的上表面,塑封体(6)上有塑封锡槽(5),塑封锡槽(5)底部裸露有焊盘(2),塑封锡槽(5)内部有锡膏柱(7),锡膏柱(7)下端与焊盘(2)连接。
2.根据权利要求1所述的一种基于预留槽塑封技术的POP封装结构,其特征在于,所述锡膏柱(7)上端有锡膏球(8)。
3.根据权利要求1所述的一种基于预留槽塑封技术的POP封装结构,其特征在于,所述POP封装结构还连接有上封装体,所述上封装体主要包括有上封装体芯片(9)、上封装体凸点(10)、填充胶(11)和上封装体基板(12);上封装体基板(12)通过焊盘、上封装体凸点(10)与上封装体芯片(9)连接,填充胶(11)填充四者连接部分;所述POP封装结构的锡膏柱(7)与上封装体基板(12)的下表面连接。
4.根据权利要求2或者3所述的一种基于预留槽塑封技术的POP封装结构,其特征在于,所述POP封装结构的锡膏柱(7)上的锡膏球(8)与上封装体基板(12)的下表面连接。
5.一种基于预留槽塑封技术的POP封装结构的制备方法,其特征在于,其按照以下具体步骤进行:
步骤一:基板(1)上倒装上芯有芯片(4);
步骤二:塑封体(6)包围芯片(4)、焊盘(2)、凸点(3)、锡膏柱(7)和基板(1)的上表面,塑封体(6)上制作有塑封锡槽(5),塑封锡槽(5)底部裸露出焊盘(2);
步骤三:在塑封锡槽(5)内锡膏印刷和回流,形成锡膏柱(7),最终形成所述POP封装结构。
6.根据权利要求5所述的一种基于预留槽塑封技术的POP封装结构的制备方法,其特征在于,所述步骤三的锡膏柱(7)上端制作锡膏球(8)。
7.根据权利要求5所述的一种基于预留槽塑封技术的POP封装结构的制备方法,其特征在于,所述步骤三形成的POP封装结构与上封装体连接,POP封装结构的锡膏柱(7)与上封装体基板(12)的下表面连接,形成堆叠封装结构。
8.根据权利要求7所述的一种基于预留槽塑封技术的POP封装结构的制备方法,其特征在于,所述POP封装结构的锡膏柱(7)上的锡膏球(8)与上封装体基板(12)的下表面连接,形成堆叠封装结构。
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CN1921108A (zh) * | 2005-08-23 | 2007-02-28 | 新光电气工业株式会社 | 半导体封装及其制造方法 |
US20100258932A1 (en) * | 2009-04-08 | 2010-10-14 | Elpida Memory, Inc. | Supporting substrate before cutting, semiconductor device, and method of forming semiconductor device |
CN203118928U (zh) * | 2012-12-13 | 2013-08-07 | 欣兴电子股份有限公司 | 封装结构 |
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CN1921108A (zh) * | 2005-08-23 | 2007-02-28 | 新光电气工业株式会社 | 半导体封装及其制造方法 |
US20100258932A1 (en) * | 2009-04-08 | 2010-10-14 | Elpida Memory, Inc. | Supporting substrate before cutting, semiconductor device, and method of forming semiconductor device |
CN203118928U (zh) * | 2012-12-13 | 2013-08-07 | 欣兴电子股份有限公司 | 封装结构 |
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