TWI331396B - Semiconductor device and method for making same - Google Patents

Semiconductor device and method for making same Download PDF

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Publication number
TWI331396B
TWI331396B TW095145300A TW95145300A TWI331396B TW I331396 B TWI331396 B TW I331396B TW 095145300 A TW095145300 A TW 095145300A TW 95145300 A TW95145300 A TW 95145300A TW I331396 B TWI331396 B TW I331396B
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Taiwan
Prior art keywords
semiconductor substrate
light
layer
substrate
back surface
Prior art date
Application number
TW095145300A
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English (en)
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TW200731521A (en
Inventor
Takashi Noma
Kazuo Okada
Shinzo Ishibe
Katsuhiko Kitagawa
Yuichi Morita
Shigeki Otsuka
Hiroshi Yamada
Noboru Okubo
Hiroyuki Shinogi
Mitsuru Okigawa
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Sanyo Electric Co
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Publication of TW200731521A publication Critical patent/TW200731521A/zh
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Publication of TWI331396B publication Critical patent/TWI331396B/zh

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Light Receiving Elements (AREA)

Description

1331396 九、發明說明： 【發明所屬之技術領域】 ^ 本發明係有關一種半導體裳置，尤其有關一種具備有 党光元件之晶片尺寸封裝型（chip size package)之半導體 裝置。 【先前技術】 近年來，CSP ( Chip Size Package;晶片尺寸封裝） •係作為新的封裝技術而受到矚目。所謂CSP係指具有與半 _導體晶片的外型規格大致相同尺寸的外型規格之小型封 裝。 ' 以往，作為CSP的一種，已知有BGA( Bal 1 Grid Array; 球型陣列）型的半導體裝置。該BGA型的半導體裝置係於 封裝體的主面上配列有複數個由銲錫等之金屬材料所構成 的球狀導電端子，並於封裝體的另—面上電性連接所搭載 的半導體晶片。 然後，將該BGA型的半導體裝置組裝至電子機器時， 將各導電端子絲於印刷電路板上的配線圖案，並將半導 體晶片與印刷電路板上所搭載的外部電路電性接續。 這種腸型的電子裝置與具有側部突出導線接腳的 s〇P(Smau〇utlinePackage;小外型封裝）和肝
Flat Package;四面平整封穿）耸 訂衮）荨之其他的CSP半導濟步 置相比，由於具有能設置複數個導 、 優點，故被廣泛地使用。 &子且相小型化的 第6圖（a)係顯示具備右疼伞 備有文先几件的習知BGA型半導 明 1396 、體裝置的概略構成之剖面圖。於由矽（Si)等所構成的半 導體基板100表面設置有CCD (charge c〇upled device; •電荷耦合元件）型成像感測器或CMOS (Colpleraentary .Met:al—Semiconductor;互補式金氧半導體）型成像 感測器等之受光元件，並且，墊電極102係隔著第1 絕緣膜103而形成。此外，於半導體基板1〇〇的表面，例 -如玻璃或石英等之光透過性基板1〇4係利用環氧樹脂等所 -構成的樹脂層1〇5而予以接著。此外，於半導體基板1〇〇 鲁的側面及背面形成有氧化⑨膜或氮㈣膜等所構成之第2 絕緣膜106。 並且，由半導體基板1〇〇表面沿著側面直至背面，於 第2 ’、、邑、、彖膜1 〇 6上形成有與塾|極1 〇 2冑性接續的配線層 107此外开’成由阻輝劑（so 1 der res i st)等所構成之保 濩層1 08 ’並覆蓋第2絕緣膜1 〇6及配線層1 〇7。於配線層 107上的保護層1〇8的預定區域形成開口部，並形成球狀 _的導電端子109，該導電端子1〇9係通過該開口部而與配 線層107電性接續。 上述技術，係揭示於例如以下的專利文獻。 專利文獻1:日本專利特表2002—512436號公報 【發明内容】 (發明所欲解決之課題） =而，於上述習知的BGA型半導體裝置中，當使用紅 線吩如第6圖（a)以箭頭所示，透過光透過性基板 104的紅外線會進一步透過半導體基S 100,並到達形成於 318787 6 層的步驟中， (發明的效果 於前述保護層混合有紅 ) 外線吸收材料。 並能防止形成於 案映入至輸出晝 ，依據本發明，不使製造步騾複雜化， 半導體基板背面的導電端子和配線層的圖 【實施方式】 參照圖式針對本發明之第1實施形態加以說 導體t由背面注視本發明之第1實施形態的半 =Λ 面圖，第1圖⑴係沿著第1圖⑷ =線之剖面圖。並且在第w(a…爲了簡便而 於圖式，略了保護層10及墊電極4等一部分的構成。 於該半導體裝置150的半導體基板2表面形成有可檢 ，則約至2500ΓΠΠ波長的紅外線之受光元件i(例如⑽ 感：器、CMOS感測器、照明感測器等之元件）。此外，於 半導，基板2背面配置有複數個球狀的導電端子11，各個 導電端子11係透過配線層9而與形成於半導體基板2表面 上的塾電極4電性接續。 在本實施形態中，於半導體基板2背面的垂直方向（第 1圖（a)中朝紙面之垂直方向）注視時，其構成為使配線 層9及導電端子U形成於與受光元件丨的形成區域重疊之 區域以外的區域，且於與受光元件丨的形成區域重疊之區 域未配置有配線層9及導電端子11。 此外，如上述方式來構成時，由光透過性基板6透過 半‘體基板2朝其背面方向射入的紅外線，或由半導體基 318787 8 的卜X線之剖面圖中的製造步驟順序之圖。 首先，如第2圖（a)所示，準 半導體基板2係由+導體基板2,該 所—一 形成有受光元件1之矽（Si)望 的第1絕緣膜3 Π 面形成例如膜厚2” 、 、（例如籍由熱氧化法或CVD & f ph .
Vapour Denned- ^ ^ ( Chemical .膜P〇Sltl〇n;化學氣相沉積法）等所形成之氧化石夕 > 藉”錢法、鑛覆法或其他成膜方法來形成銘 作為、舟=:U等之金屬層’之後使用未圖示的光阻層 作為遮罩將該金屬声子以為约丨j. ^ θ 如膜屋丨 /層^關，以1絕緣膜3上形成例 膜尽！"的墊電極4。墊電極4係與受光元 邊兀件電性接續之外邻接声 ' p接、·、貝用電極。接著，於前述半導體 j 2的表面形成未圖示的純化膜（例如藉由⑽法所形 氮切膜），該純化膜係覆蓋於墊電極4的-部分上。 接著，於包含有塾電極4的半導體基板2的表面上， 隔者核氧樹脂等之樹脂層5貼合光透過性基板6。光透過 I·生土板6係由玻璃或石英這種透明或半透明的材料所構 成，且具有使光線透過的性質之材料者。 •接者，料導體基板2的背面進行背面研磨（back grinding) ’將半導體基板2的厚度磨薄至例如1叫①左 右。並且，根據最終製品的用途及規格或所準備之半導體 基板2的最初厚度，亦有無需進行該研磨步驟之情況。 接著’如第2圖（b)所示，由半導體基板2的背面側 選擇1·生地僅對與塾電極4所對應的半導體基板2之位置進 318787 10 丄丄 订钱刻，使包含有墊電極4 一部份的第1絕緣膜3顯露出。 、 將°玄路出部分稱為開口部7，並且，在本實施形態 §_。卩7係由半導體基板2的背面側越往表面側方 =開Γ徑就越狹窄之横形形狀。並且’雖未圖示，亦可 吉二:口p 7钱刻成筆直形狀，俾使半導體基板2的側面垂 直於光透過性基板6的主面。 導體=如二=上所示::包含有㈣7内的半 2膜係例如错由㈣⑽法所形成之氧化石夕膜或氮化石夕 f著’如第3圖（a)所示’將未圖 罩，選擇性地將第〗絕緣膜3及第2絕緣二=遮 藉由該_，將形狀㈣極4—部分刻/ Πη·之區域的第！絕緣膜3刀^切割線⑷叫 使墊電極4的—部分_ 、、€緣膜8 ?以去除， 丨刀，、肩路於開口部7的底部。 接著’如第3圖（b)所；^ , 他的成膜方法，形成作為配線層9日之鍍覆法或其 等之金屬層。之後，將未圖示的 ：(A1)或銅（㈤ 並於墊電極4的一部分上及 3乍為遮罩予以蝕刻’ 膜厚的配線層9。 及弟2絕緣膜8上形成例如^ 接著，如第3圖（c)所示，於勺人 體基板2的背面上形成由例如阻；:二=層9的半導 保護们〇。然後，如第3圖（/之先阻材料所構成之 定區域形成為開口，並於由兮π斤不’使保護層10的預 由該開〇所顯露出的前述配線層 318787 11
9上形成由鎳或金等所 電極接續層上形成由銲錫❹續層（未圖示），且於 端子11。並且，告前、+、&或金專所構成之球狀的導電 將光線所照射的：域二為為陰性型的光阻材料時， 未受先線昭射的巴心 層10留下’並將保護層10 ‘射化域MS除而形成前述開口。 導體基板2的側壁到達形成㈣電極4沿著半 子11。 半導體基板2背面的導電端 的同：：半如同上述’能依據需求於與形成導電端子U 極：個步驟中形成虛設電極5〇。具體而言，使成為虛設 Γ由：:、保護層10的預定區域予以開口，並於該㈣ 紗，、銘、金或鎳等所構成之球狀的虛設電極50。 4，、沿著複數個半導體裝置的交界之切刻線DL進行 刀』，予以切斷分離成複數個半導體裝置150。 藉由上述步驟，完成具備有受光元们的晶片尺 裝型之半導體裝置。 依據本發明的第丨實施形態，由於半導體基板2的背 面，於與Utl件1的形成區域重疊之區域未配置有配線 層9及導電端子U，故能_實地防止配線層9和導電端子 Π圖案映入至輸出晝像的習知問題。此外，由於能獲得藉 ^變更配線層9與導電端子U的配置而產生之效果，故與 習知的製造方法相比不會增加製造步驟數。然後，藉由於 保護層10混合紅外線吸收材料，或另外設置紅外線吸收劑 層’而可防止亂反射的影響。 318787 12 日月。Π’f照圖式針對本發明的第2實施形態加以說 導體穿置2。/ 面注視本發明的第2實施形態的半 導體裝置200之平面圖，第4圖⑴係沿著第 :用γ—γ線之剖面圖。並且’與第1實施形態相同的構成係 =相ϋ的記號，並省略其說明。此外，於第M(a)中，、 施形態相同，爲了簡便省略了保護層1〇等之構成 的开刀、且同樣未於半導體基板2背面中與受光元件1 形成區域重疊之區域配置配線層9及導電端子u。 如第4圖（a)、(b)所示，在第2實施形 在半導體裝置2於半導體基板2背面上至少 ::c/==域重疊之區域形成有表面形狀相同的反射 二= 係例如由銘或金、銀、銅等之金屬材 導體_^1層/0係具有不使由光透過性基板6透過半 2的:—^ 方向射入之紅外線，或由半導體基板 功处Μ Μ®入的紅外線進一步透過而使該紅外線反射之 2的反射層，且只要具有該功能即可，並無特別限定其 广和膜厚。反射層20的膜厚例如為0.1至2# m。 同二:來該形反:Λ:能! '與配線層9相同的材料及相 機链法、鍵=,::1如第3圖⑴所示，藉由 、或/、他的成膜方法來形成鋁或銅等之金屬 絲㈣9時，能同時進行反 3第2貫施形態的半導體裝置2〇〇，由光透過性基 反射層20的紅外線係藉由該反射層20反射至受 318787 1331396 °因此，不僅能防止配線層9和導電端子11 1的红外線 = 象的習知問題，更具有提昇射入至受光元件 外，如 光強度且提昇輸出畫像的對比之優點。此 一個牛1上述’由於反射層2G能使用與形成配線層9的同 驟數7 I形成’故與第1實施形態相比不會增加製造步 、’且，在以上的實施形態中，雖針對形成有配線層9, •㈣線層9係由形成於半導體基板2的表面之塾電極4 •沿:半導體基板2的側面並延伸至半導體基板2的背面之 半導體裝置來加以說明，但只要於半導體基板2的背面形 成有配線層和導電端子之半導體裝置，本發明亦能適用。 因此，例如第5圖所示，本發明亦能適用於所謂的貫 通電極型的半導體裝置中，於該貫通電極型的半導體裝置 中係形成有通孔（Via hole)，該通孔係從與半導體基板2 的塾電極4所對應的位置表面貫通至背面’並形成有配線 泰層22’該配線層22係與通孔内的貫通電極21及半導體基 板2背面的貫通電極21電性接續。此外，第5圖係 第5圖（a)中Z—Z線的剖面圖，與上述半導體裝置相同 的構成係使用相同的符號’並省略其說明。並且，第5圖 中的符號23係例如由鈦（Ti )層、氧化鈦層（Ti& )、氮 化鈦（TiN)層或氮化鈕（TaN)層等之金屬所構成之阻障 金屬 C barrier metal)層 〇 該貝通電極型的半導體裝置係例如藉由以下的製造步 驟來製造。首先’準傷一半導體基板2，於該半導體基板2 318787 14 I33l396 形成有受光元件1及隔著第1絕緣膜3之墊電極4。接著， 於對應墊電極4的位置形成貫通半導體基板2之通孔。接 箸，形成覆蓋該通孔的側壁及半導體基板2的背面之第2 絕緣膜8a。接著，將通孔底部的第2絕緣膜“予以去除 後，於通孔内形成前述阻障金屬層23。接著，例如使用: 解電錢法等，於通孔内形成由鋼等之金屬所構成之貫通= 極2卜接著，在半導體基板2的背面，於與受光元件i的 形成區域重疊之區域以外的區域，將與貫通電極21電 續的配線層22予以圖案化（patterning)。之後 的導電端子11以及保護層10。並且， ϋ ,_ n 上述一連串的步驟 係貝通電極型的半導體裳置的製造步驟之一例，並未限+ 於該製造步驟。此外，雖未圖示，在第5圖所示的貫通^ 極型的半導體裝置中，盘卜；七穿^ 裒罝干與上述第2實施形態的半導體穿f 相同，能於至少重疊受光元株！ Μ r、 射層。 '更且又光兀件1的形成區域之區域形成反 此外，在以上的實施形態中，雖針對罝 端子之脱㈣半導體裝置加以說明，料 ^ 於LGA (Land Grid Arrav;柵祆瞌„ λ 力J通用 ray，栅格陣列）型的半導體奘罟 【圖式簡單說明】 〇 第1圖（a)及（b)係說明本發明 辦梦署m土 Π 毛月之弟i貫施形態的半導 體裝置及其Ά方法之平面圖與剖面圖。 第2圖（a)至（C)係說明本發 俨奘史乃i制、生士 + 令知乃之弟1貫施形態的半導 泡裝且及其衣造方法之剖面圖。 第3圖⑷至（C)係說明本發明之第1實施形態的半導 3J8787 15 if Ι· ,.-. 裝置及其製造方法之剖面圖。 第4圖⑷及⑻係說明本發 體裝置及苴制泮古土★ τ 乐^貝知形態的半導 直及，、衣化方法之平面圖與剖面圖。 第5圖（a)及（b)係說明本 太、土 外知月疋牛導體裝置及其製造 方法之平面圖與剖面圖。 輸出畫第：⑷及㈦係說明習知之半導體裝置的剖面圖及 【主要元件符號說明】 1 ' 1〇1受光元件 2 ' 100 半導體基板 3、103 第1絕緣膜 4 ' 102 墊電極 5、105 樹脂層 6 光透過性基板 7 開口部 8、8a、 106第2絕緣膜 9、22、 107配線層 10 、 108 保護層 11 、 109 導電端子 20 反射層 21 貫通電極 23 阻障金屬層 50 虛設電極 104 玻璃基板 110 輸出晝像 111 圖案 150、200半導體裝置 DL 切刻線 16 318787

Claims (1)

1331396 第95145300號專利申請索 (99年7月6曰） 十、申請專利範圍： 1· 一種半導體裝置，具備有： 半導體基板，其表面形成有受光元件； 光透過性基板，係位在前述受光元件的上方且貼 合前述半導體基板； 配線層，形成於前述半導體基板的背面上； 保護層’係覆蓋前述配線層；以及 反射層，係使由前述光透過性基板透過前述半導體 ® 基板而朝半導體基板背面射入的紅外線反射至;前述受 光元件側；並且， 前述配線層係在前述半導體基板的背面上，形成於 與則述受光元件的形成區域重疊之區域以外的區域； 前述反射層係在前述半導體基板的背面上，形成於 與前述受光元件的形成區域重疊之區域； 且前述配線層與前述反射層係形成在前述半導體 • 基板的背面上的同一層。 2.如申請專利範圍第丨項之半導體裝置，其中，前述保護 層係混合有吸收由前述光透過性基板透過前述半導體 基板而朝半導體基板背面射入的紅外線之紅外線吸收 材料。 3.如申請專利範圍第丨項之半導體裝置，其中，前述反射 層與前述配線層係以相同的材料所形成。 4·如申清專利範園第3項之半導體裝置，其中，前述材料 包含有金屬。 318787修正版 1331396 ’ 第95145300號專利申請案 (99年7月6曰i 5. 如申請專利範圍第1至4項中任一項之半導體裝置，其 中’形成有與前述受光元件電性連接的墊電極； ， 前述配線層係與前述墊電極電性連接，並且由前述 半導體基板的侧面.朝背面延伸。 6. 如申請專利範圍第1至4項中任一項之半導體裝置，其 t ’於前述半導體基板表面形成有墊電極； 則述半導體基板係具有通孔，該通孔由前述半導體 基板的背面貫通至前述墊電極,· • 前述配線層係通過前述通孔而與前述墊電極電性 連接。 7. —種半導體裝置的製造方法，具備有： 準備一半導體基板，該半導體基板表面形成有受光 元件及墊電極，且於前述半導體基板的表面上貼合光透 過性基板之步驟； 形成與前述墊電極電性連接的配線層之步驟； • 形成覆蓋前述配線層的保護層之步驟；以及 形成使由前述光透過性基板透過前述半導體基板 而朝前述半導體基板的背面方向射入之紅外線反射至 前述受光元件側的反射層之步驟；其中， 係在前述半導體基板的背面上，於與前述受光元件 的形成區域重疊之區域以外的區域形成前述配線層； 係在前述半導體基板的背面上，於與前述受光元件 的形成區域重疊之區域形成前述反射層； 且係將前述配線層與前述反射層係形成在前述半 318787修正版 丄尸1396 第95145300號專利申請案 ("年7月6曰） 導體基板的背面上的同一層。 ’申請專利範圍第7項之半導體裝置之製造方法，其 .； 中’於形成前述保護層的步驟中，於前述保護層混合有 ' 吸收由前述光透過性基板透過前述半導體基板而朝半 導體基板背面射入的紅外線之紅外線吸收材料。 9‘如申請專利範圍第7項之半導體裝置之製造方法，其 中’前述配線層與前述反射層係相同的材料，且於同_ 個步驟形成。
19 318787修正版
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CN1983612A (zh) 2007-06-20
SG133536A1 (en) 2007-07-30
US7633133B2 (en) 2009-12-15
US20070145590A1 (en) 2007-06-28
TW200731521A (en) 2007-08-16
EP1798768A3 (en) 2009-07-08
KR100840070B1 (ko) 2008-06-19
JP2007165696A (ja) 2007-06-28
CN1983612B (zh) 2010-07-21
EP1798768A2 (en) 2007-06-20

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