TWI266966B - Method for forming thick film pattern, method for manufacturing electronic component, and photosensitive paste for photolithography - Google Patents

Method for forming thick film pattern, method for manufacturing electronic component, and photosensitive paste for photolithography

Info

Publication number
TWI266966B
TWI266966B TW093132080A TW93132080A TWI266966B TW I266966 B TWI266966 B TW I266966B TW 093132080 A TW093132080 A TW 093132080A TW 93132080 A TW93132080 A TW 93132080A TW I266966 B TWI266966 B TW I266966B
Authority
TW
Taiwan
Prior art keywords
thick film
film pattern
photosensitive paste
forming
photosensitive
Prior art date
Application number
TW093132080A
Other languages
English (en)
Other versions
TW200517794A (en
Inventor
Hiroyuki Kambara
Shuichi Towata
Michiaki Iha
Original Assignee
Murata Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co filed Critical Murata Manufacturing Co
Publication of TW200517794A publication Critical patent/TW200517794A/zh
Application granted granted Critical
Publication of TWI266966B publication Critical patent/TWI266966B/zh

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/0047—Photosensitive materials characterised by additives for obtaining a metallic or ceramic pattern, e.g. by firing
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/009—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone characterised by the material treated
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/45—Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements
    • C04B41/50—Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements with inorganic materials
    • C04B41/51—Metallising, e.g. infiltration of sintered ceramic preforms with molten metal
    • C04B41/5188—Metallising, e.g. infiltration of sintered ceramic preforms with molten metal organic
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/80—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone of only ceramics
    • C04B41/81—Coating or impregnation
    • C04B41/85—Coating or impregnation with inorganic materials
    • C04B41/88—Metals
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00—Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00474—Uses not provided for elsewhere in C04B2111/00
    • C04B2111/00844—Uses not provided for elsewhere in C04B2111/00 for electronic applications
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/0514—Photodevelopable thick film, e.g. conductive or insulating paste

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Structural Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Materials For Photolithography (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
TW093132080A 2003-11-25 2004-10-22 Method for forming thick film pattern, method for manufacturing electronic component, and photosensitive paste for photolithography TWI266966B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003393551 2003-11-25

Publications (2)

Publication Number Publication Date
TW200517794A TW200517794A (en) 2005-06-01
TWI266966B true TWI266966B (en) 2006-11-21

Family

ID=34631432

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093132080A TWI266966B (en) 2003-11-25 2004-10-22 Method for forming thick film pattern, method for manufacturing electronic component, and photosensitive paste for photolithography

Country Status (4)

Country Link
US (1) US8298754B2 (zh)
JP (1) JP4211782B2 (zh)
TW (1) TWI266966B (zh)
WO (1) WO2005052691A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8018047B2 (en) * 2007-08-06 2011-09-13 Infineon Technologies Ag Power semiconductor module including a multilayer substrate
US8154114B2 (en) * 2007-08-06 2012-04-10 Infineon Technologies Ag Power semiconductor module
US7887992B2 (en) * 2008-12-23 2011-02-15 E. I. Du Pont De Nemours And Company Photosensitive paste and process for production of pattern using the same
JP5764931B2 (ja) * 2010-02-02 2015-08-19 東レ株式会社 有機−無機複合導電性パターン形成用感光性ペーストおよび有機−無機複合導電性パターンの製造方法
JP5928789B2 (ja) * 2012-02-23 2016-06-01 株式会社村田製作所 セラミック電子部品の製造方法
WO2018038074A1 (ja) * 2016-08-24 2018-03-01 東レ株式会社 感光性ペースト、セラミックグリーンシート、電子部品、パターンの製造方法および電子部品の製造方法

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US4557995A (en) * 1981-10-16 1985-12-10 International Business Machines Corporation Method of making submicron circuit structures
US4598037A (en) * 1984-12-21 1986-07-01 E. I. Du Pont De Nemours And Company Photosensitive conductive metal composition
JP2862559B2 (ja) * 1989-04-10 1999-03-03 大日本印刷株式会社 厚膜パターン形成方法
US5234970A (en) * 1991-07-16 1993-08-10 W. R. Grace & Co.-Conn. Dual curing composition based on isocyanate trimer and use thereof
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JP3028718B2 (ja) * 1993-11-30 2000-04-04 双葉電子工業株式会社 感光性ペースト
US6197480B1 (en) * 1995-06-12 2001-03-06 Toray Industries, Inc. Photosensitive paste, a plasma display, and a method for the production thereof
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KR20000015469A (ko) * 1998-08-29 2000-03-15 박이순 광중합형 감광성 형광체 페이스트 조성물및 이를 이용한 형광막의 형성방법
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JP3699336B2 (ja) * 2000-06-08 2005-09-28 スリーエム イノベイティブ プロパティズ カンパニー プラズマディスプレイパネル基板用リブの製造方法
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TW526693B (en) * 2000-06-15 2003-04-01 Murata Manufacturing Co Multilayer circuit component and method for manufacturing the same
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JP3674501B2 (ja) * 2000-11-30 2005-07-20 株式会社村田製作所 感光性銅ペースト、銅パターンの形成方法、及びセラミック多層基板の製造方法
JP2002270036A (ja) 2001-03-14 2002-09-20 Noritake Co Ltd 無溶剤型光硬化性導体ペーストおよびセラミック電子部品製造方法
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JP3614152B2 (ja) * 2001-08-07 2005-01-26 株式会社村田製作所 感光性導電ペースト、それを用いた回路基板及びセラミック多層基板の製造方法
US20040170925A1 (en) * 2002-12-06 2004-09-02 Roach David Herbert Positive imageable thick film compositions

Also Published As

Publication number Publication date
TW200517794A (en) 2005-06-01
US8298754B2 (en) 2012-10-30
US20070224534A1 (en) 2007-09-27
JP4211782B2 (ja) 2009-01-21
WO2005052691A1 (ja) 2005-06-09
JPWO2005052691A1 (ja) 2007-06-21

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