TW588443B - Semiconductor device, and method of manufacturing the same - Google Patents

Semiconductor device, and method of manufacturing the same Download PDF

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Publication number
TW588443B
TW588443B TW092104639A TW92104639A TW588443B TW 588443 B TW588443 B TW 588443B TW 092104639 A TW092104639 A TW 092104639A TW 92104639 A TW92104639 A TW 92104639A TW 588443 B TW588443 B TW 588443B
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semiconductor
substrate
semiconductor wafer
semiconductor device
resin
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TW092104639A
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TW200401415A (en
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Kazunari Michii
Naoyuki Shinonaga
Shinji Semba
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Mitsubishi Electric Corp
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Description

588443 言正替換頁 利範圍第3項之半導體裝置中， 使上述之端子更包含有形成在上述之接端面上之焊接 球。 本發明之申請專利範圍第5項之半導體裝置之製造方法 其特徵是所包含之步驟有： 在基板之表面裝載多個之半導體晶片； 以密封樹脂一起密封上述之多個半導體晶片； 在將多個端子形成在上述基板之背面之步驟，形成端子 使鄰接之半導體晶片之對應之端子之間隔，成爲半導體晶 片之端子之間隔的整數倍； 進行上述之多個半導體晶片之電試驗；和 切斷上述之樹脂和上述之基板，用來使上述之半導體晶 片成爲各個片。 本發明之申請專利範圍第6項之半導體裝置之製造方法 是在申請專利範圍第5項之製造方法中， 使上述之電試驗之進行使用以與上述半導體晶片中之端 子之間隔相同之間隔被配置成爲柵網狀之測試接觸銷進 本發明之申請專利範圍第7項之半導體裝置之製造方法 是在申請專利範圍第5或6項之製造方法中， 使上述之半導體晶片成爲各個片之步驟是對鄰接之半導 體晶片之間進行2次切斷。 本發明之申請專利範圍第.8項之半導體裝置之製造方法 是在申請專利範圍第5或7項之製造方法中’ 32'6\ 總檔\92\92104639\93104639(替換1 588443 y. X ^ Jiy日j 替换頁 是切斷部份，7是切剩部份， Κ 半導體晶片，5是金屬線， 8是封裝（半導體裝置），1 1是測試接觸銷 首先說明本實施形態1之半導體裝置。 如圖1和圖2所示，在基板1之表面形成多個樹脂密封 部2。然後，如圖4和圖5所示，在樹脂密封部2內設置 多個半導體晶片4，利用金屬線5形成與基板1電連接。
然後，如圖3和圖5所示，在基板1之背面，與樹脂密 封部2內之半導體晶片4對應的，形成多個焊接球3作爲 外部電極用之端子。在此處是使鄰接的半導體晶片4(或封 裝8)之對應的焊接球3之間隔A，成爲半導體晶片4(或封 裝8)的焊接球3之間隔B的η倍（η爲1以上之整數），以
此方式配置焊接球3。例如，在封裝大小爲8 m m X 8 m m之 情況時，間隔A爲9.6 m m (= Ο . 8 m m x 1 2)，間隔B爲Ο . 8 m m。 另外，焊接球3經由接端面（9)形成與半導體晶片4電連接 (參照圖17)。另外，η之値通常被設定在2〜20之範圍。 換言之，間隔Α被設定成爲間隔Β之2〜20倍。 另外，如圖5所示，利用焊接球3的間隔B相同的間隔 (例如0.8mm)，將測試接觸銷11配置成爲栅網狀。使用該 測試接觸銷1 1用來進行半導體裝置之電試驗（將於後面說 明）。 然後，如圖6〜圖8所示，在樹脂密封部2和基板1之 相鄰半導體晶片4之間，分別設置被切割器切斷之2個切 斷部份6。在該2個切斷部份6之間，亦即在半導體晶片 4(或封裝8)之間之部份，成爲切剩部份7。該切剩部份7 13 326\總檔\92\92104639\93104639(替換)-1 93. 9. 1 4 替换頁 經由 小。 588443 I正替換頁 是依照所希望之封裝大小變化其大小之部份。亦即， 變化該切剩部份7之大小，可以獲得所希望之封裝大 例如，在上述之封裝大小之情況時，切斷部份6之幅度爲 0.3 5mm，切剩部份7之幅度爲0.9mm。 下面將說明半導體裝置’之製造方法。 首先，如圖4和圖5所示，在基板1之表面裝載多個半 導體晶片4，使用金屬線5電連接基板1和半導體晶片4。
其次’以樹脂一起封多個半導體晶片4’用來形成樹 脂密封部2。
其次，在基板1之背面，形成與半·導體晶片電連接之多 個焊接球裝載用接端面（參照圖17)。然後，在接端面上形 成焊接球3。在此處具有作爲外部電極用之端子之功能之 接端面和焊接球3，形成使鄰接之半導體晶片4之對應端 子之間隔Α成爲半導體晶片4的端子之間隔Β的η倍（η爲 1以上之整數）。例如，當封裝大小爲8mm X 8 mm之情況時， 間隔A爲9.6mm(0.8mmxl2)，間隔B成爲0.8mm，以此方 式形成接端面和焊接球3。 其次，以多個半導體晶片4被裝載在基板1上之狀態， 同時進行多個半導體晶片4之電試驗。此處之電試驗如圖 5所示，使用以與焊接球3之間隔B相同之間隔（例如0.8mm) 被配置成柵網狀之測試接觸銷1 1用來進行該電試驗。 然後，在完成電試驗之後，利用切割器切斷被設在樹脂 密封部2和基板1之切斷部份6。在此處爲著獲得所希望 之封裝大小，所以在鄰接之半導體晶片4(或封裝8)之間， 14 326\總檔\92\92104639\93104639(替換)-1 588443
93. 9. 1 4 替換頁 分別進行2次切斷，例如成爲残留0.9mm幅度之切剩部 利用此種方式使封裝8成爲各個片。 如以上所說明之方式，在本實施形態1中，使端子位置 共同化，用來使鄰接之半導體晶片4之對應端子（接端面+ 9，焊接球3)之間隔A，成爲半導體晶片4的端子之間隔B 的η倍U爲1以上之整數）.。因此，假如準備1種以與半導 體晶片4的端子之間隔Β相同的間隔配置成柵網狀的測試 接觸銷1 1時，則即使在.樹脂密封部2內之封裝大小有變化 之情況時，亦可以以相同之測試接觸銷1 1進行電試驗。因 此，測試夾具之成本可以大幅的削減。 另外，因爲不需要更換測試夾具之時間，亦即沒有封裝 替換損失，所以可以有效的進行電試驗。 另外，因爲可以以基板狀態同時測試多個封裝8(或半導 體晶片4)，所以可以大幅的提高電試驗之生產效率。另外， 即使在使封裝小型化之情況時，亦可以防止在電試驗時或 搬運時之封裝之脫落。 另外，在本實施形態1中，當使封裝8成爲各個片時， 使切剩部7殘留，以2次切斷樹脂密封部2和基板1。因 此，如上述之方式，即使在謀求使端子位置共同化時，亦 可以獲得所希望之封裝大小之半導體裝置.。 另外，在本實施形態1中，所說明者是使用BGA基板作 爲半導體裝置用基板之情況，亦即BGA型之封裝，但是並 不只限於此種方式，亦可以使用LGA型之封裝。在此種情 況亦可以不形成作爲端子之焊接球3。 15
326\總檔\92\92104639\93104639(替換)-1
588443 肆、中文發明摘要 |正替換頁ii±f
Mm 93. 9. 1 誓换 本發明之目的是使半導體裝置之端子位置共用，和減低 半導體裝置之電試驗所使用之夾具之成本。 本發明之解決手段是在半導體裝置用基板1之表面裝載+ 多個之半導體晶片4。以樹脂一起密封多個半導體晶片4， 用來形成樹脂密封部2。在基板1之背面形成多個焊接球 3，使鄰接之半導體晶片4之對應之焊接球3之間隔A，成 爲半導體晶片4之焊接球3之間隔B之η倍（η爲1以上之 整數）。在進行多個半導體晶片4之電試驗之後，切斷樹脂 密封部2和基板1，用來使半導體晶片4成爲各個片。 伍、英文發明摘要
The present invention is to provide a semiconductor , ' · - device and method of manufacturing the same in order to curtail costs for a test tool used for electrical test of semiconductor devices by establishing commonality in positions of. terminals of semiconductor device. A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the corresponding solder balls of adjacent semiconductor chips becomes “n” times (“n” is an integer greater than 1 )an 3 326\總檔\92\92104639\93104639(替換)-1 fff fη /γ 588443拾·、申:露專利範· 替換頁lM(m 的· 9· 1 4 替换頁 1. 一種半導體裝置，其特徵是具備有： 多個半導體晶片，被裝載在基板之表面； 密封樹脂，用來一起密封該多個半導體晶片；和 端子，成爲形成在該基板之背面之多個端子，使鄰接的 該半導體晶片之對應的該端子的間隔，成爲該半導體晶片 之該端子的間隔的整數倍。 2·如申請專利範圍第丨項之半導體裝置，其中 在鄰接的上述半導體晶片之間的上述樹脂，分別設置2 個切斷部份。 . 3·如申請專利範圍第1或2項之半導體裝置，其中 上述端子包含有與上述半導體晶片電連接之接端面。 4·如申請專利範圍第3項之半導體裝置，其中 上述端子更包含有形成在上述接端面上之焊接球。 5.—種半導體裝置之製造方法，其特徵是所包含的步驟 有： 在基板表面裝載多個之半導體晶片；. 以密封樹脂一起密封上述多個半導體晶片； 在將多個端子形成在上述基板的背面之步驟，形成端子 使鄰接的半導體晶片之對應的端子之間隔，成爲半導體晶 片之端子的間隔之整數倍； 進行上述多個半導體晶片的電試驗；和 切斷上述樹脂和上述基板，用來使上述半導體晶片成爲 各個片。 18
326V總檔\92\92104639\93104639(替換)-1 p ? ^ 588443 9. 1 4 替换頁 2/6 圖4
圖5
圖6
588443 7圖 6 J正替換頁 93· 9· 1 4 替换貝 3/6 6 〇〇〇〇οο:α:σ ;Q::Q;:Q;.:o.: 0QiQ:Q: :σ·:ο::ο:Ό 0!0·::0:.0::Q:ioi:o::Q.: 0:0:0:0: 0:0:0::0: 〇00〇； 3
圖 :0::0:0:0 0:0:0::0: 0;0:0::0::
8 588443 J正替換頁93. 9· 14 矜年Γ月WgJ .替換頁· 5/6 圖72
圖13 5 j c 3
588443 實正替換頁93· 9· 1 4 日替换頁 6/6 6
圖16
B
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