TW588401B - Method of plasma etching features on a dielectric layer on a substrate - Google Patents

Method of plasma etching features on a dielectric layer on a substrate Download PDF

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Publication number
TW588401B
TW588401B TW090127206A TW90127206A TW588401B TW 588401 B TW588401 B TW 588401B TW 090127206 A TW090127206 A TW 090127206A TW 90127206 A TW90127206 A TW 90127206A TW 588401 B TW588401 B TW 588401B
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TW
Taiwan
Prior art keywords
gas
chamber
flow rate
page
plasma
Prior art date
Application number
TW090127206A
Other languages
English (en)
Chinese (zh)
Inventor
James D Carducci
Hamid Noorbakhsh
Evans Y Lee
Bryan Y Pu
Hongqing Shan
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/704,867 external-priority patent/US6403491B1/en
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Application granted granted Critical
Publication of TW588401B publication Critical patent/TW588401B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32458Vessel
    • H01J37/32522Temperature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833Details of electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68792Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the construction of the shaft
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
TW090127206A 2000-11-01 2001-11-01 Method of plasma etching features on a dielectric layer on a substrate TW588401B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US70497200A 2000-11-01 2000-11-01
US09/704,867 US6403491B1 (en) 2000-11-01 2000-11-01 Etch method using a dielectric etch chamber with expanded process window

Publications (1)

Publication Number Publication Date
TW588401B true TW588401B (en) 2004-05-21

Family

ID=27107394

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090127206A TW588401B (en) 2000-11-01 2001-11-01 Method of plasma etching features on a dielectric layer on a substrate

Country Status (5)

Country Link
EP (1) EP1334514A2 (ko)
JP (1) JP2004513516A (ko)
KR (1) KR100887014B1 (ko)
TW (1) TW588401B (ko)
WO (1) WO2002037541A2 (ko)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101680929B (zh) * 2006-05-01 2012-10-10 瓦福默控股有限公司 集成电路探测卡分析器
TWI425882B (zh) * 2004-12-22 2014-02-01 Lam Res Corp 減少副產物沉積在電漿處理系統之方法與配置
TWI649453B (zh) * 2013-12-31 2019-02-01 奧地利商蘭姆研究股份公司 晶圓狀物件之表面的處理設備
US10458019B2 (en) 2012-11-02 2019-10-29 Industrial Technology Research Institute Film deposition apparatus having a peripheral spiral gas curtain

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100468203B1 (ko) * 2002-08-16 2005-01-26 어댑티브프라즈마테크놀로지 주식회사 플라즈마 에칭시스템에 구비된 돔의 온도제어장치 및 그방법
US7140374B2 (en) 2003-03-14 2006-11-28 Lam Research Corporation System, method and apparatus for self-cleaning dry etch
US7009281B2 (en) * 2003-03-14 2006-03-07 Lam Corporation Small volume process chamber with hot inner surfaces
US20050230350A1 (en) * 2004-02-26 2005-10-20 Applied Materials, Inc. In-situ dry clean chamber for front end of line fabrication
US7718029B2 (en) * 2006-08-01 2010-05-18 Applied Materials, Inc. Self-passivating plasma resistant material for joining chamber components
US8597462B2 (en) * 2010-05-21 2013-12-03 Lam Research Corporation Movable chamber liner plasma confinement screen combination for plasma processing apparatuses
US20130105085A1 (en) * 2011-10-28 2013-05-02 Applied Materials, Inc. Plasma reactor with chamber wall temperature control
US20140116622A1 (en) * 2012-10-31 2014-05-01 Semes Co. Ltd. Electrostatic chuck and substrate processing apparatus
KR101542905B1 (ko) * 2013-04-26 2015-08-07 (주)얼라이드 테크 파인더즈 반도체 장치
US9384948B2 (en) * 2013-06-13 2016-07-05 Lam Research Corporation Hammerhead TCP coil support for high RF power conductor etch systems
US10741425B2 (en) * 2017-02-22 2020-08-11 Lam Research Corporation Helium plug design to reduce arcing
US10381200B2 (en) * 2017-03-08 2019-08-13 Applied Materials, Inc. Plasma chamber with tandem processing regions
CN111370281B (zh) 2018-12-26 2023-04-28 中微半导体设备(上海)股份有限公司 等离子体刻蚀装置
CN111446144B (zh) * 2019-01-17 2024-04-19 东京毅力科创株式会社 静电吸附部的控制方法和等离子体处理装置
KR102217452B1 (ko) * 2019-07-05 2021-02-22 세메스 주식회사 상부 모듈 온도 제어 장치 및 이를 구비하는 기판 처리 시스템
JP7370228B2 (ja) * 2019-11-22 2023-10-27 東京エレクトロン株式会社 プラズマ処理装置
US11686208B2 (en) 2020-02-06 2023-06-27 Rolls-Royce Corporation Abrasive coating for high-temperature mechanical systems
US11499223B2 (en) 2020-12-10 2022-11-15 Applied Materials, Inc. Continuous liner for use in a processing chamber
KR102646591B1 (ko) * 2022-05-13 2024-03-12 세메스 주식회사 기판 처리 장치

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155652A (en) * 1991-05-02 1992-10-13 International Business Machines Corporation Temperature cycling ceramic electrostatic chuck
KR100404631B1 (ko) * 1994-01-31 2004-02-05 어플라이드 머티어리얼스, 인코포레이티드 두께가일정한절연체막을갖는정전기척
US5798016A (en) * 1994-03-08 1998-08-25 International Business Machines Corporation Apparatus for hot wall reactive ion etching using a dielectric or metallic liner with temperature control to achieve process stability
US5886863A (en) * 1995-05-09 1999-03-23 Kyocera Corporation Wafer support member
US5788799A (en) * 1996-06-11 1998-08-04 Applied Materials, Inc. Apparatus and method for cleaning of semiconductor process chamber surfaces
KR20000057373A (ko) * 1996-12-04 2000-09-15 가마이 고로 열 전도성 감압 접착제, 이의 접착 시트류 및 이를 사용한 전자부품과 방열 부재와의 고정방법
JP3979694B2 (ja) * 1997-01-22 2007-09-19 株式会社巴川製紙所 静電チャック装置およびその製造方法
KR100290264B1 (ko) * 1997-01-22 2001-09-22 호소이 쇼지로 정전처크장치 및 그 제조방법
JPH11176920A (ja) * 1997-12-12 1999-07-02 Shin Etsu Chem Co Ltd 静電吸着装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI425882B (zh) * 2004-12-22 2014-02-01 Lam Res Corp 減少副產物沉積在電漿處理系統之方法與配置
CN101680929B (zh) * 2006-05-01 2012-10-10 瓦福默控股有限公司 集成电路探测卡分析器
US10458019B2 (en) 2012-11-02 2019-10-29 Industrial Technology Research Institute Film deposition apparatus having a peripheral spiral gas curtain
TWI649453B (zh) * 2013-12-31 2019-02-01 奧地利商蘭姆研究股份公司 晶圓狀物件之表面的處理設備

Also Published As

Publication number Publication date
JP2004513516A (ja) 2004-04-30
EP1334514A2 (en) 2003-08-13
KR20020081240A (ko) 2002-10-26
WO2002037541A3 (en) 2002-10-10
KR100887014B1 (ko) 2009-03-04
WO2002037541A2 (en) 2002-05-10

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