TW492181B - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereof Download PDFInfo
- Publication number
- TW492181B TW492181B TW089109113A TW89109113A TW492181B TW 492181 B TW492181 B TW 492181B TW 089109113 A TW089109113 A TW 089109113A TW 89109113 A TW89109113 A TW 89109113A TW 492181 B TW492181 B TW 492181B
- Authority
- TW
- Taiwan
- Prior art keywords
- film
- semiconductor device
- aforementioned
- gate
- silicon
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11163929A JP2000353803A (ja) | 1999-06-10 | 1999-06-10 | 半導体装置およびその製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW492181B true TW492181B (en) | 2002-06-21 |
Family
ID=15783517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW089109113A TW492181B (en) | 1999-06-10 | 2000-05-12 | Semiconductor device and manufacturing method thereof |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6479873B1 (enExample) |
| JP (1) | JP2000353803A (enExample) |
| KR (1) | KR100392167B1 (enExample) |
| TW (1) | TW492181B (enExample) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002305302A (ja) * | 2001-04-06 | 2002-10-18 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| KR100414220B1 (ko) * | 2001-06-22 | 2004-01-07 | 삼성전자주식회사 | 공유 콘택을 가지는 반도체 장치 및 그 제조 방법 |
| KR100434495B1 (ko) * | 2001-11-10 | 2004-06-05 | 삼성전자주식회사 | 반도체 소자의 제조방법 |
| JP2003152104A (ja) * | 2001-11-14 | 2003-05-23 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| KR20030079298A (ko) * | 2002-04-03 | 2003-10-10 | 삼성전자주식회사 | 반도체 소자 및 그 제조방법 |
| JP2004165317A (ja) | 2002-11-12 | 2004-06-10 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US6881614B2 (en) * | 2003-06-20 | 2005-04-19 | Taiwan Semiconductor Manufacturing Company | Shared contact for high-density memory cell design |
| JP4058022B2 (ja) | 2004-05-25 | 2008-03-05 | 株式会社東芝 | 半導体装置の製造方法 |
| US7037774B1 (en) | 2004-10-21 | 2006-05-02 | Integrated Device Technology, Inc. | Self-aligned contact structure and process for forming self-aligned contact structure |
| CN100389498C (zh) * | 2005-06-07 | 2008-05-21 | 中芯国际集成电路制造(上海)有限公司 | 制备cmos图像传感器-混合硅化物的方法 |
| KR100724565B1 (ko) * | 2005-07-25 | 2007-06-04 | 삼성전자주식회사 | 코너보호패턴을 갖는 공유콘택구조, 반도체소자, 및 그제조방법들 |
| DE102006004412B3 (de) * | 2006-01-31 | 2007-08-30 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Erhöhen der Ätzselektivität in einer Kontaktstruktur in Halbleiterbauelementen |
| JP2008078404A (ja) | 2006-09-21 | 2008-04-03 | Toshiba Corp | 半導体メモリ及びその製造方法 |
| JP2008311457A (ja) * | 2007-06-15 | 2008-12-25 | Renesas Technology Corp | 半導体装置の製造方法 |
| KR100958625B1 (ko) * | 2007-12-26 | 2010-05-20 | 주식회사 동부하이텍 | 반도체 소자의 모니터링 패턴 및 그의 제조방법 |
| US7928577B2 (en) | 2008-07-16 | 2011-04-19 | Micron Technology, Inc. | Interconnect structures for integration of multi-layered integrated circuit devices and methods for forming the same |
| TW201007885A (en) * | 2008-07-18 | 2010-02-16 | Nec Electronics Corp | Manufacturing method of semiconductor device, and semiconductor device |
| JP5754334B2 (ja) * | 2011-10-04 | 2015-07-29 | 富士通セミコンダクター株式会社 | 半導体装置及び半導体装置の製造方法 |
| US20160126336A1 (en) * | 2014-10-29 | 2016-05-05 | Globalfoundries Inc. | Method of improved ca/cb contact and device thereof |
| US20230320057A1 (en) * | 2022-04-01 | 2023-10-05 | Intel Corporation | Recessed transistor terminal via jumpers |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08250603A (ja) | 1995-03-14 | 1996-09-27 | Toshiba Corp | 半導体装置及びその製造方法 |
| JPH09326440A (ja) | 1996-06-04 | 1997-12-16 | Sony Corp | 半導体装置の製造方法 |
| US5721154A (en) * | 1996-06-18 | 1998-02-24 | Vanguard International Semiconductor | Method for fabricating a four fin capacitor structure |
| US5677227A (en) * | 1996-09-09 | 1997-10-14 | Vanguard International Semiconductor Corporation | Method of fabricating single crown, extendible to triple crown, stacked capacitor structures, using a self-aligned capacitor node contact |
| US5792689A (en) * | 1997-04-11 | 1998-08-11 | Vanguard International Semiconducter Corporation | Method for manufacturing double-crown capacitors self-aligned to node contacts on dynamic random access memory |
| US6008085A (en) * | 1998-04-01 | 1999-12-28 | Vanguard International Semiconductor Corporation | Design and a novel process for formation of DRAM bit line and capacitor node contacts |
| US6110818A (en) * | 1998-07-15 | 2000-08-29 | Philips Electronics North America Corp. | Semiconductor device with gate electrodes for sub-micron applications and fabrication thereof |
| US6174803B1 (en) * | 1998-09-16 | 2001-01-16 | Vsli Technology | Integrated circuit device interconnection techniques |
-
1999
- 1999-06-10 JP JP11163929A patent/JP2000353803A/ja active Pending
- 1999-11-22 US US09/444,848 patent/US6479873B1/en not_active Expired - Fee Related
-
2000
- 2000-05-12 TW TW089109113A patent/TW492181B/zh not_active IP Right Cessation
- 2000-05-19 KR KR10-2000-0026897A patent/KR100392167B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6479873B1 (en) | 2002-11-12 |
| KR100392167B1 (ko) | 2003-07-22 |
| KR20010014937A (ko) | 2001-02-26 |
| JP2000353803A (ja) | 2000-12-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |