TW468184B - Semiconductor memory device and electronic apparatus - Google Patents
Semiconductor memory device and electronic apparatus Download PDFInfo
- Publication number
- TW468184B TW468184B TW089107437A TW89107437A TW468184B TW 468184 B TW468184 B TW 468184B TW 089107437 A TW089107437 A TW 089107437A TW 89107437 A TW89107437 A TW 89107437A TW 468184 B TW468184 B TW 468184B
- Authority
- TW
- Taiwan
- Prior art keywords
- signal
- semiconductor memory
- memory device
- regeneration
- data
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 238
- 230000008929 regeneration Effects 0.000 claims description 260
- 238000011069 regeneration method Methods 0.000 claims description 260
- 230000002079 cooperative effect Effects 0.000 claims description 30
- 230000001172 regenerating effect Effects 0.000 claims description 17
- 238000012546 transfer Methods 0.000 claims description 16
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 8
- 230000000875 corresponding effect Effects 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 5
- 230000001276 controlling effect Effects 0.000 claims description 4
- 238000012856 packing Methods 0.000 claims description 2
- 210000000746 body region Anatomy 0.000 claims 1
- 230000002496 gastric effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 65
- 238000013500 data storage Methods 0.000 description 58
- 230000005540 biological transmission Effects 0.000 description 43
- 239000000872 buffer Substances 0.000 description 33
- 238000005259 measurement Methods 0.000 description 23
- 238000000034 method Methods 0.000 description 16
- 230000004913 activation Effects 0.000 description 15
- 230000004044 response Effects 0.000 description 12
- 230000008901 benefit Effects 0.000 description 8
- 230000001413 cellular effect Effects 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 238000009434 installation Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 3
- 230000002401 inhibitory effect Effects 0.000 description 3
- 101100309712 Arabidopsis thaliana SD11 gene Proteins 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 101100537098 Mus musculus Alyref gene Proteins 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 101150095908 apex1 gene Proteins 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000001934 delay Effects 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 238000007726 management method Methods 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 229910021532 Calcite Inorganic materials 0.000 description 1
- 206010011469 Crying Diseases 0.000 description 1
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 241000282376 Panthera tigris Species 0.000 description 1
- 101150055297 SET1 gene Proteins 0.000 description 1
- 235000005505 Ziziphus oenoplia Nutrition 0.000 description 1
- 244000104547 Ziziphus oenoplia Species 0.000 description 1
- 230000000443 biocontrol Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- RDYMFSUJUZBWLH-UHFFFAOYSA-N endosulfan Chemical compound C12COS(=O)OCC2C2(Cl)C(Cl)=C(Cl)C1(Cl)C2(Cl)Cl RDYMFSUJUZBWLH-UHFFFAOYSA-N 0.000 description 1
- 239000000446 fuel Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000036541 health Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000011232 storage material Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1042—Read-write modes for single port memories, i.e. having either a random port or a serial port using interleaving techniques, i.e. read-write of one part of the memory while preparing another part
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40618—Refresh operations over multiple banks or interleaving
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1063—Control signal output circuits, e.g. status or busy flags, feedback command signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/109—Control signal input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- Memory System (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16346199A JP4106811B2 (ja) | 1999-06-10 | 1999-06-10 | 半導体記憶装置及び電子装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW468184B true TW468184B (en) | 2001-12-11 |
Family
ID=15774329
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW089107437A TW468184B (en) | 1999-06-10 | 2000-04-20 | Semiconductor memory device and electronic apparatus |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US6535950B1 (enExample) |
| EP (1) | EP1061523B1 (enExample) |
| JP (1) | JP4106811B2 (enExample) |
| KR (2) | KR100607918B1 (enExample) |
| DE (1) | DE60043326D1 (enExample) |
| TW (1) | TW468184B (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100550197C (zh) * | 2002-09-20 | 2009-10-14 | 富士通微电子株式会社 | 半导体存储器 |
Families Citing this family (59)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3624849B2 (ja) | 2001-04-02 | 2005-03-02 | セイコーエプソン株式会社 | 半導体装置、そのリフレッシュ方法、メモリシステムおよび電子機器 |
| JP4712214B2 (ja) * | 2001-04-09 | 2011-06-29 | 富士通セミコンダクター株式会社 | 半導体メモリの動作制御方法および半導体メモリ |
| JP2003228511A (ja) * | 2002-02-04 | 2003-08-15 | Elpida Memory Inc | データ書込方法及びメモリシステム |
| US7043599B1 (en) | 2002-06-20 | 2006-05-09 | Rambus Inc. | Dynamic memory supporting simultaneous refresh and data-access transactions |
| KR100455393B1 (ko) * | 2002-08-12 | 2004-11-06 | 삼성전자주식회사 | 리프레시 플래그를 발생시키는 반도체 메모리 장치 및반도체 메모리 시스템. |
| WO2005041201A1 (ja) * | 2003-10-24 | 2005-05-06 | International Business Machines Corporation | 半導体記憶装置及びそのリフレッシュ方法 |
| KR20060009446A (ko) * | 2004-07-22 | 2006-02-01 | 삼성전자주식회사 | 프로세서의 오동작을 방지할 수 있는 정보 처리 장치 |
| JP4562468B2 (ja) * | 2004-09-13 | 2010-10-13 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| KR100574989B1 (ko) * | 2004-11-04 | 2006-05-02 | 삼성전자주식회사 | 데이터 스트로브 버스라인의 효율을 향상시키는메모리장치 및 이를 구비하는 메모리 시스템, 및 데이터스트로브 신호 제어방법 |
| JPWO2006080065A1 (ja) | 2005-01-27 | 2008-06-19 | スパンション エルエルシー | 記憶装置、およびその制御方法 |
| JP4756581B2 (ja) * | 2005-07-21 | 2011-08-24 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US20070073874A1 (en) * | 2005-09-07 | 2007-03-29 | Ace Comm | Consumer configurable mobile communication solution |
| JP2007115087A (ja) * | 2005-10-21 | 2007-05-10 | Oki Electric Ind Co Ltd | 半導体装置 |
| US20080313364A1 (en) | 2006-12-06 | 2008-12-18 | David Flynn | Apparatus, system, and method for remote direct memory access to a solid-state storage device |
| US7797511B2 (en) * | 2007-01-05 | 2010-09-14 | Qimonda North America Corp. | Memory refresh system and method |
| US8767450B2 (en) * | 2007-08-21 | 2014-07-01 | Samsung Electronics Co., Ltd. | Memory controllers to refresh memory sectors in response to writing signals and memory systems including the same |
| KR20100134375A (ko) * | 2009-06-15 | 2010-12-23 | 삼성전자주식회사 | 리프레쉬 동작을 수행하는 메모리 시스템 |
| US7836226B2 (en) | 2007-12-06 | 2010-11-16 | Fusion-Io, Inc. | Apparatus, system, and method for coordinating storage requests in a multi-processor/multi-thread environment |
| US8064250B2 (en) | 2008-12-16 | 2011-11-22 | Micron Technology, Inc. | Providing a ready-busy signal from a non-volatile memory device to a memory controller |
| US8572333B2 (en) * | 2008-12-30 | 2013-10-29 | Micron Technology, Inc. | Non-volatile memory with extended operating temperature range |
| WO2011031900A2 (en) | 2009-09-09 | 2011-03-17 | Fusion-Io, Inc. | Apparatus, system, and method for power reduction management in a storage device |
| US9021158B2 (en) | 2009-09-09 | 2015-04-28 | SanDisk Technologies, Inc. | Program suspend/resume for memory |
| US9223514B2 (en) | 2009-09-09 | 2015-12-29 | SanDisk Technologies, Inc. | Erase suspend/resume for memory |
| US8984216B2 (en) | 2010-09-09 | 2015-03-17 | Fusion-Io, Llc | Apparatus, system, and method for managing lifetime of a storage device |
| US10817502B2 (en) | 2010-12-13 | 2020-10-27 | Sandisk Technologies Llc | Persistent memory management |
| US10817421B2 (en) | 2010-12-13 | 2020-10-27 | Sandisk Technologies Llc | Persistent data structures |
| US9208071B2 (en) | 2010-12-13 | 2015-12-08 | SanDisk Technologies, Inc. | Apparatus, system, and method for accessing memory |
| US9218278B2 (en) | 2010-12-13 | 2015-12-22 | SanDisk Technologies, Inc. | Auto-commit memory |
| WO2012109677A2 (en) * | 2011-02-11 | 2012-08-16 | Fusion-Io, Inc. | Apparatus, system, and method for managing operations for data storage media |
| US9911485B2 (en) * | 2013-11-11 | 2018-03-06 | Qualcomm Incorporated | Method and apparatus for refreshing a memory cell |
| US9666244B2 (en) | 2014-03-01 | 2017-05-30 | Fusion-Io, Inc. | Dividing a storage procedure |
| KR20160063726A (ko) * | 2014-11-27 | 2016-06-07 | 에스케이하이닉스 주식회사 | 메모리 장치 및 이를 포함하는 메모리 시스템 |
| US9933950B2 (en) | 2015-01-16 | 2018-04-03 | Sandisk Technologies Llc | Storage operation interrupt |
| KR102384962B1 (ko) * | 2015-11-27 | 2022-04-11 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
| DE102017106713B4 (de) * | 2016-04-20 | 2025-10-02 | Samsung Electronics Co., Ltd. | Rechensystem, nichtflüchtiges Speichermodul und Verfahren zum Betreiben einer Speichervorrichtung |
| US10490251B2 (en) | 2017-01-30 | 2019-11-26 | Micron Technology, Inc. | Apparatuses and methods for distributing row hammer refresh events across a memory device |
| US11017833B2 (en) | 2018-05-24 | 2021-05-25 | Micron Technology, Inc. | Apparatuses and methods for pure-time, self adopt sampling for row hammer refresh sampling |
| US10685696B2 (en) | 2018-10-31 | 2020-06-16 | Micron Technology, Inc. | Apparatuses and methods for access based refresh timing |
| CN113168861B (zh) | 2018-12-03 | 2024-05-14 | 美光科技公司 | 执行行锤刷新操作的半导体装置 |
| CN117198356A (zh) | 2018-12-21 | 2023-12-08 | 美光科技公司 | 用于目标刷新操作的时序交错的设备和方法 |
| US10957377B2 (en) | 2018-12-26 | 2021-03-23 | Micron Technology, Inc. | Apparatuses and methods for distributed targeted refresh operations |
| JP6894459B2 (ja) * | 2019-02-25 | 2021-06-30 | 華邦電子股▲ふん▼有限公司Ｗｉｎｂｏｎｄ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏｒｐ． | 疑似スタティックランダムアクセスメモリとその動作方法 |
| US11615831B2 (en) | 2019-02-26 | 2023-03-28 | Micron Technology, Inc. | Apparatuses and methods for memory mat refresh sequencing |
| US11227649B2 (en) | 2019-04-04 | 2022-01-18 | Micron Technology, Inc. | Apparatuses and methods for staggered timing of targeted refresh operations |
| US11069393B2 (en) | 2019-06-04 | 2021-07-20 | Micron Technology, Inc. | Apparatuses and methods for controlling steal rates |
| US10978132B2 (en) | 2019-06-05 | 2021-04-13 | Micron Technology, Inc. | Apparatuses and methods for staggered timing of skipped refresh operations |
| US11302374B2 (en) | 2019-08-23 | 2022-04-12 | Micron Technology, Inc. | Apparatuses and methods for dynamic refresh allocation |
| US11302377B2 (en) | 2019-10-16 | 2022-04-12 | Micron Technology, Inc. | Apparatuses and methods for dynamic targeted refresh steals |
| US11309010B2 (en) * | 2020-08-14 | 2022-04-19 | Micron Technology, Inc. | Apparatuses, systems, and methods for memory directed access pause |
| US11348631B2 (en) | 2020-08-19 | 2022-05-31 | Micron Technology, Inc. | Apparatuses, systems, and methods for identifying victim rows in a memory device which cannot be simultaneously refreshed |
| US11380382B2 (en) | 2020-08-19 | 2022-07-05 | Micron Technology, Inc. | Refresh logic circuit layout having aggressor detector circuit sampling circuit and row hammer refresh control circuit |
| US11430504B2 (en) | 2020-08-27 | 2022-08-30 | Micron Technology, Inc. | Row clear features for memory devices and associated methods and systems |
| US11557331B2 (en) | 2020-09-23 | 2023-01-17 | Micron Technology, Inc. | Apparatuses and methods for controlling refresh operations |
| US11222686B1 (en) | 2020-11-12 | 2022-01-11 | Micron Technology, Inc. | Apparatuses and methods for controlling refresh timing |
| US11264079B1 (en) | 2020-12-18 | 2022-03-01 | Micron Technology, Inc. | Apparatuses and methods for row hammer based cache lockdown |
| US11972788B2 (en) * | 2021-03-11 | 2024-04-30 | Micron Technology, Inc. | Apparatuses, systems, and methods for controller directed targeted refresh operations based on sampling command |
| US12112787B2 (en) | 2022-04-28 | 2024-10-08 | Micron Technology, Inc. | Apparatuses and methods for access based targeted refresh operations |
| US12125514B2 (en) | 2022-04-28 | 2024-10-22 | Micron Technology, Inc. | Apparatuses and methods for access based refresh operations |
| US12436854B2 (en) * | 2023-09-20 | 2025-10-07 | Nanya Technology Corporation | Memory device and control method for performing row hammer protection |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4145739A (en) * | 1977-06-20 | 1979-03-20 | Wang Laboratories, Inc. | Distributed data processing system |
| JPS6079593A (ja) | 1983-10-07 | 1985-05-07 | Hitachi Ltd | 半導体集積回路システム |
| US4639890A (en) * | 1983-12-30 | 1987-01-27 | Texas Instruments Incorporated | Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers |
| US4758993A (en) | 1984-11-19 | 1988-07-19 | Fujitsu Limited | Random access memory device formed on a semiconductor substrate having an array of memory cells divided into sub-arrays |
| US4829467A (en) | 1984-12-21 | 1989-05-09 | Canon Kabushiki Kaisha | Memory controller including a priority order determination circuit |
| US4691303A (en) | 1985-10-31 | 1987-09-01 | Sperry Corporation | Refresh system for multi-bank semiconductor memory |
| JPH07107793B2 (ja) | 1987-11-10 | 1995-11-15 | 株式会社東芝 | 仮想型スタティック半導体記憶装置及びこの記憶装置を用いたシステム |
| FR2644260B1 (fr) | 1989-03-08 | 1993-10-29 | Nec Corp | Dispositif de commande d'acces en memoire pouvant proceder a une commande simple |
| JP2827361B2 (ja) | 1989-12-04 | 1998-11-25 | 日本電気株式会社 | 半導体メモリ装置 |
| US5289413A (en) * | 1990-06-08 | 1994-02-22 | Kabushiki Kaisha Toshiba | Dynamic semiconductor memory device with high-speed serial-accessing column decoder |
| DE69324508T2 (de) * | 1992-01-22 | 1999-12-23 | Enhanced Memory Systems, Inc. | DRAM mit integrierten Registern |
| GB2265035B (en) | 1992-03-12 | 1995-11-22 | Apple Computer | Method and apparatus for improved dram refresh operations |
| US5519839A (en) | 1992-10-02 | 1996-05-21 | Compaq Computer Corp. | Double buffering operations between the memory bus and the expansion bus of a computer system |
| US5617367A (en) * | 1993-09-01 | 1997-04-01 | Micron Technology, Inc. | Controlling synchronous serial access to a multiport memory |
| KR970008412B1 (ko) * | 1993-10-15 | 1997-05-23 | 엘지반도체 주식회사 | 디지탈 영상신호 처리용 메모리 시스템 |
| KR0171930B1 (ko) * | 1993-12-15 | 1999-03-30 | 모리시다 요이치 | 반도체 메모리, 동화기억 메모리, 동화기억장치, 동화표시장치, 정지화기억 메모리 및 전자노트 |
| US5634073A (en) | 1994-10-14 | 1997-05-27 | Compaq Computer Corporation | System having a plurality of posting queues associated with different types of write operations for selectively checking one queue based upon type of read operation |
| JPH08129882A (ja) | 1994-10-31 | 1996-05-21 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5796671A (en) * | 1996-03-01 | 1998-08-18 | Wahlstrom; Sven E. | Dynamic random access memory |
| FR2749681B1 (fr) | 1996-06-10 | 1998-07-10 | Bull Sa | Circuit pour transborder des donnees entre memoires distantes et calculateur comprenant un tel circuit |
| JPH10247384A (ja) | 1997-03-03 | 1998-09-14 | Mitsubishi Electric Corp | 同期型半導体記憶装置 |
| US6396744B1 (en) * | 2000-04-25 | 2002-05-28 | Multi Level Memory Technology | Flash memory with dynamic refresh |
| US6515914B2 (en) * | 2001-03-21 | 2003-02-04 | Micron Technology, Inc. | Memory device and method having data path with multiple prefetch I/O configurations |
-
1999
- 1999-06-10 JP JP16346199A patent/JP4106811B2/ja not_active Expired - Fee Related
-
2000
- 2000-03-29 US US09/536,988 patent/US6535950B1/en not_active Expired - Lifetime
- 2000-03-31 EP EP00302717A patent/EP1061523B1/en not_active Expired - Lifetime
- 2000-03-31 DE DE60043326T patent/DE60043326D1/de not_active Expired - Lifetime
- 2000-04-20 KR KR1020000020942A patent/KR100607918B1/ko not_active Expired - Fee Related
- 2000-04-20 TW TW089107437A patent/TW468184B/zh not_active IP Right Cessation
-
2003
- 2003-01-29 US US10/352,985 patent/US6724675B2/en not_active Expired - Lifetime
-
2006
- 2006-04-26 KR KR1020060037623A patent/KR100609677B1/ko not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100550197C (zh) * | 2002-09-20 | 2009-10-14 | 富士通微电子株式会社 | 半导体存储器 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20060080559A (ko) | 2006-07-10 |
| KR20010006998A (ko) | 2001-01-26 |
| EP1061523A1 (en) | 2000-12-20 |
| US20030115405A1 (en) | 2003-06-19 |
| US6724675B2 (en) | 2004-04-20 |
| KR100607918B1 (ko) | 2006-08-04 |
| DE60043326D1 (de) | 2009-12-31 |
| EP1061523B1 (en) | 2009-11-18 |
| KR100609677B1 (ko) | 2006-08-08 |
| JP2000353382A (ja) | 2000-12-19 |
| US6535950B1 (en) | 2003-03-18 |
| JP4106811B2 (ja) | 2008-06-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW468184B (en) | Semiconductor memory device and electronic apparatus | |
| US6438055B1 (en) | Dynamic memory circuit with automatic refresh function | |
| TW578167B (en) | A destructive read architecture for dynamic random access memories | |
| TWI303422B (en) | Dynamic semiconductor memory with improved refresh mechanism | |
| US8547776B2 (en) | Multi-port memory based on DRAM core | |
| JP4229674B2 (ja) | 半導体記憶装置及びその制御方法 | |
| JP4187346B2 (ja) | 同期型半導体記憶装置 | |
| KR100252043B1 (ko) | 반도체 메모리 장치의 칼럼 선택 신호 제어기 및 칼럼 선택제어 방법 | |
| TW550596B (en) | Synchronous semiconductor memory device for controlling cell operations by using frequency information of a clock signal | |
| US20080239854A1 (en) | Semiconductor memory, system, and operating method of semiconductor memory | |
| WO2003056563A1 (en) | Semiconductor storage device and refresh control method thereof | |
| JP3277603B2 (ja) | 半導体記憶装置 | |
| KR100620645B1 (ko) | 동기 및 비동기 병용 모드 레지스터 세트를 포함하는ｐｓｒａｍ | |
| TW200402056A (en) | Semiconductor memory | |
| WO2005004164A1 (ja) | 半導体記憶装置 | |
| US6192003B1 (en) | Semiconductor memory device using a relatively low-speed clock frequency and capable of latching a row address and a column address with one clock signal and performing a page operation | |
| JP2003187575A (ja) | 半導体記憶装置のリフレッシュ制御方法、及び該制御方法を有する半導体記憶装置 | |
| JP4834212B2 (ja) | 半導体メモリ素子 | |
| JP2004095136A (ja) | 不揮発性メモリチップの低電圧感知手段及び感知方法また、その感知手段を用いた低電圧感知システム | |
| JP4440118B2 (ja) | 半導体メモリ | |
| JP5261888B2 (ja) | 半導体記憶装置 | |
| US6631094B2 (en) | Semiconductor memory device having SRAM interface | |
| TW529026B (en) | Synchronous dynamic random access memory semiconductor device having write-interrupt write function | |
| TWI323462B (en) | Operating method for dynamic random access memory | |
| US7668032B2 (en) | Refresh operation of memory device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |