TW441057B - A capsule for semiconductor components - Google Patents

A capsule for semiconductor components Download PDF

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Publication number
TW441057B
TW441057B TW088110658A TW88110658A TW441057B TW 441057 B TW441057 B TW 441057B TW 088110658 A TW088110658 A TW 088110658A TW 88110658 A TW88110658 A TW 88110658A TW 441057 B TW441057 B TW 441057B
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Taiwan
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flange
electrically insulating
package
insulating base
item
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TW088110658A
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English (en)
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Lars-Anders Olofsson
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Ericsson Telefon Ab L M
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    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
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    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6644Packaging aspects of high-frequency amplifiers
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0554External layer
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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    • H01L2224/4912Layout
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    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
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    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/11Device type
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    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

B7 五'發明説明(1) 二本發明有關-種半導體元件的封裝件,特料用於高頻 高功率的電晶冑’像是⑶金屬氧化半導體電晶體,必須 有極大的傳熱性,而且能夠表面接合的。 發明背景 高頻高功率電晶體的用途在於行動電話的無線電基地加 強功率的發射器’或是高頻廣播發射器。例如:數位化收 音機和類比電視機的地面發射器主要有兩種’就是雙極式 和LD金屬氧化半導體型。雙極式電晶體必須固定在電絕 緣體上,而LD金屬氧化半導體型電晶體可以固定在導電 面的下層。 L D金屬氧化半導體電晶體的封裝技術特別受到陶製電 絕緣器的助益而發展。陶製電絕緣器是以裝框的形式將電 晶體放入框中,而LD金屬氧化半導體電晶體正是固定在 稱為凸緣’’的導電體上,連接著電絕緣外框的連接器是 用至少一個電路板和電晶體之間的導體。陶製絕緣器也可 以建構在鋁的材質上,因為熱流不會外洩通過陶質材料。 經濟部中央樣準局員工消費合作社印裝 已知技術中一個存在的問題是凸緣必須含有鎢化銅(一 種銅和鎢的化合物),以能有效地銜接吻合陶質的線性膨 脹和凸緣的線性膨脹。這種鎢化鋼的凸緣相當昂貴,而且 導電性只有銅的一半。另一個問題則是在製造封裝件的過 程中,電絕緣框變得脆弱且容易碎裂,主要是因為電絕緣 框和凸緣具有不同的熱膨脹性《結果使得製成良率很低, 導玫封裝件的成品價格很高。此外,目前功率電晶體封裝 件還無法做到表面固定= ^4- 本纸張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 4 410 5 7 A7 經濟部中央樣準局員工消费合作社印衷 B7 五、發明説明(2 ) 發明概述 目前關於高頻率電晶體封裝件的一個問題是,封裝件内 包含一個狭窄的電絕緣陶質框’這種電絕緣陶質框很容易 碎裂。 另一個問題是稱為“凸緣”的部份必須使用特殊材質,像 疋鴒化銅’以便凸緣的線性膨脹能夠吻合陶質框的線性膨 脹。 然而,還有一個難題是鶴化鋼的導電性並不令人滿意。 本發明是由一種封裝件來解決這些問題。這種封裝件適 用於至少一個帶有導電和傳熱凸緣的高頻率高功率電晶體 晶片’還包括了至少兩個電絕緣基座,至少兩個電連接 器,以及一個覆蓋物。其中高功率電晶體晶片和電絕緣基 座安裝在凸緣上,並且電絕緣基座上裝有電連接器,而電 絕緣基座是局部封住晶片。 凸緣可以由銅製造。一個較佳具體實施例中,當本發明 以表面固定時’電絕緣基座安置在凸緣的至少兩面邊緣 上。而且電絕緣基座之一上層面施以金屬化,該金屬化部 份並繞過一邊緣而向下從其中向上的一面延著一延伸到其 一下層面。 凸緣材質和電絕緣基座材質之間的線性膨脹差異可以稍 大’但不致於造成基座碎裂,原因在於基座可僅限於小尺 寸。 本發明的目的在於提供一種具有較好傳熱效應,又比先 前技藝中之同類元件較較宜的封裝件,而且可以表面接 -5- 本纸择尺度適用中國國豕標聲(CNS } A4規格(210X 297公變) ---------------訂 (請先Μ讀背面之注意事項再填寫本頁) f 4 4 10 5 7 Α7 Β7 五、發明説明(3 ) 經濟部中央標準局員工消费合作社印製 α 本發明的一個優點是銅可使用於凸緣中。 另一個優點則是電絕緣基座在與凸緣加熱接合後不會導 致龜裂現象。 Β 現在就參考具體實施例的例證和附帶圖示對本發明詳加 說明。 附圖之簡單說明 第1圖是一個先前封裝件去除覆蓋物的側面剖視圖。 第2圖是第1圖之去除覆蓋物封裝件的俯視圖。 第3圖是另一個具體實施例中封裝件去除覆蓋物的側面 剖視圖。 第4圖是本發明另一個封裝件去除覆蓋物的側面剖視 圖。 第5圖展示的是第3和4圖中去除覆蓋物封裝件的俯視 圖。 第6圖展示的是以上圖式中去除覆蓋物封裝件的另一個 實施例13 第7圖是本發明另一個具體實施例中無覆蓋物之封裝件 的侧面剖視圖^ 第8圖本發明之無覆蓋物之封裝件又一實施例的側面剖 視圖· 元件符號說明: 1 凸緣 10 15電絕緣基座 16電連接器 (請先閲讀背面之注意事項再填寫本頁)
L 6- 本紙張尺度適用中國國家標準(CNS ) Α4規格(2Ι0Χ 297公釐) 441 05 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明(4 ) 17高頻率電晶體晶片 20孔洞 18導電器 25通孔 較佳具體實施例的詳細說明 第1圖是一個先前封裝件去除覆蓋物的側面剖视圖。這 種封裝件1包括一個凸緣丨〇,一個電絕緣基座丨5,兩個電 連接器1 6 ’和一個帶有連接導電器1 8的高頻率電晶體晶 片1 7。凸緣1 〇是以導電材料製成,其線性膨脹係數可適 應於電絕緣基座1 5的材質。雖然圖中沒有顯示出來,但 封裝件亦包含一覆蓋物。 第2圖展示第1圖中先前封裝件的俯視圖。從此圖的視 野角度可以得到證實的是電絕緣基座1 5係以其類似外框 的結構’圍著高頻率電晶體晶片i 7而安裝,同時可以看 到凸緣的郅份還有一對孔洞2 〇,這一對孔洞配合一對螺 絲釘或鉚釘可用來連接凸緣丨〇和一冷卻器„ 第3圖是一個創新的封裝件去除覆蓋物的側面剖視圖。 本具體實施例中的電絕緣基座i 5是裝置在凸緣丨〇侧面邊 緣的兩個凹槽内。就如第3圖明顯所示,電絕緣基座1 5可 以和凸緣1 〇 —樣高’藉以彼此相連接。第3圖的具體實施 例中’電絕緣基座提供的電連接器丨6是從向上層面、繞 過侧面邊緣到向下層面,以金屬化的方式形成。如此可在 封裝件上下層面間得到低感應的電連接器。 第4圖是第3圖具體實施例之封裝件的側面圖。 第5圖展示的是第3和第4圖具體實施例之封裝件的俯視 圖。從第4及第5圖清晰可見,在金屬化區域和凸緣1 〇之 -7- 本紙乐尺度通用中國國家標準(CNS ) A4規格(210X29?公釐) ---------展------訂 {請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 44105? A7 --------B7_ _ 五、發明説明(5 ) 間留有一條溝’以避免彼此間的接觸。電絕緣基座可以藉 由習知金屬化方式而得,在此就不詳細敘述了。 第6圖展τκ創新封裝件去除覆蓋物的另一個具體實施例 的俯視圖。本例證中電絕緣基座是沿著凸緣的側面邊緣之 全長而分布’而不是在該局部凹槽内。從第5圖可見到的 是’電絕緣基座上形成電連接器的金屬化區域可以不完 整’也就是說表面不需要完全覆蓋住,然而金屬化區域不 能接觸到凸緣1 0。 第7圖是另一個創新的封裝件去除覆蓋物的側面剖視 圖。本具體實施例中,對於電絕緣基座1 5以及用以和基 座相連接的凸緣邊緣略修改,目的在於簡化製造過程。第 7圖的具體實施例中’凸緣丨〇的連接表面和電絕緣基座1 5 彼此採用一種相互配合的階梯式的結構,如此—來,簡化 了凸緣和基座的接合’而且下層面也可以是平的。 為增進封裝件的效能’可置入貫穿通過電絕緣基座i 5 的通孔25。正如第8圖所示,這種通孔將會降低電連接器 中一連串的感應。 凸緣也可以附帶幾個用以固定電路板或冷卻器的螺絲孔 2 0或開孔,而且凸緣也可選擇接合一電路板,如此就不 需要螺絲孔了。 每一個電絕緣基座可以有一個或多個電連接器丨6。 銅、銅金剛石化合物、銅鉬銅化合物、銅鎢銅化合物都 是具有良好傳熱性,方便取得並適合做凸緣的材料。本發 明並不限於已敘述和舉例的具體實施例,在下列中請專利 -8- 本紙乐尺度適用中國國家標準(CNS ) A4規格(210x297公楚) (請先閲讀背面之注意事項再填寫本頁) 訂 A7 ’ …Q 5 7 B7 五、發明説明(6 ) 範圍内可作適度修改調整。 (請先閱讀背面之注意事項再填寫本頁) ,i衣 訂 經濟部令夹樣华局員工消f合作社卬製 本紙伕尺度適用中國國家標準(CNS ) A4規格(210X2?7公釐)

Claims (1)

  1. 申請專利範圍 經濟部中央榡準局負工消f合作社印製 1· 一種適用於至少—個合 . 円頻範圍的高功率電晶體晶片(1 7) 封取件,匕括了 —個I雷& # A U 個電絕緣基座(…至Λ 的凸緣(10),至少兩 覆罢物:至少兩個電連接器(16),和一個 上了衆问功率電晶體晶片(1 7)安置在凸緣(1 0) ' + 要器(16)安置在電絕緣基座(I5)上,其特 徵為電絕緣基座虚凸’、 曰片η7、八广凸..豪(10)相連接,且和高功率電晶體 曰er片(17)刀離而沒有電通路。 2.如申請專利範園第1項之封裳件 成的。 3,如申請專利範圍第1項之封裝件 由銅韵銅化合物、銅鎢銅化合物 组成。 4. 如申請專利範圍第2或3項之封裝件,其特徵為電絕緣 基厓(1 5)係安置在位於凸緣側面邊緣之至少一 一凹槽内。 5. 如申請專利範圍第2或3項之封裝件,其特徵為電絕緣 基座(1 5 )係延著該凸緣之側面邊緣之全長而分布。 6. 如申請專利範圍第!或2項之封裝件,其特徵為電絕緣 基厘(15)是從上層面繞過侧面邊緣,到下層面皆施以 屬化而得。 ’ 7. 如申請專利範圍第1項之封裝件,其特徵為電絕 (15)包括導電介質,其是從電絕緣基座(15)的上層面 延伸到下層面。 8. 如申請專利範圍第7項之封裝件,其特徵為連接凸緣 其特徵為凸緣是銅製 其特徵為凸緣(1 0 )可 或是銅金剛石化合物 (請先閲讀背面之注意事項再填寫本頁) ---- 訂 . --. -10 本紙張尺度適用令國國家標準(CNS ) A4规格(210Xm公釐) 忒41 05 7 A8 B8 C8 D8 申請專利範圍 (1 0)的電絕緣基座(丨5 )之側面邊緣,具有圩以適應並 銜接凸緣(10)側面邊緣之形狀及大小的幾何形狀,如此 可使凸緣的上下層面’以及電絕緣基座的上下層面,各 自做好準備進入共存的同—平面層。 9.如申請專利範圍第8項之封裝件, 為階梯狀。 ,、特徵為孩幾何結構 请先閲讀背面之注意事項再填寫本頁j --:人 經濟部中央標準局貝工消費合作杜印策 -11 - 本紙伕足度逋用中國國家標準(CNS )八4况格(2I0X297公釐)
TW088110658A 1998-07-08 1999-06-24 A capsule for semiconductor components TW441057B (en)

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WO2000003435A2 (en) 2000-01-20
SE512710C2 (sv) 2000-05-02
CN1192428C (zh) 2005-03-09
EP1116271A2 (en) 2001-07-18
SE9802453D0 (sv) 1998-07-08
US6465883B2 (en) 2002-10-15
US20020014694A1 (en) 2002-02-07
SE9802453L (sv) 2000-01-09
AU4948199A (en) 2000-02-01
HK1039403A1 (zh) 2002-04-19
CN1308773A (zh) 2001-08-15
WO2000003435A3 (en) 2000-02-24
CA2336936A1 (en) 2000-01-20
KR20010071766A (ko) 2001-07-31
JP2002520855A (ja) 2002-07-09

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