TW368695B - Method of producing silicon layer having surface controlled to be uneven - Google Patents

Method of producing silicon layer having surface controlled to be uneven

Info

Publication number
TW368695B
TW368695B TW085102682A TW85102682A TW368695B TW 368695 B TW368695 B TW 368695B TW 085102682 A TW085102682 A TW 085102682A TW 85102682 A TW85102682 A TW 85102682A TW 368695 B TW368695 B TW 368695B
Authority
TW
Taiwan
Prior art keywords
silicon layer
uneven
producing silicon
surface controlled
gas
Prior art date
Application number
TW085102682A
Other languages
English (en)
Inventor
Hirohito Watanabe
Ichiro Honma
Original Assignee
Nec Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Electronics Corp filed Critical Nec Electronics Corp
Application granted granted Critical
Publication of TW368695B publication Critical patent/TW368695B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/84—Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Chemical Vapour Deposition (AREA)
  • Photovoltaic Devices (AREA)
TW085102682A 1995-03-06 1996-03-05 Method of producing silicon layer having surface controlled to be uneven TW368695B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7227695 1995-03-06
JP7284485A JP2833545B2 (ja) 1995-03-06 1995-10-05 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW368695B true TW368695B (en) 1999-09-01

Family

ID=26413416

Family Applications (2)

Application Number Title Priority Date Filing Date
TW085102682A TW368695B (en) 1995-03-06 1996-03-05 Method of producing silicon layer having surface controlled to be uneven
TW085114573A TW376545B (en) 1995-03-06 1996-03-05 Method of producing silicon layer having surface controlling to be even

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW085114573A TW376545B (en) 1995-03-06 1996-03-05 Method of producing silicon layer having surface controlling to be even

Country Status (5)

Country Link
US (2) US5910019A (zh)
EP (1) EP0731491A3 (zh)
JP (1) JP2833545B2 (zh)
KR (1) KR100221755B1 (zh)
TW (2) TW368695B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI470805B (zh) * 2007-10-05 2015-01-21 Semiconductor Energy Lab 薄膜電晶體，具有該薄膜電晶體的顯示裝置，和其製造方法
TWI483400B (zh) * 2007-10-05 2015-05-01 Semiconductor Energy Lab 薄膜電晶體，具有該薄膜電晶體的顯示裝置，和其製造方法

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JP2982739B2 (ja) * 1997-04-22 1999-11-29 日本電気株式会社 半導体装置の製造方法
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US6255159B1 (en) 1997-07-14 2001-07-03 Micron Technology, Inc. Method to form hemispherical grained polysilicon
JPH1140763A (ja) * 1997-07-15 1999-02-12 Nec Corp 半導体装置の製造方法
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EP0902462B1 (en) * 1997-09-08 2006-08-30 Samsung Electronics Co., Ltd. A method for manufacturing a capacitor lower electrode of a semiconductor memory device
DE69734877T2 (de) * 1997-09-10 2006-09-14 Samsung Electronics Co., Ltd., Suwon Vorrichtung zur Herstellung von einem Halbleiter-Bauelement und ein diese Vorrichtung verwendendes Verfahren zur Herstellung einer Polysilicium-Schicht
JP3180740B2 (ja) 1997-11-11 2001-06-25 日本電気株式会社 キャパシタの製造方法
JPH11162876A (ja) 1997-11-28 1999-06-18 Nec Corp 半導体装置の製造装置及び製造方法
JPH11233735A (ja) 1998-02-16 1999-08-27 Nec Corp 下部電極構造、それを用いたキャパシタ及びその形成方法
JP3244049B2 (ja) * 1998-05-20 2002-01-07 日本電気株式会社 半導体装置の製造方法
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JP3468347B2 (ja) * 1998-06-22 2003-11-17 日本エー・エス・エム株式会社 半導体素子の製造方法
KR100290835B1 (ko) * 1998-06-23 2001-07-12 윤종용 반도체소자의제조방법
KR100282709B1 (ko) * 1998-08-28 2001-03-02 윤종용 반구형 실리콘을 이용한 캐패시터의 제조 방법
US6127221A (en) * 1998-09-10 2000-10-03 Vanguard International Semiconductor Corporation In situ, one step, formation of selective hemispherical grain silicon layer, and a nitride-oxide dielectric capacitor layer, for a DRAM application
US6291294B1 (en) * 1998-10-13 2001-09-18 Taiwan Semiconductor Manufacturing Corporation Method for making a stack bottom storage node having reduced crystallization of amorphous polysilicon
JP3125770B2 (ja) * 1998-11-11 2001-01-22 日本電気株式会社 容量素子の形成方法
US6959384B1 (en) * 1999-12-14 2005-10-25 Intertrust Technologies Corporation Systems and methods for authenticating and protecting the integrity of data streams and other data
KR100587046B1 (ko) * 2000-05-31 2006-06-07 주식회사 하이닉스반도체 반도체 소자의 전하저장 전극 제조 방법
US6743697B2 (en) * 2000-06-30 2004-06-01 Intel Corporation Thin silicon circuits and method for making the same
US6406981B1 (en) * 2000-06-30 2002-06-18 Intel Corporation Method for the manufacture of semiconductor devices and circuits
US8225414B2 (en) * 2000-08-28 2012-07-17 Contentguard Holdings, Inc. Method and apparatus for identifying installed software and regulating access to content
AUPQ975900A0 (en) * 2000-08-30 2000-09-21 Unisearch Limited A process for the fabrication of a quantum computer
KR100347764B1 (ko) * 2000-10-19 2002-08-09 삼성전자 주식회사 주사전자현미경 이미지를 이용한 반도체 웨이퍼 표면의 입자성장도 수치적 분석방법과 이를 위한 장치
JP4876306B2 (ja) * 2000-10-19 2012-02-15 ソニー株式会社 半導体装置の製造方法
US6459482B1 (en) 2000-10-24 2002-10-01 Advanced Micro Devices, Inc. Grainless material for calibration sample
US6746933B1 (en) * 2001-10-26 2004-06-08 International Business Machines Corporation Pitcher-shaped active area for field effect transistor and method of forming same
US6887755B2 (en) * 2003-09-05 2005-05-03 Micron Technology, Inc. Methods of forming rugged silicon-containing surfaces
US7341907B2 (en) * 2005-04-05 2008-03-11 Applied Materials, Inc. Single wafer thermal CVD processes for hemispherical grained silicon and nano-crystalline grain-sized polysilicon
US20060276038A1 (en) * 2005-06-03 2006-12-07 Pun Arthur F Thermal desorption of oxide from surfaces
JP2007053279A (ja) * 2005-08-19 2007-03-01 Elpida Memory Inc 半導体装置の製造方法
KR100691958B1 (ko) * 2005-10-13 2007-03-09 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법
US20080227267A1 (en) * 2007-03-14 2008-09-18 Theodorus Gerardus Maria Oosterlaken Stop mechanism for trench reshaping process
JP5311957B2 (ja) * 2007-10-23 2013-10-09 株式会社半導体エネルギー研究所 表示装置及びその作製方法
JP5311955B2 (ja) * 2007-11-01 2013-10-09 株式会社半導体エネルギー研究所 表示装置の作製方法
KR101610260B1 (ko) * 2008-12-15 2016-04-08 삼성전자주식회사 전자빔 어닐링 장치 및 이를 이용한 어닐링 방법
US8263988B2 (en) * 2010-07-16 2012-09-11 Micron Technology, Inc. Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing
KR20120064364A (ko) * 2010-12-09 2012-06-19 삼성전자주식회사 태양 전지의 제조 방법
US8669184B2 (en) * 2011-01-24 2014-03-11 Macronix International Co., Ltd. Method for improving flatness of a layer deposited on polycrystalline layer
CN103681244B (zh) * 2013-12-25 2016-09-14 深圳市华星光电技术有限公司 低温多晶硅薄膜的制备方法及其制作系统
US9837271B2 (en) 2014-07-18 2017-12-05 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US9443730B2 (en) 2014-07-18 2016-09-13 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
JP6545093B2 (ja) * 2015-12-14 2019-07-17 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、基板処理装置およびプログラム
US10460932B2 (en) 2017-03-31 2019-10-29 Asm Ip Holding B.V. Semiconductor device with amorphous silicon filled gaps and methods for forming

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI470805B (zh) * 2007-10-05 2015-01-21 Semiconductor Energy Lab 薄膜電晶體，具有該薄膜電晶體的顯示裝置，和其製造方法
US8945962B2 (en) 2007-10-05 2015-02-03 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor, display device having thin film transistor, and method for manufacturing the same
TWI483400B (zh) * 2007-10-05 2015-05-01 Semiconductor Energy Lab 薄膜電晶體，具有該薄膜電晶體的顯示裝置，和其製造方法

Also Published As

Publication number Publication date
US5910019A (en) 1999-06-08
US5989969A (en) 1999-11-23
JP2833545B2 (ja) 1998-12-09
EP0731491A2 (en) 1996-09-11
EP0731491A3 (en) 2000-09-06
KR100221755B1 (ko) 1999-09-15
JPH08306646A (ja) 1996-11-22
TW376545B (en) 1999-12-11

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