KR960030316A - Soi 기판의 제조방법 - Google Patents

Soi 기판의 제조방법 Download PDF

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Publication number
KR960030316A
KR960030316A KR1019960000293A KR19960000293A KR960030316A KR 960030316 A KR960030316 A KR 960030316A KR 1019960000293 A KR1019960000293 A KR 1019960000293A KR 19960000293 A KR19960000293 A KR 19960000293A KR 960030316 A KR960030316 A KR 960030316A
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South Korea
Prior art keywords
silicon substrate
manufacturing
soi substrate
substrate
silicon
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KR1019960000293A
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English (en)
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KR0182855B1 (ko
Inventor
아쯔시 오구라
Original Assignee
가네꼬 히사시
닛뽕덴끼 가부시끼가이샤
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Publication of KR960030316A publication Critical patent/KR960030316A/ko
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Publication of KR0182855B1 publication Critical patent/KR0182855B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/20—Doping by irradiation with electromagnetic waves or by particle radiation
    • C30B31/22—Doping by irradiation with electromagnetic waves or by particle radiation by ion-implantation
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure

Abstract

본 발명은 (a) 질소이온 또는 산소이온을 실리콘 기판(10,20)에 주입하는 공정과, (b) 상기 실리콘 기판(10,20)을 열처리하는 공정을 포함하는 SOI 기판의 제조방법에 있어서, (c) 상기 실리콘 기판(10,20) 내부의 소망 위치에 결정결함(11,21)을 도입하는 공정을 또한 구비하고, 상기 공정(c)는 상기 공정(a)전에 행하는 것을 특징으로 하는 SOI 기판의 제조방법을 제공한다. 예를 들어, 상기 공정(c)는 산소 이외의 원자를 상기 실리콘 기판(10,20)에 주입하는 공정, 및 상기 실리콘 기판(10,20)을 열처리하는 공정을 포함한다. 또 다른 예에서, 상기 공정(c)는 상기 실리콘 기판(10,20) 상에 에피탁시얼층(24)을 성장하는 공정과, 상기 실리콘 기판(10,20)과 상기 에피탁시얼층(24) 사이의 계면에 미스피트 전위(misfitdislocation)를 형성하는 공정을 포함한다. 본 발명에 따른 방법은 저도우즈의 산소 이온 주입에 의한 SOI 기판 제조를 가능하게 하여 결정결함의 감소와 제조비용의 저하라는 효과를 얻을 수 있다.

Description

SOI 기판의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 제1실시예 및 제2실시예에 따라 수행되는 공정을 도시하는 개략도.

Claims (4)

  1. (a) 질소이온과 산소이온 중 하나를 실리콘 기판(10,20)에 주입하는 공정과, (b) 상기 실리콘 기판(10,20)을 열처리하는 공정을 구비하는 SOI 기판의 제조방법에 있어서, (c) 상기 실리콘 기판(10,20) 내부의 소망 위치에 결정결함(11,21)을 도입하는 공정을 또한 구비하고, 상기 공정(c)는 상기 공정(a)전에 행하는 것을 특징으로 하는 SOI 기판의 제조방법.
  2. 제1항에 있어서, 상기 공정(c)는 실리콘 원자 및 산소 이외의 원자중 하나의 이온을 상기 실리콘 기판(10,20)에 주입하는 공정, 및 상기 실리콘 기판(10,20)을 열처리하는 공정을 구비하는 것을 특징으로 하는 SOI 기판의 제조방법.
  3. 제1항에 있어서, 상기 공정(c)는 상기 실리콘 기판(10,20)상에 에피탁시얼층(24)을 성장하는 공정과, 상기 실리콘 기판(10,20)과 상기 에피탁시얼층(24) 사이의 계면에 미스피트 전위를 형성하는 공정을 구비하는 것을 특징으로하는 SOI 기판의 제조방법.
  4. 제2항에 있어서, 상기 산소 이외의 원자는 보론(B)인 것을 특징으로 하는 SOI 기판의 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960000293A 1995-01-09 1996-01-09 에스오아이 기판의 제조방법 KR0182855B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP95-17480 1995-01-09
JP7017480A JP2666757B2 (ja) 1995-01-09 1995-01-09 Ｓｏｉ基板の製造方法

Publications (2)

Publication Number Publication Date
KR960030316A true KR960030316A (ko) 1996-08-17
KR0182855B1 KR0182855B1 (ko) 1999-04-15

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KR1019960000293A KR0182855B1 (ko) 1995-01-09 1996-01-09 에스오아이 기판의 제조방법

Country Status (3)

Country Link
US (1) US5888297A (ko)
JP (1) JP2666757B2 (ko)
KR (1) KR0182855B1 (ko)

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Publication number Priority date Publication date Assignee Title
KR100300193B1 (ko) * 1997-09-05 2001-10-27 하제준 절연층상에 형성된 실리콘(soi)기판상의 전계방출어레이(fea)제조방법

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US7294561B2 (en) * 2003-08-14 2007-11-13 Ibis Technology Corporation Internal gettering in SIMOX SOI silicon substrates
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US9466729B1 (en) 2015-05-08 2016-10-11 Qualcomm Incorporated Etch stop region based fabrication of bonded semiconductor structures
US9634020B1 (en) 2015-10-07 2017-04-25 Silicon Storage Technology, Inc. Method of making embedded memory device with silicon-on-insulator substrate
FR3048425B1 (fr) 2016-03-07 2021-02-12 Soitec Silicon On Insulator Structure pour dispositif avec microsystemes electromecaniques integres
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Publication number Priority date Publication date Assignee Title
KR100300193B1 (ko) * 1997-09-05 2001-10-27 하제준 절연층상에 형성된 실리콘(soi)기판상의 전계방출어레이(fea)제조방법

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Publication number Publication date
US5888297A (en) 1999-03-30
KR0182855B1 (ko) 1999-04-15
JPH08191140A (ja) 1996-07-23
JP2666757B2 (ja) 1997-10-22

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