JPS56135973A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56135973A JPS56135973A JP3892180A JP3892180A JPS56135973A JP S56135973 A JPS56135973 A JP S56135973A JP 3892180 A JP3892180 A JP 3892180A JP 3892180 A JP3892180 A JP 3892180A JP S56135973 A JPS56135973 A JP S56135973A
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- film
- covered
- oxide film
- nitride film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 3
- 238000000034 method Methods 0.000 abstract 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052739 hydrogen Inorganic materials 0.000 abstract 2
- 239000001257 hydrogen Substances 0.000 abstract 2
- 229910052710 silicon Inorganic materials 0.000 abstract 2
- 239000010703 silicon Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 1
- 239000011521 glass Substances 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To improve memory holding characteristics by a method wherein a silicon oxide film and a silicon nitride film are covered on a silicon substrate, and heat- treated in a hydrogen atmosphere, and further, a polycrystalline silicon film is covered on the silicon nitride film. CONSTITUTION:A thin oxide film 4 is formed after an oxide film 2 for separating elements therebetween is formed on the surface of the P type silicon substrate 1. Then, after the silicon nitride film 5 is piled by a vapor growth method, the heat treatment is applied in the hydrogen atmosphere and in addition, the polycrystalline silicon 6 with is to become a gate by the vapor growth method is formed. Subsequently, a source and drain diffused layer 7 is formed by an ion-implantation and also the polycrystalline silicon 6 is doped. Then, a phosphorous glass film 8 is covered and a wiring layer 10 is formed with Al.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3892180A JPS56135973A (en) | 1980-03-28 | 1980-03-28 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3892180A JPS56135973A (en) | 1980-03-28 | 1980-03-28 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56135973A true JPS56135973A (en) | 1981-10-23 |
Family
ID=12538677
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3892180A Pending JPS56135973A (en) | 1980-03-28 | 1980-03-28 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56135973A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6489371A (en) * | 1987-09-29 | 1989-04-03 | Matsushita Electronics Corp | Manufacture of semiconductor storage device |
| WO2003012878A1 (en) * | 2001-07-27 | 2003-02-13 | Renesas Technology Corp. | Semiconductor device |
-
1980
- 1980-03-28 JP JP3892180A patent/JPS56135973A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6489371A (en) * | 1987-09-29 | 1989-04-03 | Matsushita Electronics Corp | Manufacture of semiconductor storage device |
| WO2003012878A1 (en) * | 2001-07-27 | 2003-02-13 | Renesas Technology Corp. | Semiconductor device |
| JPWO2003012878A1 (en) * | 2001-07-27 | 2004-11-25 | 株式会社ルネサステクノロジ | Semiconductor device |
| US7057230B2 (en) | 2001-07-27 | 2006-06-06 | Renesas Technology Corp. | Nonvolatile semiconductor memory device employing transistors having different gate withstand voltages for enhanced reading speed |
| US7414283B2 (en) | 2001-07-27 | 2008-08-19 | Renesas Technology Corp. | Semiconductor device |
| US7700992B2 (en) | 2001-07-27 | 2010-04-20 | Renesas Technology Corp. | Semiconductor device |
| US8017986B2 (en) | 2001-07-27 | 2011-09-13 | Renesas Electronics Corporation | Semiconductor device |
| US8698224B2 (en) | 2001-07-27 | 2014-04-15 | Renesas Electronics Corporation | Semiconductor device |
| US9412459B2 (en) | 2001-07-27 | 2016-08-09 | Renesas Electronics Corporation | Semiconductor device |
| US9812211B2 (en) | 2001-07-27 | 2017-11-07 | Renesas Electronics Corporation | Semiconductor device |
| US10115469B2 (en) | 2001-07-27 | 2018-10-30 | Renesas Electronics Corporation | Semiconductor device |
| US10354735B2 (en) | 2001-07-27 | 2019-07-16 | Renesas Electronics Corporation | Semiconductor device |
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