TW329055B - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
TW329055B
TW329055B TW086109132A TW86109132A TW329055B TW 329055 B TW329055 B TW 329055B TW 086109132 A TW086109132 A TW 086109132A TW 86109132 A TW86109132 A TW 86109132A TW 329055 B TW329055 B TW 329055B
Authority
TW
Taiwan
Prior art keywords
bit
bit line
line
visional
memory unit
Prior art date
Application number
TW086109132A
Other languages
English (en)
Inventor
Nobuhiko Ishitsuka
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW329055B publication Critical patent/TW329055B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491—Virtual ground arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
TW086109132A 1996-06-28 1997-06-27 Semiconductor memory device TW329055B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8169392A JP2882370B2 (ja) 1996-06-28 1996-06-28 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW329055B true TW329055B (en) 1998-04-01

Family

ID=15885757

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086109132A TW329055B (en) 1996-06-28 1997-06-27 Semiconductor memory device

Country Status (4)

Country Link
US (1) US5875128A (zh)
JP (1) JP2882370B2 (zh)
KR (1) KR100304750B1 (zh)
TW (1) TW329055B (zh)

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US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
JP3211745B2 (ja) * 1997-09-18 2001-09-25 日本電気株式会社 半導体記憶装置
JP3608919B2 (ja) * 1997-10-07 2005-01-12 シャープ株式会社 半導体記憶装置
US6633496B2 (en) * 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Symmetric architecture for memory cells having widely spread metal bit lines
TW480714B (en) * 1998-07-15 2002-03-21 United Microelectronics Corp Flash memory structure
JP3336985B2 (ja) 1999-01-29 2002-10-21 日本電気株式会社 半導体記憶装置
US6256231B1 (en) * 1999-02-04 2001-07-03 Tower Semiconductor Ltd. EEPROM array using 2-bit non-volatile memory cells and method of implementing same
JP3582773B2 (ja) * 1999-03-30 2004-10-27 シャープ株式会社 半導体記憶装置
JP2001297593A (ja) * 2000-04-10 2001-10-26 Nec Corp 半導体記憶装置及びデータ出力方法
JP2001344985A (ja) 2000-06-05 2001-12-14 Nec Corp 半導体記憶装置
JP3709132B2 (ja) 2000-09-20 2005-10-19 シャープ株式会社 不揮発性半導体記憶装置
US6344994B1 (en) 2001-01-31 2002-02-05 Advanced Micro Devices Data retention characteristics as a result of high temperature bake
US6493261B1 (en) 2001-01-31 2002-12-10 Advanced Micro Devices, Inc. Single bit array edges
US6307784B1 (en) 2001-02-28 2001-10-23 Advanced Micro Devices Negative gate erase
US6456533B1 (en) 2001-02-28 2002-09-24 Advanced Micro Devices, Inc. Higher program VT and faster programming rates based on improved erase methods
US6442074B1 (en) 2001-02-28 2002-08-27 Advanced Micro Devices, Inc. Tailored erase method using higher program VT and higher negative gate erase
US6584017B2 (en) 2001-04-05 2003-06-24 Saifun Semiconductors Ltd. Method for programming a reference cell
KR100416599B1 (ko) * 2001-05-31 2004-02-05 삼성전자주식회사 집적도와 독출동작 속도를 향상시키고 전력소모를감소시킬 수 있는 메탈 프로그래머블 롬의 메모리셀 구조
US6480422B1 (en) * 2001-06-14 2002-11-12 Multi Level Memory Technology Contactless flash memory with shared buried diffusion bit line architecture
US6512701B1 (en) 2001-06-21 2003-01-28 Advanced Micro Devices, Inc. Erase method for dual bit virtual ground flash
US7098107B2 (en) * 2001-11-19 2006-08-29 Saifun Semiconductor Ltd. Protective layer in memory device and method therefor
US6700818B2 (en) * 2002-01-31 2004-03-02 Saifun Semiconductors Ltd. Method for operating a memory device
US6747896B2 (en) 2002-05-06 2004-06-08 Multi Level Memory Technology Bi-directional floating gate nonvolatile memory
US7221591B1 (en) * 2002-05-06 2007-05-22 Samsung Electronics Co., Ltd. Fabricating bi-directional nonvolatile memory cells
US6914820B1 (en) 2002-05-06 2005-07-05 Multi Level Memory Technology Erasing storage nodes in a bi-directional nonvolatile memory cell
US6917544B2 (en) * 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
JP2004253115A (ja) 2003-01-30 2004-09-09 Sharp Corp 半導体記憶装置
US7178004B2 (en) * 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US7123532B2 (en) * 2003-09-16 2006-10-17 Saifun Semiconductors Ltd. Operating array cells with matched reference cells
US6980456B2 (en) * 2004-03-08 2005-12-27 Macronix International Co., Ltd. Memory with low and fixed pre-charge loading
JP2005327339A (ja) * 2004-05-12 2005-11-24 Matsushita Electric Ind Co Ltd マスクｒｏｍ
JP2005346755A (ja) 2004-05-31 2005-12-15 Sharp Corp 半導体記憶装置
US7095655B2 (en) * 2004-08-12 2006-08-22 Saifun Semiconductors Ltd. Dynamic matching of signal path and reference path for sensing
US7638850B2 (en) * 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US20060146624A1 (en) * 2004-12-02 2006-07-06 Saifun Semiconductors, Ltd. Current folding sense amplifier
EP1686592A3 (en) * 2005-01-19 2007-04-25 Saifun Semiconductors Ltd. Partial erase verify
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US7804126B2 (en) * 2005-07-18 2010-09-28 Saifun Semiconductors Ltd. Dense non-volatile memory array and method of fabrication
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US20070096199A1 (en) * 2005-09-08 2007-05-03 Eli Lusky Method of manufacturing symmetric arrays
US20070120180A1 (en) * 2005-11-25 2007-05-31 Boaz Eitan Transition areas for dense memory arrays
US7352627B2 (en) * 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) * 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US20070173017A1 (en) * 2006-01-20 2007-07-26 Saifun Semiconductors, Ltd. Advanced non-volatile memory array and method of fabrication thereof
US8253452B2 (en) * 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7692961B2 (en) * 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7760554B2 (en) * 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US20070255889A1 (en) * 2006-03-22 2007-11-01 Yoav Yogev Non-volatile memory device and method of operating the device
US7701779B2 (en) * 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7605579B2 (en) * 2006-09-18 2009-10-20 Saifun Semiconductors Ltd. Measuring and controlling current consumption and output current of charge pumps
US7965551B2 (en) * 2007-02-07 2011-06-21 Macronix International Co., Ltd. Method for metal bit line arrangement
US20080239599A1 (en) * 2007-04-01 2008-10-02 Yehuda Yizraeli Clamping Voltage Events Such As ESD
US7590001B2 (en) 2007-12-18 2009-09-15 Saifun Semiconductors Ltd. Flash memory with optimized write sector spares
KR102022355B1 (ko) 2012-07-10 2019-09-18 삼성전자주식회사 파워 게이팅 회로

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DE3277715D1 (en) * 1982-08-06 1987-12-23 Itt Ind Gmbh Deutsche Electrically programmable memory array
JP2863661B2 (ja) * 1991-12-16 1999-03-03 株式会社東芝 読出専用メモリ
JP3295137B2 (ja) * 1992-08-21 2002-06-24 株式会社リコー メモリ装置とその読出し方法
JP2565104B2 (ja) * 1993-08-13 1996-12-18 日本電気株式会社 仮想接地型半導体記憶装置
US5583808A (en) * 1994-09-16 1996-12-10 National Semiconductor Corporation EPROM array segmented for high performance and method for controlling same
US5748538A (en) * 1996-06-17 1998-05-05 Aplus Integrated Circuits, Inc. OR-plane memory cell array for flash memory with bit-based write capability, and methods for programming and erasing the memory cell array

Also Published As

Publication number Publication date
KR100304750B1 (ko) 2001-11-22
JP2882370B2 (ja) 1999-04-12
US5875128A (en) 1999-02-23
JPH1011991A (ja) 1998-01-16
KR980004972A (ko) 1998-03-30

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