DE19646197B4 - Halbleiterspeichervorrichtung mit geteilten Wortleitungen - Google Patents
Halbleiterspeichervorrichtung mit geteilten Wortleitungen Download PDFInfo
- Publication number
- DE19646197B4 DE19646197B4 DE19646197A DE19646197A DE19646197B4 DE 19646197 B4 DE19646197 B4 DE 19646197B4 DE 19646197 A DE19646197 A DE 19646197A DE 19646197 A DE19646197 A DE 19646197A DE 19646197 B4 DE19646197 B4 DE 19646197B4
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- word lines
- shared word
- shared
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950040557A KR100204542B1 (ko) | 1995-11-09 | 1995-11-09 | 멀티 서브워드라인 드라이버를 갖는 반도체 메모리장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE19646197A1 DE19646197A1 (de) | 1997-05-15 |
DE19646197B4 true DE19646197B4 (de) | 2005-04-28 |
Family
ID=19433580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19646197A Expired - Fee Related DE19646197B4 (de) | 1995-11-09 | 1996-11-08 | Halbleiterspeichervorrichtung mit geteilten Wortleitungen |
Country Status (6)
Country | Link |
---|---|
US (1) | US5812483A (de) |
JP (1) | JPH1031887A (de) |
KR (1) | KR100204542B1 (de) |
DE (1) | DE19646197B4 (de) |
GB (1) | GB2307076B (de) |
TW (1) | TW359826B (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5892703A (en) * | 1997-06-13 | 1999-04-06 | Micron Technology, Inc, | Memory architecture and decoder addressing |
KR100261174B1 (ko) * | 1997-12-12 | 2000-07-01 | 김영환 | 비휘발성 강유전체 메모리 및 그의 제조 방법 |
KR100268908B1 (ko) * | 1998-04-22 | 2000-10-16 | 김영환 | 에스더블유엘(swl) 강유전체 메모리 장치 및 그 구동회로 |
US6072711A (en) * | 1997-12-12 | 2000-06-06 | Lg Semicon Co., Ltd. | Ferroelectric memory device without a separate cell plate line and method of making the same |
US6144610A (en) * | 1999-04-20 | 2000-11-07 | Winbond Electronics Corporation | Distributed circuits to turn off word lines in a memory array |
JP4535563B2 (ja) * | 2000-04-28 | 2010-09-01 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
DE10038925A1 (de) * | 2000-08-09 | 2002-03-14 | Infineon Technologies Ag | Elektronische Treiberschaltung für Wortleitungen einer Speichermatrix und Speichervorrichtung |
US6594195B2 (en) | 2001-09-17 | 2003-07-15 | Cascade Semiconductor Corporation | Low-power, high-density semiconductor memory device |
CN100520964C (zh) * | 2004-03-11 | 2009-07-29 | 富士通微电子株式会社 | 半导体存储器 |
US7170783B2 (en) * | 2005-04-01 | 2007-01-30 | Micron Technology, Inc. | Layout for NAND flash memory array having reduced word line impedance |
JP4907967B2 (ja) * | 2005-12-01 | 2012-04-04 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
KR100935725B1 (ko) | 2007-12-18 | 2010-01-08 | 주식회사 하이닉스반도체 | 워드라인 구동 회로 |
US7916572B1 (en) | 2008-07-28 | 2011-03-29 | Altera Corporation | Memory with addressable subword support |
US8370935B1 (en) * | 2009-08-17 | 2013-02-05 | Fatskunk, Inc. | Auditing a device |
US8544089B2 (en) | 2009-08-17 | 2013-09-24 | Fatskunk, Inc. | Auditing a device |
US8375442B2 (en) * | 2009-08-17 | 2013-02-12 | Fatskunk, Inc. | Auditing a device |
US8949989B2 (en) | 2009-08-17 | 2015-02-03 | Qualcomm Incorporated | Auditing a device |
KR102109416B1 (ko) | 2013-05-21 | 2020-05-12 | 삼성전자주식회사 | 서브 워드라인 드라이버를 갖는 반도체 메모리 장치 및 그것의 구동방법 |
JP2017147005A (ja) * | 2016-02-16 | 2017-08-24 | ルネサスエレクトロニクス株式会社 | フラッシュメモリ |
KR102493814B1 (ko) * | 2016-06-29 | 2023-02-02 | 에스케이하이닉스 주식회사 | 메모리 장치 |
US11302365B2 (en) * | 2018-09-27 | 2022-04-12 | Synopsys, Inc. | Area efficient and high-performance wordline segmented architecture |
KR20210093607A (ko) | 2020-01-20 | 2021-07-28 | 삼성전자주식회사 | 메모리 장치의 워드라인 구동 회로 및 그것의 동작 방법 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5193074A (en) * | 1990-02-09 | 1993-03-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device having hierarchical row selecting lines |
US5319605A (en) * | 1991-02-05 | 1994-06-07 | Samsung Electronics Co., Ltd. | Arrangement of word line driver stage for semiconductor memory device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5148401A (en) * | 1989-02-02 | 1992-09-15 | Oki Electric Industry Co., Ltd. | DRAM with split word lines |
JP2812099B2 (ja) * | 1992-10-06 | 1998-10-15 | 日本電気株式会社 | 半導体メモリ |
US5875148A (en) * | 1993-01-29 | 1999-02-23 | Oki Electric Industry Co., Ltd. | Semiconductor memory |
US5502683A (en) * | 1993-04-20 | 1996-03-26 | International Business Machines Corporation | Dual ported memory with word line access control |
JP2725570B2 (ja) * | 1993-11-02 | 1998-03-11 | 日本電気株式会社 | 半導体メモリ装置 |
US5506816A (en) * | 1994-09-06 | 1996-04-09 | Nvx Corporation | Memory cell array having compact word line arrangement |
-
1995
- 1995-11-09 KR KR1019950040557A patent/KR100204542B1/ko not_active IP Right Cessation
-
1996
- 1996-11-04 TW TW085113459A patent/TW359826B/zh not_active IP Right Cessation
- 1996-11-08 US US08/744,441 patent/US5812483A/en not_active Expired - Lifetime
- 1996-11-08 JP JP8296159A patent/JPH1031887A/ja active Pending
- 1996-11-08 GB GB9623412A patent/GB2307076B/en not_active Expired - Fee Related
- 1996-11-08 DE DE19646197A patent/DE19646197B4/de not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5193074A (en) * | 1990-02-09 | 1993-03-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device having hierarchical row selecting lines |
US5319605A (en) * | 1991-02-05 | 1994-06-07 | Samsung Electronics Co., Ltd. | Arrangement of word line driver stage for semiconductor memory device |
Also Published As
Publication number | Publication date |
---|---|
US5812483A (en) | 1998-09-22 |
DE19646197A1 (de) | 1997-05-15 |
GB9623412D0 (en) | 1997-01-08 |
KR970029785A (ko) | 1997-06-26 |
TW359826B (en) | 1999-06-01 |
KR100204542B1 (ko) | 1999-06-15 |
GB2307076A (en) | 1997-05-14 |
GB2307076B (en) | 1998-01-07 |
JPH1031887A (ja) | 1998-02-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8364 | No opposition during term of opposition | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |
Effective date: 20140603 |