TW230832B - - Google Patents

Info

Publication number
TW230832B
TW230832B TW082100594A TW82100594A TW230832B TW 230832 B TW230832 B TW 230832B TW 082100594 A TW082100594 A TW 082100594A TW 82100594 A TW82100594 A TW 82100594A TW 230832 B TW230832 B TW 230832B
Authority
TW
Taiwan
Application number
TW082100594A
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of TW230832B publication Critical patent/TW230832B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
TW082100594A 1991-12-19 1993-01-30 TW230832B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/810,250 US5278438A (en) 1991-12-19 1991-12-19 Electrically erasable and programmable read-only memory with source and drain regions along sidewalls of a trench structure

Publications (1)

Publication Number Publication Date
TW230832B true TW230832B (zh) 1994-09-21

Family

ID=25203389

Family Applications (1)

Application Number Title Priority Date Filing Date
TW082100594A TW230832B (zh) 1991-12-19 1993-01-30

Country Status (5)

Country Link
US (1) US5278438A (zh)
EP (1) EP0547711B1 (zh)
JP (1) JPH05275713A (zh)
DE (1) DE69224716T2 (zh)
TW (1) TW230832B (zh)

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US6330181B1 (en) 1998-09-29 2001-12-11 Texas Instruments Incorporated Method of forming a gate device with raised channel
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DE10131705B4 (de) 2001-06-29 2010-03-18 Atmel Automotive Gmbh Verfahren zur Herstellung eines DMOS-Transistors
DE10131707B4 (de) 2001-06-29 2009-12-03 Atmel Automotive Gmbh Verfahren zur Herstellung eines DMOS-Transistors und dessen Verwendung zur Herstellung einer integrierten Schaltung
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US6566200B2 (en) * 2001-07-03 2003-05-20 Texas Instruments Incorporated Flash memory array structure and method of forming
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DE10200678B4 (de) * 2002-01-10 2006-05-11 Infineon Technologies Ag Verfahren zum Bearbeiten eines Substrats zum Ausbilden einer Struktur
US6830975B2 (en) * 2002-01-31 2004-12-14 Micron Technology, Inc. Method of forming field effect transistor comprising at least one of a conductive metal or metal compound in electrical connection with transistor gate semiconductor material
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DE10214126A1 (de) * 2002-03-28 2003-10-23 Infineon Technologies Ag Herstellungsverfahren für eine Mehrzahl von ungefähr gleich hohen und gleich beabstandeten Gatestapeln auf einem Halbleitersubstrat
JP3967193B2 (ja) * 2002-05-21 2007-08-29 スパンション エルエルシー 不揮発性半導体記憶装置及びその製造方法
DE10226964A1 (de) * 2002-06-17 2004-01-08 Infineon Technologies Ag Verfahren zur Herstellung einer NROM-Speicherzellenanordnung
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US6756303B1 (en) * 2002-07-31 2004-06-29 Advanced Micro Devices, Inc. Diffusion barrier and method for its production
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US7049652B2 (en) * 2003-12-10 2006-05-23 Sandisk Corporation Pillar cell flash memory technology
JP4928947B2 (ja) * 2003-12-19 2012-05-09 サード ディメンジョン （スリーディ） セミコンダクタ インコーポレイテッド 超接合デバイスの製造方法
US7262089B2 (en) * 2004-03-11 2007-08-28 Micron Technology, Inc. Methods of forming semiconductor structures
US7256112B2 (en) * 2005-01-20 2007-08-14 Chartered Semiconductor Manufacturing, Ltd Laser activation of implanted contact plug for memory bitline fabrication
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
US8012830B2 (en) 2007-08-08 2011-09-06 Spansion Llc ORO and ORPRO with bit line trench to suppress transport program disturb
FR3012672B1 (fr) 2013-10-31 2017-04-14 Stmicroelectronics Rousset Cellule memoire comprenant des grilles de controle horizontale et verticale non auto-alignees
FR3017746B1 (fr) * 2014-02-18 2016-05-27 Stmicroelectronics Rousset Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne
US20230411450A1 (en) * 2022-06-16 2023-12-21 Stmicroelectronics (Crolles 2) Sas Electronic device manufacturing method

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Also Published As

Publication number Publication date
EP0547711A3 (en) 1993-11-10
DE69224716T2 (de) 1998-09-17
US5278438A (en) 1994-01-11
EP0547711A2 (en) 1993-06-23
DE69224716D1 (de) 1998-04-16
JPH05275713A (ja) 1993-10-22
EP0547711B1 (en) 1998-03-11

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