FR3017746B1 - Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne - Google Patents

Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne

Info

Publication number
FR3017746B1
FR3017746B1 FR1451297A FR1451297A FR3017746B1 FR 3017746 B1 FR3017746 B1 FR 3017746B1 FR 1451297 A FR1451297 A FR 1451297A FR 1451297 A FR1451297 A FR 1451297A FR 3017746 B1 FR3017746 B1 FR 3017746B1
Authority
FR
France
Prior art keywords
self
memory cell
vertical memory
source implant
floating drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1451297A
Other languages
English (en)
Other versions
FR3017746A1 (fr
Inventor
Marc Mantelli
Stephan Niel
Arnaud Regnier
Rosa Francesco La
Julien Delalleau
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics International NV Switzerland
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1451297A priority Critical patent/FR3017746B1/fr
Priority to US14/625,356 priority patent/US9543311B2/en
Publication of FR3017746A1 publication Critical patent/FR3017746A1/fr
Application granted granted Critical
Publication of FR3017746B1 publication Critical patent/FR3017746B1/fr
Priority to US15/365,768 priority patent/US9876122B2/en
Priority to US15/852,826 priority patent/US10192999B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42336—Gate electrodes for transistors with a floating gate with one gate at least partly formed in a trench
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66666—Vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
FR1451297A 2014-02-18 2014-02-18 Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne Active FR3017746B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1451297A FR3017746B1 (fr) 2014-02-18 2014-02-18 Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne
US14/625,356 US9543311B2 (en) 2014-02-18 2015-02-18 Vertical memory cell with non-self-aligned floating drain-source implant
US15/365,768 US9876122B2 (en) 2014-02-18 2016-11-30 Vertical memory cell with non-self-aligned floating drain-source implant
US15/852,826 US10192999B2 (en) 2014-02-18 2017-12-22 Vertical memory cell with non-self-aligned floating drain-source implant

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1451297A FR3017746B1 (fr) 2014-02-18 2014-02-18 Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne

Publications (2)

Publication Number Publication Date
FR3017746A1 FR3017746A1 (fr) 2015-08-21
FR3017746B1 true FR3017746B1 (fr) 2016-05-27

Family

ID=51168015

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1451297A Active FR3017746B1 (fr) 2014-02-18 2014-02-18 Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne

Country Status (2)

Country Link
US (3) US9543311B2 (fr)
FR (1) FR3017746B1 (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3012672B1 (fr) * 2013-10-31 2017-04-14 Stmicroelectronics Rousset Cellule memoire comprenant des grilles de controle horizontale et verticale non auto-alignees
FR3017746B1 (fr) 2014-02-18 2016-05-27 Stmicroelectronics Rousset Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne
US9917165B2 (en) * 2015-05-15 2018-03-13 Taiwan Semiconductor Manufacturing Co., Ltd. Memory cell structure for improving erase speed
FR3057393A1 (fr) 2016-10-11 2018-04-13 Stmicroelectronics (Rousset) Sas Circuit integre avec condensateur de decouplage dans une structure de type triple caisson
CN108806751B (zh) * 2017-04-26 2021-04-09 中芯国际集成电路制造(上海)有限公司 多次可程式闪存单元阵列及其操作方法、存储器件
FR3070535A1 (fr) * 2017-08-28 2019-03-01 Stmicroelectronics (Crolles 2) Sas Circuit integre avec element capacitif a structure verticale, et son procede de fabrication
FR3070534A1 (fr) 2017-08-28 2019-03-01 Stmicroelectronics (Rousset) Sas Procede de fabrication d'elements capacitifs dans des tranchees
US10553708B2 (en) * 2017-08-29 2020-02-04 International Business Machines Corporation Twin gate tunnel field-effect transistor (FET)
FR3076660B1 (fr) 2018-01-09 2020-02-07 Stmicroelectronics (Rousset) Sas Dispositif integre de cellule capacitive de remplissage et procede de fabrication correspondant
US11621222B2 (en) 2018-01-09 2023-04-04 Stmicroelectronics (Rousset) Sas Integrated filler capacitor cell device and corresponding manufacturing method
US10482975B2 (en) 2018-03-16 2019-11-19 Microchip Technology Incorporated Flash memory cell with dual erase modes for increased cell endurance
FR3080949B1 (fr) * 2018-05-04 2021-05-28 St Microelectronics Rousset Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication
FR3087027A1 (fr) 2018-10-08 2020-04-10 Stmicroelectronics (Rousset) Sas Element capacitif de puce electronique
US10762966B2 (en) * 2018-10-30 2020-09-01 Globalfoundries Singapore Pte. Ltd. Memory arrays and methods of forming the same
US11004785B2 (en) 2019-08-21 2021-05-11 Stmicroelectronics (Rousset) Sas Co-integrated vertically structured capacitive element and fabrication process

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5278438A (en) * 1991-12-19 1994-01-11 North American Philips Corporation Electrically erasable and programmable read-only memory with source and drain regions along sidewalls of a trench structure
US5495441A (en) 1994-05-18 1996-02-27 United Microelectronics Corporation Split-gate flash memory cell
US5675161A (en) * 1995-03-28 1997-10-07 Thomas; Mammen Channel accelerated tunneling electron cell, with a select region incorporated, for high density low power applications
US5745410A (en) 1995-11-17 1998-04-28 Macronix International Co., Ltd. Method and system for soft programming algorithm
JPH11162181A (ja) 1997-11-26 1999-06-18 Sanyo Electric Co Ltd 不揮発性半導体記憶装置
US6496417B1 (en) 1999-06-08 2002-12-17 Macronix International Co., Ltd. Method and integrated circuit for bit line soft programming (BLISP)
FR2805653A1 (fr) 2000-02-28 2001-08-31 St Microelectronics Sa Memoire serie programmable et effacable electriquement a lecture par anticipation
TW546778B (en) * 2001-04-20 2003-08-11 Koninkl Philips Electronics Nv Two-transistor flash cell
TW484213B (en) 2001-04-24 2002-04-21 Ememory Technology Inc Forming method and operation method of trench type separation gate nonvolatile flash memory cell structure
US7006381B2 (en) 2001-11-27 2006-02-28 Koninklijke Philips Electronics N.V. Semiconductor device having a byte-erasable EEPROM memory
US7339822B2 (en) 2002-12-06 2008-03-04 Sandisk Corporation Current-limited latch
US6894339B2 (en) 2003-01-02 2005-05-17 Actrans System Inc. Flash memory with trench select gate and fabrication process
US7193900B2 (en) * 2005-01-18 2007-03-20 Mammen Thomas CACT-TG (CATT) low voltage NVM cells
CN100514495C (zh) 2005-01-20 2009-07-15 义隆电子股份有限公司 应用在非挥发性分离栅存储器的写入操作电路及方法
US7342272B2 (en) 2005-08-31 2008-03-11 Micron Technology, Inc. Flash memory with recessed floating gate
CN100477232C (zh) 2006-01-19 2009-04-08 力晶半导体股份有限公司 非挥发性存储器及其制造方法与操作方法
US7253057B1 (en) 2006-04-06 2007-08-07 Atmel Corporation Memory cell with reduced size and standby current
US7696044B2 (en) 2006-09-19 2010-04-13 Sandisk Corporation Method of making an array of non-volatile memory cells with floating gates formed of spacers in substrate trenches
US8093649B2 (en) 2008-03-28 2012-01-10 National Tsing Hua University Flash memory cell
US7851846B2 (en) 2008-12-03 2010-12-14 Silicon Storage Technology, Inc. Non-volatile memory cell with buried select gate, and method of making same
US8901634B2 (en) 2012-03-05 2014-12-02 Stmicroelectronics (Rousset) Sas Nonvolatile memory cells with a vertical selection gate of variable depth
FR2987697A1 (fr) * 2012-03-05 2013-09-06 St Microelectronics Rousset Procede de fabrication d'une memoire non volatile
US8940604B2 (en) 2012-03-05 2015-01-27 Stmicroelectronics (Rousset) Sas Nonvolatile memory comprising mini wells at a floating potential
FR3012672B1 (fr) 2013-10-31 2017-04-14 Stmicroelectronics Rousset Cellule memoire comprenant des grilles de controle horizontale et verticale non auto-alignees
FR3012673B1 (fr) 2013-10-31 2017-04-14 St Microelectronics Rousset Memoire programmable par injection de porteurs chauds et procede de programmation d'une telle memoire
FR3017746B1 (fr) 2014-02-18 2016-05-27 Stmicroelectronics Rousset Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne

Also Published As

Publication number Publication date
FR3017746A1 (fr) 2015-08-21
US20170084749A1 (en) 2017-03-23
US20180145183A1 (en) 2018-05-24
US9876122B2 (en) 2018-01-23
US10192999B2 (en) 2019-01-29
US9543311B2 (en) 2017-01-10
US20150236031A1 (en) 2015-08-20

Similar Documents

Publication Publication Date Title
FR3017746B1 (fr) Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne
DK3303568T3 (da) Celle
DK3560953T3 (da) Celle
DK3037518T3 (da) Indretning til at indsætte materiale i celle
DK3235465T3 (da) Implantat
SG11201703493SA (en) Cell culture insert
BR112016016379A2 (pt) Implante embólico macio
HK1248555A1 (zh) 基因修飾的t細胞的選擇方法
DK3217900T3 (da) Selvforseglende kanyle
DK3310405T3 (da) Vandopløseligt udskylleligt kateter
DK3221514T3 (da) Svellebund
DK3319555T3 (da) Bionedbrydeligt implantat
FR3021803B1 (fr) Cellules memoire jumelles accessibles individuellement en lecture
DK3157504T3 (da) Stamcellestimulerende sammensætninger
DK3365107T3 (da) Cellekultur
FR3016465B1 (fr) Memoire munie de cellules de memoire volatile et non volatile associees
DK3250224T3 (da) Embryoimplantation
GB201522480D0 (en) Floating structure
DE102014015054A8 (de) Warmwasser-Speicher
FR3016724B1 (fr) Memoire non volatile multiport
DK3390621T3 (da) Forbedret fermentering
FR3022880B1 (fr) Eolienne flottante
FR3025927B1 (fr) Programmation de cellules anti-fusibles
GB201412063D0 (en) Urine collection
FR3056990B1 (fr) Marqueurs cellulaires

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 2

PLFP Fee payment

Year of fee payment: 3

PLFP Fee payment

Year of fee payment: 4

PLFP Fee payment

Year of fee payment: 5

PLFP Fee payment

Year of fee payment: 7

PLFP Fee payment

Year of fee payment: 8

PLFP Fee payment

Year of fee payment: 9

PLFP Fee payment

Year of fee payment: 10

TP Transmission of property

Owner name: STMICROELECTRONICS INTERNATIONAL N.V., CH

Effective date: 20230522

PLFP Fee payment

Year of fee payment: 11