FR3080949B1 - Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication - Google Patents

Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication Download PDF

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Publication number
FR3080949B1
FR3080949B1 FR1853887A FR1853887A FR3080949B1 FR 3080949 B1 FR3080949 B1 FR 3080949B1 FR 1853887 A FR1853887 A FR 1853887A FR 1853887 A FR1853887 A FR 1853887A FR 3080949 B1 FR3080949 B1 FR 3080949B1
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memory cells
cel2
cel1
common
memory device
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FR3080949A1 (fr
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Quentin Hubert
Abderrezak Marzaki
Julien Delalleau
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STMicroelectronics Rousset SAS
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STMicroelectronics Rousset SAS
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Priority to FR1853887A priority Critical patent/FR3080949B1/fr
Priority to US16/391,768 priority patent/US10991710B2/en
Publication of FR3080949A1 publication Critical patent/FR3080949A1/fr
Priority to US17/220,286 priority patent/US11943931B2/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
    • H01L29/42344—Gate electrodes for transistors with charge trapping gate insulator with at least one additional gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
    • H01L29/42348—Gate electrodes for transistors with charge trapping gate insulator with trapping site formed by at least two separated sites, e.g. multi-particles trapping site
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
    • H01L29/42352—Gate electrodes for transistors with charge trapping gate insulator with the gate at least partly formed in a trench
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H01L29/7926—Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42332—Gate electrodes for transistors with a floating gate with the floating gate formed by two or more non connected parts, e.g. multi-particles flating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42336—Gate electrodes for transistors with a floating gate with one gate at least partly formed in a trench
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7889—Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

Le dispositif de mémoire non volatile, comprend un plan mémoire (PM) comportant des rangées (RG) et des colonnes (COL) de cellules mémoires, les colonnes (COL) de cellules mémoires comportant des paires de cellules mémoires jumelles (CEL1, CEL2), les deux transistors de sélection (ST1, ST2) d'une paire de cellules mémoires jumelles (CEL1, CEL2) ayant une grille de sélection enterrée commune (SG), les deux transistors d'état (T1, T2) d'une paire de cellules mémoires jumelles (CEL1, CEL2) ayant une grille de commande enterrée commune (CG) surmontant la grille de sélection commune (SG), le dispositif comprenant en outre, pour chaque paire de cellules mémoires jumelles (CEL1, CEL2) deux régions diélectriques (QDi) situées entre la grille de commande commune (CG) et le caisson (IPW) formant de part et d'autre de la grille de commande (CG) deux interfaces diélectriques de piégeage de charges (QTI1, QTI2) respectivement dédiées aux deux cellules mémoires jumelles (CEL1, CEL2).
FR1853887A 2018-05-04 2018-05-04 Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication Active FR3080949B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1853887A FR3080949B1 (fr) 2018-05-04 2018-05-04 Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication
US16/391,768 US10991710B2 (en) 2018-05-04 2019-04-23 Non-volatile memory device with vertical state transistor and vertical selection transistor
US17/220,286 US11943931B2 (en) 2018-05-04 2021-04-01 Non-volatile memory device with vertical state transistor and vertical selection transistor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1853887A FR3080949B1 (fr) 2018-05-04 2018-05-04 Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication
FR1853887 2018-05-04

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FR3080949A1 FR3080949A1 (fr) 2019-11-08
FR3080949B1 true FR3080949B1 (fr) 2021-05-28

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3080949B1 (fr) 2018-05-04 2021-05-28 St Microelectronics Rousset Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication
TW202145534A (zh) * 2020-05-15 2021-12-01 力晶積成電子製造股份有限公司 非揮發性記憶體結構
US20230197808A1 (en) * 2021-12-16 2023-06-22 Ememory Technology Inc. Memory cell of charge-trapping non-volatile memory

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5386132A (en) 1992-11-02 1995-01-31 Wong; Chun C. D. Multimedia storage system with highly compact memory device
EP1530803A2 (fr) * 2002-06-21 2005-05-18 Micron Technology, Inc. Cellule de memoire nrom, groupement de cellules de memoire et dispositifs et procedes correspondants
US7750389B2 (en) * 2003-12-16 2010-07-06 Micron Technology, Inc. NROM memory cell, memory array, related devices and methods
TWI225691B (en) * 2003-03-14 2004-12-21 Nanya Technology Corp A vertical NROM cell and method for fabrication the same
US7049652B2 (en) * 2003-12-10 2006-05-23 Sandisk Corporation Pillar cell flash memory technology
DE102004006505B4 (de) 2004-02-10 2006-01-26 Infineon Technologies Ag Charge-Trapping-Speicherzelle und Herstellungsverfahren
US7126188B2 (en) * 2004-05-27 2006-10-24 Skymedi Corporation Vertical split gate memory cell and manufacturing method thereof
JP4915904B2 (ja) * 2006-02-16 2012-04-11 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
US7906818B2 (en) * 2008-03-13 2011-03-15 Micron Technology, Inc. Memory array with a pair of memory-cell strings to a single conductive pillar
US8081515B2 (en) * 2008-04-04 2011-12-20 Trom Trench monos memory cell and array
US20100117141A1 (en) * 2008-11-13 2010-05-13 Samsung Electronics Co., Ltd. Memory cell transistors having limited charge spreading, non-volatile memory devices including such transistors, and methods of formation thereof
US8885407B1 (en) * 2010-01-19 2014-11-11 Perumal Ratnam Vertical memory cells and methods, architectures and devices for the same
FR2987696B1 (fr) * 2012-03-05 2014-11-21 St Microelectronics Rousset Procede de lecture ecriture de cellules memoire non volatiles
US8940604B2 (en) * 2012-03-05 2015-01-27 Stmicroelectronics (Rousset) Sas Nonvolatile memory comprising mini wells at a floating potential
US8901634B2 (en) * 2012-03-05 2014-12-02 Stmicroelectronics (Rousset) Sas Nonvolatile memory cells with a vertical selection gate of variable depth
FR2996680A1 (fr) * 2012-10-10 2014-04-11 St Microelectronics Rousset Memoire non volatile comportant des transistors de selection verticaux
FR3000838B1 (fr) * 2013-01-07 2015-01-02 St Microelectronics Rousset Procede de fabrication d’une memoire non volatile
FR3002811B1 (fr) * 2013-03-01 2016-05-27 St Microelectronics Rousset Circuit intégré protégé contre des courts-circuits causés par le siliciure.
US8962416B1 (en) * 2013-07-30 2015-02-24 Freescale Semiconductor, Inc. Split gate non-volatile memory cell
FR3017746B1 (fr) * 2014-02-18 2016-05-27 Stmicroelectronics Rousset Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne
KR102190647B1 (ko) * 2014-02-24 2020-12-14 삼성전자주식회사 반도체 메모리 장치 및 그 제조 방법
JP6241693B2 (ja) * 2014-09-25 2017-12-06 村田機械株式会社 パージ装置及びパージ方法
US9530506B2 (en) * 2014-11-21 2016-12-27 Sandisk Technologies Llc NAND boosting using dynamic ramping of word line voltages
US9330763B1 (en) * 2014-12-01 2016-05-03 Sandisk Technologies Inc. Operation modes for an inverted NAND architecture
US9406690B2 (en) * 2014-12-16 2016-08-02 Sandisk Technologies Llc Contact for vertical memory with dopant diffusion stopper and associated fabrication method
US10535409B2 (en) * 2015-12-30 2020-01-14 Texas Instruments Incorporated Method for suppressing gate oxide tunnel current in non-volatile memory to reduce disturbs
US9922716B2 (en) * 2016-04-23 2018-03-20 Sandisk Technologies Llc Architecture for CMOS under array
US9941293B1 (en) * 2016-10-12 2018-04-10 Sandisk Technologies Llc Select transistors with tight threshold voltage in 3D memory
FR3059458B1 (fr) * 2016-11-25 2019-03-29 Stmicroelectronics (Rousset) Sas Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique
WO2018182609A1 (fr) * 2017-03-30 2018-10-04 Intel Corporation Transistors à couches minces à grilles multiples verticaux
US10204689B1 (en) * 2017-07-25 2019-02-12 Sandisk Technologies Llc Non-volatile memory with methods to reduce creep-up field between dummy control gate and select gate
FR3070534A1 (fr) * 2017-08-28 2019-03-01 Stmicroelectronics (Rousset) Sas Procede de fabrication d'elements capacitifs dans des tranchees
US10707314B2 (en) * 2017-09-29 2020-07-07 Sandisk Technologies Llc Surround gate vertical field effect transistors including tubular and strip electrodes and method of making the same
US10475812B2 (en) * 2018-02-02 2019-11-12 Sunrise Memory Corporation Three-dimensional vertical NOR flash thin-film transistor strings
KR102631939B1 (ko) * 2018-02-07 2024-02-02 삼성전자주식회사 3차원 반도체 메모리 장치
US10482981B2 (en) * 2018-02-20 2019-11-19 Sandisk Technologies Llc Preventing refresh of voltages of dummy memory cells to reduce threshold voltage downshift for select gate transistors
US10636494B2 (en) * 2018-02-28 2020-04-28 Sandisk Technologies Llc Apparatus and method for reducing noise generated from locked out sense circuits in a non-volatile memory system
US20190312050A1 (en) * 2018-04-10 2019-10-10 Macronix International Co., Ltd. String select line gate oxide method for 3d vertical channel nand memory
FR3080949B1 (fr) 2018-05-04 2021-05-28 St Microelectronics Rousset Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication
US10636488B2 (en) * 2018-06-05 2020-04-28 Western Digital Technologies, Inc. Multi-sensing scan for cross-temperature mitigation

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Publication number Publication date
FR3080949A1 (fr) 2019-11-08
US10991710B2 (en) 2021-04-27
US11943931B2 (en) 2024-03-26
US20190341390A1 (en) 2019-11-07
US20210225853A1 (en) 2021-07-22

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